Abstract: A memory system includes multiple groups of primary memory cells residing in a first die or a stack of first dies, multiple groups of cache memory cells residing in a second die, an interposer, and control circuits residing in a third die. Each group of the cache memory cells is associated with a corresponding group of the primary memory cells. The first die or the stack of first dies is coupled to a top surface of the second die through a first group of bumps. A bottom surface of the second die is coupled to a top surface of the interposer through a second group of bumps. The control circuits are associated with the primary memory cells and the cache memory cells. The third die is positioned aside the second die and coupled to the top surface of the interposer through a third group of pumps.

Abstract: An integrated circuit includes first through fourth devices positioned over one or more substrates, a first radio frequency interconnect (RFI) including a first transmitter included in the first device, a first receiver included in the second device, and a first guided transmission medium coupled to each of the first transmitter and the first receiver, a second RFI including a second transmitter included in the first device, a second receiver included in the third device, and a second guided transmission medium coupled to each of the second transmitter and the second receiver, and a third RFI including a third transmitter included in the first device, a third receiver included in the fourth device, and the second guided transmission medium coupled to each of the third transmitter and the third receiver.

Abstract: A method for increasing the oil yield in an ethanol production process comprising: adding a liquid enzyme formulation having at least one enzyme, a buffering agent, a stabilizer, and a preservative where the pH of the enzyme formulation is about pH 6.0-8.0 to a beer, a distillation, a whole stillage, a centrifugation, a thin stillage, an evaporator, a syrup, or an oil recovery unit.

Abstract: An apparatus for synthesizing a spatially extended sound source including: an input interface for receiving a description of an audio scene, the description of the audio scene having spatially extended sound source data on the spatially extended sound source and modification data on a potentially modifying object, and for receiving a listener data; a sector identification processor for identifying a limited modified spatial sector for the spatially extended sound source within a rendering range for the listener, the rendering range for the listener being larger than the limited modified spatial sector, based on the spatially extended sound source data, the listener data, and the modification data; a target data calculator for calculating target rendering data from the one or more rendering data items belonging to the modified limited spatial sector; and an audio processor for processing an audio signal representing the spatially extended sound source using the target rendering data.

Abstract: Embodiments according to the disclosure have a renderer for rendering, e.g. spatially rendering, an acoustic scene, wherein the renderer is configured to render, e.g. to reproduce, an acoustic impact of a diffuse sound (e.g. of a reverberation; e.g. of a late reverberation), which originates in a first spatial region (e.g. in a first Acoustically Homogenous Space, AHS; e.g. in a first room), in a second spatial region (e.g. in a second Acoustically Homogenous Space; e.g. in a second room; e.g. in a spatial region outside the first spatial region), using a spatially extended sound source, e.g. a SESS, e.g. as a spatially extended sound source, e.g. a spatially extended sound source which reproduces the diffuse sound, e.g. using a homogenous extended sound source algorithm, and also encoders, methods and bitstreams.

Abstract: An apparatus synthesizing a spatially extended sound source, includes: a storage for storing one or more rendering data items for different limited spatial sectors, wherein the different limited spatial sectors are located in a rendering range for a listener, wherein the one or more rendering data items for a limited spatial sector includes at least one of a left variance data item, a right variance data item, and a left-right covariance data item; a sector identification processor for identifying one or more limited spatial sectors for the spatially extended sound source within the rendering range for the listener based on spatially extended sound source data; a target data calculator for calculating target rendering data from the stored left variance data, the stored right variance data, or the stored covariance data; and an audio processor for processing an audio signal representing the spatially extended sound source using the target rendering data.

Abstract: A light-emitting diode (“LED”) package includes a package housing defining a space. The LED package includes a first LED disposed with the space defined by the package housing, and configured to emit a first light having a blue wavelength range. The blue wavelength range has a peak wavelength ranging from about 440 nm to about 480 nm. The LED package includes a second LED disposed within the space, and configured to emit a second light having a red wavelength range. The red wavelength range has a peak wavelength ranging from about 610 nm to about 680 nm. The LED package includes a phosphor filler filling the space and configured to absorb a portion of the first light to emit a third light having a green wavelength range. The green wavelength range has a peak wavelength ranging from about 510 nm to about 570 nm.

Abstract: A touch sensor may include a sensing area and a non-sensing area. The touch sensor may include: a sensor base layer; a first sensing electrode and a second sensing electrode each disposed on the sensor base layer in the sensing area; a first sensing line and a second sensing line each disposed on the sensor base layer, the first sensing line being electrically connected to the first sensing electrode, the second sensing line being electrically connected to the second sensing electrode; and an auxiliary line disposed on the sensor base layer. The second sensing line may include a 2-1-th sensing line disposed in the sensing area, and a 2-2-th sensing line disposed in the non-sensing area. The auxiliary line may overlap the second sensing electrode in a plan view, enclose at least a portion of the 2-1-th sensing line, and be electrically connected to the second sensing electrode.

Abstract: An apparatus for synthesizing a spatially extended sound source (SESS), has: a storage for storing rendering data items for different elementary spatial sectors covering a rendering range for a listener; a sector identification processor for identifying, from the different elementary spatial sectors, a set of elementary spatial sectors belonging to the spatially extended sound source based on listener data and spatially extended sound source data; a target data calculator for calculating target rendering data from the rendering data items for the set of elementary spatial sectors; and an audio processor for processing an audio signal representing the spatially extended sound source using the target rendering data.

Abstract: A display device and an electronic apparatus are disclosed. The display device comprises: an image-display component, which generates an image light output, wherein at least one pixel light of the image light output has light polarization components of at least two polarization states or has a polarization light component of a polarization state and a non-polarization light component; and a polarization dependent image offset component, which receives the image light output coming from the image display component and deflects the polarization light components based on the polarization states to separate each of the at least one pixel light into at least two pixel lights, or deflects the polarization light component from the non-polarization light component to separate each of the at least one pixel light into at least two pixel lights.

Abstract: A device is disclosed. The cell block includes a pin disposed at a Nth metal layer in a cell layout. The first metal interconnect is disposed at a (N+1)th metal layer above the Nth metal layer and stacked over the pin, and electrically coupled to the pin. The second interconnects are disposed at a (N+2)th metal layer and stacked over the first metal interconnect, and parallel to each other. The second metal interconnects are electrically coupled to the first metal interconnect, and forming an equivalent tapping point of the pin of the cell block. The equivalent tapping point and the pin are vertically overlapped with each other, and fabrication of the device is initiated after a DRC or a SEM simulation test is passed. A first width of at least one first metal interconnect is different from a second width of one of the plurality of second metal interconnects.

Abstract: A semiconductor device structure includes a dielectric layer formed on a silicon substrate, an amorphous carbon layer (ACL) formed on the dielectric layer, and a charge dissipation layer formed between the ACL and the dielectric layer. The charge dissipation layer is formed from a material having a resistivity lower than the resistivity of the ACL. Methodologies to fabricate the semiconductor device structure are also disclosed and include forming the dielectric layer on the silicon substrate, forming the charge dissipation layer on the dielectric layer, and forming the ACL on the charge dissipation layer. Alternative semiconductor device structures and fabrication methodologies are also disclosed.

Abstract: The disclosed system may include a display; a lens; and a diffractive optical element, where the diffractive optical element is configured to increase a fill factor of the display when the lens is used to magnify the display. Various other apparatuses, systems, and methods are also disclosed.

Abstract: A method for fabricating a semiconductor device includes forming a pattern of trenches by etching a first layer formed over an underlying layer of a substrate, each of the trenches having an aspect ratio (AR) in a range with a lower limit of a first AR and an upper limit of a second AR, the pattern including a low-AR trench having the first AR and a high-AR trench having the second AR, the AR of a trench being a ratio of its depth to its opening width, the etching including: executing a first recipe in a plasma chamber to anisotropically etch the first layer for a first duration by flowing etchants through the chamber, an etch rate of the first layer being higher on the low-AR trench relative to that on the high-AR trench; and after executing the first recipe, executing a second recipe in the plasma chamber to etch the first layer anisotropically and concurrently deposit oxygen-containing etch byproducts to passivate exposed portions of sides of the trenches, the etch rate of the first layer being lower on th

Abstract: The present disclosure relates to liquid enzyme formulations containing one or more alpha-amylases for use in starch processing, wherein the pH of the enzyme formulation is about pH 6.0-8.0, and methods of use thereof. The present disclosure further relates to methods of making a liquid enzyme formulation containing one or more alpha-amylase having improved stability, comprising titrating the pH of the liquid enzyme formulation to a range of pH 6.0-8.0.

Abstract: The present invention provides an impedance-based organoid evaluation system comprising an organoid deformation generating unit including a first tube and a plurality of second tubes having a diameter smaller than that of the first tube, connected to one end of the first tube or inserted therein; and an impedance measuring unit connected to the organoid deformation generating unit and including an impedance analyzer for measuring the impedance of the organoid, and evaluating the organoid from the impedance measured by the impedance measuring unit.

Abstract: A network-on-chip (NoC) system includes a default communication path between a master device and a slave device, and a backup communication path between the master device and the slave device. The default communication path is configured to work in a normal operation state of the chip. The backup communication path is configured to replace the default communication path when a fault arises in the default communication path.

Abstract: A method includes receiving a source code for executing a plurality of operations associated with a machine learning algorithm, classifying each operation into a fast operation group and/or a slow operation group, defining a neuron network for executing operations of the slow operation group, and mapping the neuron network to an initial machine learning hardware configuration. The method also includes executing the slow operation group operation on the machine learning hardware configuration, finalizing the machine learning hardware configuration capable of successfully executing least one test data set.

Abstract: The present disclosure relates to liquid enzyme formulations containing one or more alpha-amylases for use in starch processing, wherein the pH of the enzyme formulation is about pH 6.0-8.0, and methods of use thereof. The present disclosure further relates to methods of making a liquid enzyme formulation containing one or more alpha-amylase having improved stability, comprising titrating the pH of the liquid enzyme formulation to a range of pH 6.0-8.0.