Patents by Inventor Yun Han

Yun Han has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240071941
    Abstract: A semiconductor device includes: a first chip including a plurality of first device features and a plurality of first interconnect structures disposed above the first device features; a second chip including a plurality of second device features and a plurality of second interconnect structures disposed above the second device features; and an interposer bonded to the first chip and the second chip, and disposed on an opposite side from the first and second device features with respect to the first and second interconnect structures; wherein the interposer includes a plurality of power rails configured to deliver power to the first and second chips.
    Type: Application
    Filed: August 29, 2022
    Publication date: February 29, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ming-Fa Chen, Yun-Han Lee, Lee-Chung Lu
  • Publication number: 20240060103
    Abstract: The present invention relates to an E. coli hisG-derived ATP-phosphoribosyltransferase variant having a reduced feedback inhibition by histidine and a strain expressing the same. The variant may maintain its activity even at a high histidine concentration, thus increasing histidine production.
    Type: Application
    Filed: April 26, 2021
    Publication date: February 22, 2024
    Applicant: DAESANG CORPORATION
    Inventors: Jong Yun HAN, Chel Min YANG, Yong Soo KIM, Young Il JO
  • Publication number: 20240060057
    Abstract: The present invention relates to an E. coli hisG-derived ATP-phosphoribosyltransferase variant having a reduced feedback inhibition by histidine and a strain expressing the same. The variant may maintain its activity even at a high histidine concentration, thus increasing histidine production.
    Type: Application
    Filed: April 26, 2021
    Publication date: February 22, 2024
    Applicant: DAESANG CORPORATION
    Inventors: Jong Yun HAN, Chel Min YANG, Yong Soo KIM, Young Il JO
  • Publication number: 20240060104
    Abstract: The present invention relates to an E. coli hisG-derived ATP-phosphoribosyltransferase variant having a reduced feedback inhibition by histidine and a strain expressing the same. The variant may maintain its activity even at a high histidine concentration, thus increasing histidine production.
    Type: Application
    Filed: April 26, 2021
    Publication date: February 22, 2024
    Applicant: DAESANG CORPORATION
    Inventors: Jong Yun HAN, Chel Min YANG, Yong Soo KIM, Young Il JO
  • Patent number: 11904581
    Abstract: A method for preparing a bifunctional film, including: (a) drying a first polymer solution to form a film to form an anti-adhesion layer, and (b) drying a second polymer solution over the anti-adhesion layer to form a film to form an attachment layer. The first polymer solution includes a first hydrophobic solution and a first hydrophilic solution, and in the first polymer solution, the weight ratio of the solute of the first hydrophobic solution to the solute of the first hydrophilic solution is 1:0.01-1. Moreover, the second polymer solution is composed of a second hydrophilic solution.
    Type: Grant
    Filed: August 11, 2022
    Date of Patent: February 20, 2024
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Hsin-Hsin Shen, Yu-Chi Wang, Ming-Chia Yang, Yu-Bing Liou, Wei-Hong Chang, Yun-Han Lin, Hsin-Yi Hsu, Yun-Chung Teng, Chia-Jung Lu, Yi-Hsuan Lee, Jian-Wei Lin, Kun-Mao Kuo, Ching-Mei Chen
  • Patent number: 11899064
    Abstract: In one embodiment, a device comprises: a first die having disposed thereon a first plurality of latches wherein ones of the first plurality of latches are operatively connected to an adjacent one of the first plurality of latches; and a second die having disposed thereon a second plurality of latches wherein ones of the second plurality of latches are operatively connected to an adjacent one of the second plurality of latches. Each latch of the first plurality of latches on said first die corresponds to a latch in the second plurality of latches on said second die. Each set of corresponding latches are operatively connected. A scan path comprises a closed loop comprising each of said first and second plurality of latches. One of the second plurality of latches is operatively connected to another one of the second plurality of latches via an inverter.
    Type: Grant
    Filed: December 13, 2022
    Date of Patent: February 13, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Sandeep Kumar Goel, Yun-Han Lee, Saman M. I. Adham, Marat Gershoig
  • Publication number: 20240047338
    Abstract: In an embodiment, a device includes: a first integrated circuit die including a first device layer and a first front-side interconnect structure, the first front-side interconnect structure including first interconnects interconnecting first devices of the first device layer; a second integrated circuit die including a second device layer and a second front-side interconnect structure, the second front-side interconnect structure including second interconnects interconnecting second devices of the second device layer; and an interposer bonded to a back-side of the first integrated circuit die and to a back-side of the second integrated circuit die, the interposer including a die-to-die interconnect structure, the die-to-die interconnect structure including a pillar, the first integrated circuit die overlapping the pillar.
    Type: Application
    Filed: January 6, 2023
    Publication date: February 8, 2024
    Inventors: Ming-Fa Chen, Yun-Han Lee, Lee-Chung Lu
  • Publication number: 20240036316
    Abstract: A Pancharatnam-Berry phase (PBP) lens includes a substrate and one or more liquid crystal material layers on the substrate. The one or more liquid crystal material layers include a plurality of zones at different distances from a center of the PBP lens, where different zones of the plurality of zones of the one or more liquid crystal material layers have different liquid crystal twist angles along a surface-normal direction of the substrate and different phase delays for surface-normal incident light. The PBP lens can have an f-number less than 1, and can be used in a near-eye display system to project display images to an eye of a user at an efficiency greater than 75% at a peripheral region of the PBP lens.
    Type: Application
    Filed: July 26, 2022
    Publication date: February 1, 2024
    Inventors: Chulwoo OH, Hyunmin SONG, Junren WANG, Lu LU, Sawyer MILLER, Stefanie TAUSHANOFF, Yun-Han LEE
  • Publication number: 20240027674
    Abstract: An optical element includes a waveguide body that is configured to guide light by total internal reflection from an input end to an output end, an input coupling structure located at the input end for coupling light into the waveguide body, and an output coupling structure located at the output end for coupling light out of the waveguide body, where the waveguide body includes a layer of an organic solid crystal. Such an optical element may have low weight and exhibit good color uniformity.
    Type: Application
    Filed: December 8, 2022
    Publication date: January 25, 2024
    Inventors: Tingling Rao, Wanli Chi, Xiayu Feng, Yun-Han Lee, Andrew John Ouderkirk, Poer Sung
  • Patent number: 11879933
    Abstract: A method of testing an integrated circuit on a test circuit board includes performing, by a processor, a simulation of a first heat distribution throughout an integrated circuit design, manufacturing the integrated circuit according to the integrated circuit design, and simultaneously performing a burn-in test of the integrated circuit and an automated test of the integrated circuit. The burn-in test has a minimum burn-in temperature of the integrated circuit and a burn-in heat distribution across the integrated circuit. The integrated circuit design corresponds to the integrated circuit. The integrated circuit is coupled to the test circuit board. The integrated circuit includes a set of circuit blocks and a first set of heaters.
    Type: Grant
    Filed: August 3, 2021
    Date of Patent: January 23, 2024
    Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., TSMC NANJING COMPANY, LIMITED
    Inventors: Ankita Patidar, Sandeep Kumar Goel, Yun-Han Lee
  • Patent number: 11880103
    Abstract: An optical element includes a first boundary layer and a second boundary layer. A solution is disposed between the first boundary layer and the second boundary layer. The solution includes liquid crystals co-mingled with oblong photochromic dye molecules. The photochromic dye molecules are matched to the liquid crystals to offset a decrease in absorption of the photochromic dye molecules in response to a temperature increase of the photochromic dye molecules.
    Type: Grant
    Filed: March 31, 2022
    Date of Patent: January 23, 2024
    Assignee: Meta Platforms Technologies, LLC
    Inventors: Jasmine Soria Sears, Afsoon Jamali, Yun-Han Lee
  • Publication number: 20240019635
    Abstract: A waveguide assembly includes a waveguide having a first surface and a second surface; an input deflection grating; an output deflection grating; and a first compensator layer on the first surface of the waveguide. The first compensator layer includes a material selected from aligned liquid crystal reactive mesogens, birefringent polymers, and inorganic birefringent materials.
    Type: Application
    Filed: December 1, 2021
    Publication date: January 18, 2024
    Inventors: Xiayu FENG, Philip BOS, Yun Han LEE, Lu LU
  • Patent number: 11874474
    Abstract: A system includes a diffractive optical element including at least one substrate and a grating structure. The grating structure is configured to diffract a first light having an incidence angle within a predetermined range, and the at least one substrate is configured to reflect a second light. The system also includes a polarization selective mechanism configured to generate images based on the first light and the second light, respectively.
    Type: Grant
    Filed: September 11, 2020
    Date of Patent: January 16, 2024
    Assignee: META PLATFORMS TECHNOLOGIES, LLC
    Inventors: Yun-Han Lee, Mengfei Wang, Junren Wang, Lu Lu, Robin Sharma, Gregory Olegovic Andreev, Garam Young, Andrew John Ouderkirk, Babak Amirsolaimani, Fenglin Peng, Barry David Silverstein
  • Patent number: 11872934
    Abstract: A vehicle indoor illumination device includes a housing having an upper opening with an internal space formed therein, a light-emitting unit disposed on the housing to emit light, a diffuser disposed outside the light-emitting unit in a manner as to close the upper opening of the housing to allow the light emitted from the light-emitting unit to diffuse to the outside, a cover part disposed on an outer surface of the diffuser and on which a light pattern is formed through scattering of the light transmitted through the diffuser, and a controller configured to receive an operation signal of a vehicle electronic part to control an operation of the light-emitting unit.
    Type: Grant
    Filed: December 22, 2022
    Date of Patent: January 16, 2024
    Assignee: HYUNDAI MOBIS CO., LTD.
    Inventors: Ju Yeon Jung, Sang Hun Yoo, Chi Yun Han
  • Patent number: 11869560
    Abstract: A system includes a polarization selective optical element configured to diffract a light reflected by an object into a plurality of signal lights. The system also includes at least one optical sensor configured to receive the signal lights and generate a plurality of tracking signals for tracking the object.
    Type: Grant
    Filed: December 2, 2021
    Date of Patent: January 9, 2024
    Assignee: META PLATFORMS TECHNOLOGIES, LLC
    Inventors: Hyunmin Song, Sanaz Alali, Yun-Han Lee, Zhisheng Yun
  • Patent number: 11860573
    Abstract: A system includes a mask configured to forwardly diffract an input beam as a first set of two polarized beams. The system also includes a polarization conversion element configured to convert the first set of two polarized beams into a second set of two polarized beams having opposite handednesses. The two polarized beams having opposite handednesses interfere with one another to generate a polarization interference pattern.
    Type: Grant
    Filed: April 13, 2021
    Date of Patent: January 2, 2024
    Assignee: META PLATFORMS TECHNOLOGIES, LLC
    Inventors: Mengfei Wang, Junren Wang, Yun-Han Lee, Stephen Choi, Lu Lu, Barry David Silverstein
  • Publication number: 20230417962
    Abstract: A system includes a surface relief grating configured to forwardly diffract an input beam as two linearly polarized beams. The system also includes a waveplate optically coupled with the surface relief grating and configured to convert the two linearly polarized beams into two circularly polarized beams having orthogonal circular polarizations. The two circularly polarized beams having orthogonal circular polarizations interfere with one another to generate a polarization interference pattern.
    Type: Application
    Filed: November 24, 2020
    Publication date: December 28, 2023
    Inventors: Yun-Han LEE, Mengfei WANG, Stephen CHOI, Kieran Connor KELLY, Lu LU, Kyle Justin CURTS
  • Patent number: 11854943
    Abstract: An integrated circuit (IC) package includes a logic die, a substrate, a memory die positioned between the logic die and the substrate, and a power distribution structure configured to electrically couple the logic die to the substrate. The power distribution structure includes a plurality of conductive segments positioned between the logic die and the memory die, a plurality of bump structures positioned between the memory die and the substrate, and a plurality of through-silicon vias (TSVs) electrically coupled to the plurality of conductive segments and the plurality of bump structures, and a TSV of the plurality of TSVs extends through, and is electrically isolated from, a memory macro of the memory die.
    Type: Grant
    Filed: January 12, 2023
    Date of Patent: December 26, 2023
    Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., TSMC NANJING COMPANY, LIMITED
    Inventors: Hidehiro Fujiwara, Tze-Chiang Huang, Hong-Chen Cheng, Yen-Huei Chen, Hung-Jen Liao, Jonathan Tsung-Yung Chang, Yun-Han Lee, Lee-Chung Lu
  • Patent number: 11838414
    Abstract: An apparatus and method for encryption key recovery based on memory analysis. The apparatus may include one or more processors and executable memory for storing at least one program executed by the one or more processors. The at least one program may collect memory information pertaining to an encrypted part of a file, in which ransomware is detected, based on dynamic binary instrumentation, analyze memory read operation data corresponding to an encryption key that is used for encryption of the file in the memory information, recover the encryption key based on the result of analysis of the memory read operation data, and output the result of recovery of the encryption key.
    Type: Grant
    Filed: October 13, 2020
    Date of Patent: December 5, 2023
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Tae Hwan Park, Sang Yun Han, Sang Woon Jang, Il Hwan Park
  • Publication number: 20230385136
    Abstract: The disclosure provides an application page navigation method and a terminal device. The method includes: obtaining a page navigation relationship diagram; in response to detecting a page navigation request for navigating to a second function page when a first function page is displayed, obtaining a first dimension corresponding to the first function page and a second dimension corresponding to second function page; and determining a page navigation mode corresponding to the page navigation request based on a comparison result of the first dimension and the second dimension.
    Type: Application
    Filed: June 29, 2022
    Publication date: November 30, 2023
    Applicant: Merry Electronics(Shenzhen) Co., Ltd.
    Inventors: Yun Han Yang, Yi Lin Hsieh, Ting-Chieh Weng