Abstract: A substrate processing method including: providing a substrate containing an etch mask over a metallic molybdenum layer in a recessed feature; exposing the substrate to a plasma-excited deposition gas that forms an etch protection layer on a sidewall of the recessed feature; and exposing the substrate to a plasma-excited etching gas that etches the metallic molybdenum layer according to the etch mask, where the exposing steps are alternatingly performed a plurality of times.

Abstract: A multi-focal system includes a display pixel array, a pixelated polarization array, and a Pancharatnam-Berry phase (PBP) lens. The display pixel array includes a first display pixels generating first display light and a second display pixels generating second display light. The pixelated polarization array has first pixels and second pixels. The first pixels are aligned with the first display pixels to generate a first polarized light having a first polarization orientation. The second pixels are aligned with the second display pixels to generate a second polarized light having a second polarization orientation different from the first polarization orientation. The PBP lens is configured to focus the first polarized light having the first polarization orientation to a first focal length and focus the second polarized light having the second polarization orientation to a second focal length that is greater than the first focal length.

Abstract: An illumination system includes a light source configured to emit an infrared light. The illumination system also includes a substrate and a plurality of light deflecting elements coupled with the substrate and configured to deflect the infrared light to illuminate an object.

Abstract: A vehicle indoor illumination device includes a housing having an upper opening with an internal space formed therein, a light-emitting unit disposed on the housing to emit light, a diffuser disposed outside the light-emitting unit in a manner as to close the upper opening of the housing to allow the light emitted from the light-emitting unit to diffuse to the outside, a cover part disposed on an outer surface of the diffuser and on which a light pattern is formed through scattering of the light transmitted through the diffuser, and a controller configured to receive an operation signal of a vehicle electronic part to control an operation of the light-emitting unit.

Abstract: According to examples, a depth sensing apparatus may include an illumination source to output a light beam onto a polarizing beam separation element (PBSE). The PBSE may generate a right hand circularly polarized (RCP) beam and a left hand circularly polarized (LCP) beam to be projected onto a target area, in which the RCP beam and the LCP beam may create an interference with respect to each other. The depth sensing apparatus also includes an imaging component to capture an image of the target area with the RCP beam and the LCP beam projected on the target area, in which the captured image is to be analyzed for depth sensing of the target area. The depth sensing apparatus further includes a polarizer that may increase an intensity of the interference pattern.

Abstract: A display device is provided. The display device includes a first sensing electrode extending in a first direction, the first sensing electrode including a first sub-sensing electrode and a second sub-sensing electrode spaced apart from each other in a touch area which senses a touch input; a second sensing electrode extending in a second direction intersecting the first direction, the second sensing electrode including a third sub-sensing electrode and a fourth sub-sensing electrode spaced apart from each other in the touch area; a first touch signal line connected to the first sub-sensing electrode and the second sub-sensing electrode; and a second touch signal line connected to the third sub-sensing electrode and the fourth sub-sensing electrode.

Abstract: A catalyst for fuel cells and a method of manufacturing the catalyst are disclosed. The catalyst forms shells in a dense structure so as to prevent elution of a transition metal and increases dispersibility through hydrophilization of the surface of the catalyst so as to be uniformly dispersed when an ink for forming a fuel cell electrode is manufactured. The catalyst may thus increase the performance and durability of a fuel cell.

Abstract: The present invention relates to an anti-inflammatory composition comprising Epimedium koreanum Nakai, Polygala tenuifolia Willd, and Polyporus umbellatus Fries extracts or a mixture thereof as an active ingredient. The extracts and mixture prepared according to the present invention exhibit a high inhibitory effect against nitric oxide and a suppressive effect against the expression of iNOS and COX2 and thus can be advantageously used as an anti-inflammatory composition.

Abstract: In one embodiment, a device comprises: a first die having disposed thereon a first plurality of latches wherein ones of the first plurality of latches are operatively connected to an adjacent one of the first plurality of latches; and a second die having disposed thereon a second plurality of latches wherein ones of the second plurality of latches are operatively connected to an adjacent one of the second plurality of latches. Each latch of the first plurality of latches on said first die corresponds to a latch in the second plurality of latches on said second die. Each set of corresponding latches are operatively connected. A scan path comprises a closed loop comprising each of said first and second plurality of latches. One of the second plurality of latches is operatively connected to another one of the second plurality of latches via an inverter.

Abstract: Integrated circuit packages and methods of forming the same are provided. In an embodiment, a device includes: a power distribution interposer including: a first bonding layer; a first die connector in the first bonding layer; and a back-side interconnect structure including a power rail connected to the first die connector; and an integrated circuit die including: a second bonding layer directly bonded to the first bonding layer by dielectric-to-dielectric bonds; a second die connector in the second bonding layer, the second die connector directly bonded to the first die connector by metal-to-metal bonds; and a device layer on the second bonding layer, the device layer including a contact and a transistor, the transistor including a first source/drain region, the contact connecting a back-side of the first source/drain region to the second die connector.

Abstract: A method for processing a substrate includes performing a cyclic plasma process including a plurality of cycles, each cycle of the plurality of cycles including purging a plasma processing chamber including the substrate with a first deposition gas including carbon. The substrate includes a first layer including silicon and a second layer including a metal oxide. The method further includes exposing the substrate to a first plasma generated from the first deposition gas to selectively deposit a first polymeric film over the first layer relative to the second layer; purging the plasma processing chamber with an etch gas including fluorine; and exposing the substrate to a second plasma generated from the etch gas to etch the second layer.

Abstract: A semiconductor package includes a first semiconductor die and a second semiconductor die disposed laterally adjacent one another. The semiconductor package includes a semiconductor bridge overlapping a first corner of the first semiconductor die and a second corner of the second semiconductor die. The semiconductor bridge electrically couples the first semiconductor to the second semiconductor die. The semiconductor package includes a third semiconductor die and a fourth semiconductor die electrically coupled to the first semiconductor die and the second semiconductor die, respectively. The semiconductor bridge is interposed between the third semiconductor die and the fourth semiconductor die.

Abstract: A network-on-chip (NoC) system includes a default communication path between a master device and a slave device, and a backup communication path between the master device and the slave device. The default communication path is configured to work in a normal operation state of the chip. The backup communication path is configured to replace the default communication path when a fault arises in the default communication path.

Abstract: There is provided an additive for secondary battery electrolyte, containing aluminum silicate. The aluminum silicate has a particle size of 200 nm to 20 ?m. The aluminum silicate has a mass ratio of 60 to 70 wt % of oxygen (O), 0.1 to 2.0 wt % of aluminum (Al), and 25 to 35 wt % of silicon (Si). The aluminum silicate has a surface area of 50 to 1,000 m2/g. The aluminum silicate has a pore size of 0.1 to 20 nm.

Abstract: There is provided an additive, containing magnesium silicate, for a secondary battery electrolyte and a preparation method therefor. The magnesium silicate has a mass ratio of 50 to 70 wt % of oxygen (O), 5 to 20 wt % of magnesium (Al), and 15 to 35 wt % of silicon (Si). The magnesium silicate has a surface area of 50 to 500 m2/g. The magnesium silicate has a pore size of 0.1 to 20 nm.

Abstract: A method for plasma processing includes: sustaining a plasma in a plasma processing chamber, the plasma processing chamber including a first radio frequency (RF) electrode and a second RF electrode, where sustaining the plasma includes: coupling an RF source signal to the first RF electrode; and coupling a bias signal between the first RF electrode and the second RF electrode, the bias signal having a bipolar DC (B-DC) waveform including a plurality of B-DC pulses, each of the B-DC pulses including: a negative bias duration during which the pulse has negative polarity relative to a reference potential, a positive bias duration during which the pulse has positive polarity relative to the reference potential, and a neutral bias duration during which the pulse has neutral polarity relative to the reference potential.

Abstract: A method of testing an integrated circuit on a test circuit board includes performing, by a processor, a simulation of a first heat distribution throughout an integrated circuit design, and simultaneously performing a burn-in test of the integrated circuit and an automated test of the integrated circuit. The burn-in test has a minimum burn-in temperature of the integrated circuit or a burn-in heat distribution across the integrated circuit that includes a set of circuit blocks or a first set of heaters. The integrated circuit design corresponding to the integrated circuit. The performing the simulation includes determining a heat signature of the integrated circuit design from configured power information or location information for each circuit block of the set of circuit blocks or each heater of the set of heaters included in the integrated circuit design. The heat signature includes heat values distributed throughout the integrated circuit design.

Abstract: An integrated circuit (IC) die includes first through third adjacent rows of through-silicon vias (TSVs), and first and second adjacent rows of memory macros. TSVs of the first row of TSVs extend through and are electrically isolated from memory macros of the first row of memory macros. TSVs of the third row of TSVs extend through and are electrically isolated from memory macros of the second row of memory macros.

Abstract: A method of patterning a substrate includes forming a first line, a second line, and a third line over the substrate, the first line, the second line, and the third line being parallel in a plan view, and forming a fourth line and a fifth line over the first line, the second line, and the third line, the fourth line and the fifth line being orthogonal to the first line in the plan view. The method further includes etching a hole through the second line using the first line, the third line, the fourth line, and the fifth line as an etching mask, and filling the hole with a dielectric material to form a block.

Abstract: The present invention relates to an E. coli hisG-derived ATP-phosphoribosyltransferase variant having a reduced feedback inhibition by histidine and a strain expressing the same. The variant may maintain its activity even at a high histidine concentration, thus increasing histidine production.