Abstract: A semiconductor device includes: an isolation insulating layer; fin structures protruding from the isolation insulating layer; gate structures, each having a metal gate and a cap insulating layer disposed over the metal gate; a first source/drain epitaxial layer and a second source/drain epitaxial layer disposed between two adjacent gate structures; and a first conductive contact disposed on the first source/drain epitaxial layer, and a second conductive contact disposed on the second source/drain epitaxial layer; a separation isolation region disposed between the first and second conductive contact; and an insulating layer disposed between the separation isolation region and the isolation insulating layer. The separation isolation region is made of a different material than the insulating layer.

Abstract: Disclosed here is a supported catalyst comprising a thermally stable core, wherein the thermally stable core comprises a metal oxide support and nickel disposed in the metal oxide support, wherein the metal oxide support comprises at least one base metal oxide and at least one transition metal oxide or rare earth metal oxide mixed with or dispersed in the base metal oxide. Optionally the supported catalyst can further comprise an electrolyte removing layer coating the thermally stable core and/or an electrolyte repelling layer coating the electrolyte removing layer, wherein the electrolyte removing layer comprises at least one metal oxide, and wherein the electrolyte repelling layer comprises at least one of graphite, metal carbide and metal nitride. Also disclosed is a molten carbonate fuel cell comprising the supported catalyst as a direct internal reforming catalyst.

Abstract: An electronic device includes an electronic display having an active area comprising a pixel. The electronic device also includes processing circuitry configured to receive image data and predict a change in threshold voltage associated with a transistor of the pixel based at least in part on the image data. Furthermore, the processing circuitry is configured to adjust the image data to generate adjusted image data based at least in part on the predicted change in threshold voltage.

Abstract: A diagnostic system for a fuel injector includes a plurality of sensors to sense vehicle data. A controller includes a fuel injector diagnostic module configured to receive the vehicle data during operation of the vehicle and to selectively identify at least one of a fuel injector with a stuck armature and a fuel injector with pintle fatigue.

Abstract: Management system for a rechargeable energy storage device in an electric vehicle and corresponding method is disclosed. The rechargeable energy storage device has one or more battery packs each having a plurality of modules with one or more respective cells. A respective module management unit is embedded in each of the plurality of modules through respective microcircuits and configured to determine one or more local parameters. A supervisory controller is configured for two-way communication with the respective module management unit. The supervisory controller is configured to receive the local parameters, determine one or more global pack parameters based in part on the local parameters and transmit the global pack parameters back to the respective management unit. The supervisory controller is configured to control operation of the rechargeable energy storage device based in part on the global pack parameters and the local parameters.

Abstract: A FinFET device structure is provided. The FinFET device structure includes a fin structure formed over a substrate, and a gate structure formed over the fin structure. The FinFET device structure includes a source/drain (S/D) structure formed over the fin structure and adjacent to the gate structure, and an S/D contact structure formed over the S/D structure and adjacent to the gate structure. The FinFET device structure also includes a protection layer formed on the S/D contact structure, and the protection layer and the S/D contact structure are made of different materials. The protection layer has a bottommost surface in direct contact with a topmost surface of the S/D contact structure.

Abstract: A semiconductor structure includes semiconductor fins disposed over a substrate, an epitaxial source/drain (S/D) feature disposed over the semiconductor fins, where a top surface portion of the epitaxial S/D feature includes two surfaces slanted downward toward each other at an angle, a silicide layer disposed conformally over the top portion of the epitaxial S/D feature, and an S/D contact disposed over the silicide layer, where a bottom portion of the S/D contact extends into the epitaxial S/D feature.

Abstract: A distributed battery power system having a battery pack and a battery controller. The battery pack has: a plurality of cells configured to generate a plurality of cell voltages; a voltage current temperature module electrically connected to the plurality of cells; and a plurality of isolation switch sets electrically connected between the plurality of cells. The battery controller is in communication with the voltage current temperature module, and operable to: send a status request to the voltage current temperature module; receive the plurality of cell voltages from the voltage current temperature module in response to the status request; determine if the plurality of cells includes one or more problem cells in response to the plurality of cell voltages; and perform an action in response to determining that the one or more problem cells are present to prevent damage to the one or more problem cells.

Abstract: A circuit board arrangement assembled by at least a first and a second circuit boards, each circuit board comprising: a portion of a circuit; and a first and a second electrical terminals to be electrically connected to a respective first and a second electrical terminals of the other circuit board of the first and the second circuit boards, so as to couple the portions of the circuit of the first and the second circuit boards, wherein the first and second electrical terminals on the circuit board are coupled with each other via the portion of the circuit on the other circuit board of the first and the second circuit boards, at least one board further comprising: a voltage suppression element (TSS1, TSS2) in the board connected across the first and second electrical terminals of the board, said voltage suppression element (TSS1, TSS2) is adapted to become conductive when a voltage thereacross reaches a threshold; characterized in that the portion of the circuit comprising at least one LED, and said LED (LED1)

Abstract: A device and system for supporting a patient or an object in an examination is provided. The supporting system may include a portion for supporting the body of a patient and/or a head supporting device. The portion for supporting the body may move in one or more directions. The head supporting device may be adjust to meet requirements of imaging when the patient or the object is supine or prone.

Abstract: A patient support apparatus includes a frame and a mattress positioned on the frame. A respiratory therapy device is coupled to the frame. The respiratory therapy device includes a blower having an inlet and an outlet, a patient interface, and a valve including a valve member that is rotatable through a first angular displacement in a first direction from a first position to a second position. The outlet of the blower is coupled to the patient interface so that positive pressure is provided to a patient's airway via the patient interface when the valve member is in the first position. The inlet of the blower is coupled to the patient interface so that negative pressure is provided to the patient's airway via the patient interface when the valve member is in the second position.

Abstract: Powerflow is managed using a method, e.g., in a powertrain system having a multi-pack rechargeable energy storage system (RESS) with parallel battery packs. Each pack has a corresponding maximum electrical (current or voltage) limit. The method includes predicting a corresponding terminal voltage for each pack using the corresponding maximum electrical limit. The method includes selecting a terminal voltage as a selected voltage based on a requested operating mode, including selecting a maximum of the terminal voltages when the requested operating mode is a discharging mode and a minimum of the same when the requested operating mode is a charging mode. A pack current through each pack is predicted using the selected voltage and a corresponding battery state space model. A total power capability of the RESS is predicted over a predetermined prediction horizon using the selected voltage, with the operating mode controlled over the prediction horizon via the controller.

Abstract: Interconnect structures and method of forming the same are disclosed herein. An exemplary interconnect structure includes a first contact feature in a first dielectric layer, a second dielectric layer over the first dielectric layer, a second contact feature over the first contact feature, a barrier layer between the second dielectric layer and the second contact feature, and a liner between the barrier layer and the second contact feature. An interface between the first contact feature and the second contact feature includes the liner but is free of the barrier layer.

Abstract: A diagnostic system for a fuel injector includes a plurality of sensors to sense vehicle data. A controller includes a fuel injector diagnostic module configured to receive the vehicle data during operation of the vehicle and to selectively identify at least one of a fuel injector with a stuck armature and a fuel injector with pintle fatigue.

Abstract: Embodiments of the present disclosure relate to a method, a device, and a computer program product for backing up data. A method for backing up data includes: receiving a request for a backup policy for a data from a user, the request indicating a desired backup period for backing up the data; obtaining backup information associated with the data; and generating, based on the desired backup period and the backup information, a backup policy for the data and satisfying a service level agreement.

Abstract: A semiconductor structure includes a fin protruding from a substrate, a first and a second metal gate stacks disposed over the fin, and a dielectric feature defining a sidewall of each of the first and the second metal gate stacks. Furthermore, the dielectric feature includes a two-layer structure, where sidewalls of the first layer are defined by the second layer, and where the first and the second layers have different compositions.

Abstract: Vias, along with methods for fabricating vias, are disclosed that exhibit reduced capacitance and resistance. An exemplary interconnect structure includes a first source/drain contact and a second source/drain contact disposed in a dielectric layer. The first source/drain contact physically contacts a first source/drain feature and the second source/drain contact physically contacts a second source/drain feature. A first via having a first via layer configuration, a second via having a second via layer configuration, and a third via having a third via layer configuration are disposed in the dielectric layer. The first via and the second via extend into and physically contact the first source/drain contact and the second source/drain contact, respectively. A first thickness of the first via and a second thickness of the second via are the same. The third via physically contacts a gate structure, which is disposed between the first source/drain contact and the second source/drain contact.

Abstract: Techniques for reducing image artifacts on a display s may include receiving image data, such that the image data includes pixel luminance data for a frame of image data. The technique may also include determining an emission duration for a pixel of the plurality of pixels during a sub-frame of the frame of image data based on the pixel luminance data. The technique may also include determining an emission duration extension to apply to the emission duration associated with the sub-frame based on a luminance baseline associated with the sub-frame, a luminance level associated with the sub-frame, and a time period associated with the sub-frame. The technique may then involve sending an emission signal to the pixel, such that the emission signal is configured to cause the pixel to emit light for a duration that correspond to the emission duration and the emission duration extension.

Abstract: A method for manufacturing a structure on a substrate includes projecting an image of a reference pattern onto a substrate having a first patterned layer, the first patterned layer including first alignment marks and first overlay measurement marks, and the reference pattern including second alignment marks and second overlay measurement marks, aligning, based on the first alignment marks and the second alignment marks, the first patterned layer to the image of the reference pattern, obtaining a pre-overlay mapping of the first overlay measurement marks and the second overlay measurement marks, and determining compensation data indicative of information of the pre-overlay mapping of the first overlay measurement marks and the second overlay measurement marks.

Abstract: A semiconductor device includes a gate structure disposed over a substrate, and a first dielectric layer disposed over the substrate, including and over the gate structure. A first metal feature is disposed in the first dielectric layer, including an upper portion having a first width and a lower portion having a second width that is different than the first width. A dielectric spacer is disposed along the lower portion of the first metal feature, wherein the upper portion of the first metal feature is disposed over the dielectric spacer. A second dielectric layer is disposed over the first dielectric layer, including over the first metal feature and a second metal feature extends through the second dielectric layer to physically contact with the first metal feature. A third metal feature extends through the second dielectric layer and the first dielectric layer to physically contact the gate structure.