Semiconductor device structure and manufacturing process thereof
A semiconductor device structure for sensing an incident light includes a substrate, a passivation layer and a wiring structure. The substrate has a device embedded therein. The passivation layer is disposed on the substrate, where the passivation layer has a first side and a second side opposite to the first side, the first side of the passivation layer includes microstructures disposed on the substrate, and the second side of the passivation layer is a continuous flat plane, wherein each of the microstructures has a cross-section in a shape of a triangle, trapezoid or arc. The wiring structure is disposed on the substrate, where the writing structure includes at least one contact and metal interconnection patterns respectively formed in different dielectric layers, and the at least one contact and the metal interconnection patterns are electrically connected, where the substrate is located between the passivation layer and the wiring structure.
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This application is a continuation application of and claims the priority benefit of a prior application Ser. No. 15/256,628, filed on Sep. 5, 2016, now allowed. The entirety of the above-mentioned patent application is hereby incorporated by reference herein and made a part of this specification.
BACKGROUNDSemiconductor image sensors are operated to sense light. Typically, the semiconductor image sensors include complementary metal-oxide-semiconductor (CMOS) image sensors (CIS) and charge-coupled device (CCD) sensors, which are widely used in various applications such as digital still camera (DSC), mobile phone camera, digital video (DV), digital video recorder (DVR), optical sensor (proximity sensor, ambient light sensor heart rate sensor, and optical sensing element (optical transceiver) applications. These semiconductor image sensors utilize single or an array of image/optical signal sensor elements, each image/optical signal sensor element including a photodiode and other elements, to absorb light and convert the sensed light into digital data or electrical signals. Thus, it is important for semiconductor image sensors to be able to have good light absorption abilities.
Aspects of the present disclosure are best understood from the following detailed description when read with the accompanying figures. It is noted that, in accordance with the standard practice in the industry, various features are not drawn to scale. In fact, the dimensions of the various features may be arbitrarily increased or reduced for clarity of discussion.
The following disclosure provides many different embodiments, or examples, for implementing different features of the provided subject matter. Specific examples of components and arrangements are described below to simplify the present disclosure. These are, of course, merely examples and are not intended to be limiting. For example, the formation of a first feature over or on a second feature in the description that follows may include embodiments in which the first and second features are formed in direct contact, and may also include embodiments in which additional features may be formed between the first and second features, such that the first and second features may not be in direct contact. In addition, the present disclosure may repeat reference numerals and/or letters in the various examples. This repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed.
Further, spatially relative terms, such as “beneath,” “below,” “lower,” “above,” “upper” and the like, may be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures. The spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. The apparatus may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein may likewise be interpreted accordingly.
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Furthermore, in some embodiments, the microstructures 130b are formed to cover substantially the whole area of the passivation layer 130. In some embodiments, the semiconductor device structure 100 may further include an array of micro lens (not shown) disposed over the microstructures 130b. In other embodiments, the microstructures 130b are formed only at certain regions or sections of the passivation layer 130. In the case that the microstructures 130b formed are only at one or more regions of the passivation layer 130, the region(s) formed with the microstructures 130b is a light sensing region with light sensing devices below the light sensing region. That is to say, the microstructures 130b are located in the light sensing region above the devices 112 (including light sensing devices) and are adapted to enhance the light absorption. In some embodiments, when the microstructures 130b are located in the light sensing regions, the micro lens (not shown) may be disposed above and adjacent to the microstructures 130b or on the microstructures 130b. In some embodiments, the layout of the wiring structure 120 or the patterns of the metal interconnection patterns 124, 126, 128 are arranged aside of the light sensing region(s) or away from the light sensing region(s) (from the top view), and are not directly above the devices 112, so as not to obstruct light from reaching the light sensing regions.
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According to some embodiments, a semiconductor device structure for sensing an incident light includes a substrate, a wiring structure, and at least one passivation layer. The substrate has a light sensing device. The at least one passivation layer is disposed above the wiring structure. The at least one passivation layer includes a plurality of microstructures disposed above the light sensing device, and each of the microstructures has a cross-section in a shape of a triangle, trapezoid or arc. The wiring structure is disposed below the at least one passivation layer.
According to some embodiments, a method for manufacturing a semiconductor device structure includes the following steps. A substrate having a device is provided. A wiring structure is formed on the substrate. A passivation layer is formed on the wiring structure. A plurality of microstructures are formed from the passivation layer, and each of the microstructures has a cross-section in a shape of a triangle, trapezoid or arc.
According to some embodiments, a method for manufacturing a semiconductor device structure includes the following steps. A substrate having a device is provided. A wiring structure is formed on the substrate. A plurality of passivation layers are formed on the wiring structure. A plurality of microstructures are formed from at least two passivation layers of the passivation layers. The microstructures formed from the at least two passivation layers are stacked on top of each other. Each of the microstructures has a cross-section in a shape of a triangle, trapezoid or arc.
According to some embodiments, a semiconductor device structure for sensing an incident light includes a substrate, a passivation layer and a wiring structure. The substrate has a device embedded therein. The passivation layer is disposed on the substrate, wherein the passivation layer has a first side and a second side opposite to the first side, the first side of the passivation layer includes a plurality of microstructures disposed on the substrate, and the second side of the passivation layer is a continuous flat plane, wherein each of the microstructures has a cross-section in a shape of a triangle, trapezoid or arc. The wiring structure is disposed on the substrate, wherein the writing structure includes at least one contact and metal interconnection patterns respectively formed in different dielectric layers, and the at least one contact and the metal interconnection patterns are electrically connected, wherein the substrate is located between the passivation layer and the wiring structure.
According to some embodiments, a semiconductor device structure for sensing an incident light includes a substrate, a passivation layer and a wiring structure. The substrate has at least one light sensing region with a light sensing device formed therein. The passivation layer is disposed on the substrate, wherein a first side of the passivation layer includes a plurality of microstructures covering the substrate and overlapped with the at least one light sensing region, and a second side of the passivation layer is a continuous flat plane, wherein the first side is opposite to the second side, and each of the microstructures has a cross-section in a shape of a triangle, trapezoid or arc. The wiring structure is disposed on the substrate, wherein the writing structure includes at least one contact and metal interconnection patterns respectively formed in different dielectric layers, and the at least one contact and the metal interconnection patterns are electrically connected, wherein the substrate is located between the passivation layer and the wiring structure.
According to some embodiments, a method for manufacturing a semiconductor device structure includes the following steps, providing a substrate having a device embedded therein; forming a wiring structure comprising at least one contact and metal interconnection patterns respectively formed in different dielectric layers on the substrate, wherein the at least one contact and the metal interconnection patterns are electrically connected; and forming a passivation layer having microstructures on the substrate, a first side of the passivation layer comprising the microstructures, a second side of the passivation layer being a continuous flat plane and opposite to the first side, wherein each of the microstructures has a cross-section in a shape of a triangle, trapezoid or arc, and the substrate is located between the passivation layer and the wiring structure.
The foregoing outlines features of several embodiments so that those skilled in the art may better understand the aspects of the present disclosure. Those skilled in the art should appreciate that they may readily use the present disclosure as a basis for designing or modifying other processes and structures for carrying out the same purposes and/or achieving the same advantages of the embodiments introduced herein. Those skilled in the art should also realize that such equivalent constructions do not depart from the spirit and scope of the present disclosure, and that they may make various changes, substitutions, and alterations herein without departing from the spirit and scope of the present disclosure.
Claims
1. A semiconductor device structure for sensing an incident light, comprising:
- a substrate having a device embedded therein;
- a passivation layer, disposed on the substrate, wherein the passivation layer has a first side and a second side opposite to the first side, the first side of the passivation layer comprises a plurality of microstructures disposed on the substrate, and the second side of the passivation layer is a continuous flat plane, wherein each of the microstructures has a cross-section in a shape of a triangle, trapezoid or arc;
- an additional passivation layer, disposed on the substrate, wherein the passivation layer is sandwiched between the substrate and the additional passivation layer, wherein the additional passivation layer has a third side and a fourth side opposite to the third side, the third side is sandwiched between the second side and the fourth side, the second side is sandwiched between the first side and the third side, and the fourth side is a continuous flat plane; and
- a wiring structure, disposed on the substrate, wherein the writing structure comprises at least one contact and metal interconnection patterns respectively formed in different dielectric layers, and the at least one contact and the metal interconnection patterns are electrically connected, wherein the substrate is located between the passivation layer and the wiring structure.
2. The semiconductor device structure as claimed in claim 1, wherein the at least one contact is electrically connected to the device.
3. The semiconductor device structure as claimed in claim 1, wherein the passivation layer includes a plurality of passivation layers, at least two passivation layers of the plurality of passivation layers have the microstructures, and the microstructures of the at least two passivation layers are stacked on top of each other.
4. The semiconductor device structure as claimed in claim 3, wherein the plurality of passivation layers are stacked in a stacking direction, and the microstructures of the at least two passivation layers are aligned with each other in the stacking direction.
5. The semiconductor device structure as claimed in claim 3, wherein the plurality of passivation layers are stacked in a stacking direction, and the microstructures of the at least two passivation layers are alternately aligned with each other in the stacking direction, wherein a convex portion of the microstructure of one of the at least two passivation layers is aligned with a concave portion of the microstructure of other one of the at least two passivation layers.
6. The semiconductor device structure as claimed in claim 1, further comprising:
- an antireflective layer, coated on the passivation layer and overlapped with the microstructures.
7. The semiconductor device structure as claimed in claim 1, wherein at least one of the microstructures has a height of greater than λ/2.5, and a pitch between any two most adjacent ones of the microstructures is greater than λ/2, and λ represents a wavelength of the incident light.
8. The semiconductor device structure as claimed in claim 1, wherein the device comprises a pixel, a single-photon avalanche diode, a photo diode, a photo transistor, a time of flight camera, a photo gate, a pinned photo diode, or a combination thereof.
9. The semiconductor device structure as claimed in claim 1, wherein the microstructures are comprised in at least one region of the first side overlapped with the device.
10. The semiconductor device structure as claimed in claim 1, further comprising:
- micro lens, arranged into an array and on the microstructures of the passivation layer.
11. A semiconductor device structure for sensing an incident light, comprising:
- a substrate having at least one light sensing region with a light sensing device formed therein;
- a passivation layer, disposed on the substrate, wherein a first side of the passivation layer comprises a plurality of microstructures covering the substrate and overlapped with the at least one light sensing region, and a second side of the passivation layer is a continuous flat plane, wherein the first side is opposite to the second side, and each of the microstructures has a cross-section in a shape of a triangle, trapezoid or arc;
- an additional passivation layer, disposed on the substrate, wherein the passivation layer is sandwiched between the substrate and the additional passivation layer, wherein the additional passivation layer has a third side and a fourth side opposite to the third side, the third side is sandwiched between the second side and the fourth side, the second side is sandwiched between the first side and the third side, and the fourth side is a continuous flat plane; and
- a wiring structure, disposed on the substrate, wherein the writing structure comprises at least one contact and metal interconnection patterns respectively formed in different dielectric layers, and the at least one contact and the metal interconnection patterns are electrically connected, wherein the substrate is located between the passivation layer and the wiring structure.
12. The semiconductor device structure as claimed in claim 11, wherein the at least one contact is electrically connected to the light sensing device.
13. The semiconductor device structure as claimed in claim 11, wherein at least one of the microstructures has a height of greater than λ/2.5, and a pitch between any two most adjacent ones of the microstructures is greater than λ/2, and λ represents a wavelength of the incident light.
14. A method for manufacturing a semiconductor device structure, comprising:
- providing a substrate having a device embedded therein;
- forming a wiring structure comprising at least one contact and metal interconnection patterns respectively formed in different dielectric layers on the substrate, wherein the at least one contact and the metal interconnection patterns are electrically connected;
- forming a passivation layer having microstructures on the substrate, a first side of the passivation layer comprising the microstructures, a second side of the passivation layer being a continuous flat plane and opposite to the first side, wherein each of the microstructures has a cross-section in a shape of a triangle, trapezoid or arc, and the substrate is located between the passivation layer and the wiring structure; and
- forming an additional passivation layer over the passivation layer, a third side of the additional passivation layer being sandwiched between the second side of the passivation layer and a fourth side of the additional passivation layer, the second side of the passivation layer being sandwiched between the first side of the passivation layer and the third side of the additional passivation layer, the fourth side being a continuous flat plane and opposite to the third side, wherein the passivation layer is sandwiched between the substrate and the additional passivation layer.
15. The method as claimed in claim 14, wherein the step of forming the passivation layer having the microstructures comprises forming a plurality of passivation layers each having the microstructures.
16. The method as claimed in claim 15, wherein the plurality of the passivation layers are formed to stack on each other, where the microstructures of the passivation layers are formed to be aligned with each other in a stacking direction of the passivation layers, and a convex portion of each microstructure of one passivation layer is aligned with a convex portion of each microstructure of an immediately overlying or underlying one of the passivation layers while a concave portion of each microstructure of one passivation layer is aligned with a concave portion of each microstructure of an immediately overlying or underlying one of the passivation layers.
17. The method as claimed in claim 15, wherein the plurality of the passivation layers are formed to stack on each other, where the microstructures of the passivation layers are formed to be alternately aligned with each other in a stacking direction of the passivation layers, and a convex portion of each microstructure of one passivation layer is aligned with a concave portion of each microstructure of an immediately overlying or underlying one of the passivation layers.
18. The method as claimed in claim 14, further comprising:
- coating an antireflective layer on the passivation layer and overlapped with the microstructures.
19. The method as claimed in claim 14, wherein the step of forming the passivation layer having the microstructures comprises at least performing a photolithography process and an etching process.
20. The method as claimed in claim 14, wherein the step of forming the passivation layer having the microstructures comprises forming the microstructures at the first side of the passivation layer over a light sensing region, wherein the device is a light sensing device located within the light sensing region.
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Type: Grant
Filed: Oct 8, 2019
Date of Patent: Jan 18, 2022
Patent Publication Number: 20200052025
Assignee: Taiwan Semiconductor Manufacturing Company, Ltd. (Hsinchu)
Inventors: Yi-Ping Pan (Taipei), Hung-Jen Hsu (Taoyuan)
Primary Examiner: Marcos D. Pizarro
Assistant Examiner: Sue Tang
Application Number: 16/595,502
International Classification: H01L 27/146 (20060101);