METHODS OF MANUFACTURING SEMICONDUCTOR STRUCTURES
A method of manufacturing semiconductor structures is disclosed. In one embodiment, a first mask is provided above a substrate. The first mask includes first mask lines extending along a first axis. A second mask is provided above the first mask. The second mask includes second mask lines extending along a second axis that intersects the first axis. At least one of the first and second masks is formed by a pitch fragmentation method. Structures may be formed in the substrate, wherein the first and the second mask are effective as a combined mask. The structures may be equally spaced at a pitch in the range of a minimum lithographic feature size for repetitive line structures.
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Forming integrated circuits on a semiconductor substrate includes photolithographic patterning processes. The semiconductor substrate is coated with a photoresist material that is sensitive to an exposure radiation. The exposure radiation such as an ultraviolet ray, an electron beam or a X-ray is irradiated onto the photoresist layer for example through a mask or a reticle, wherein the photoresist layer is selectively exposed to the exposure radiation. After exposure, the film is developed to form a photoresist pattern in accordance with or contrary to the mask pattern. The photoresist pattern may be used as an etching mask in the following.
Resolution enhanced techniques (RETs) improve the resolution of optical lithographic systems. For example, evenly spaced parallel line structures may be formed at a pitch that is smaller than a pitch that corresponds to the nominal resolution limit of the lithographic system. In the following, “F” corresponds to a minimum lithographic feature size describing the half pitch of the lines in the densest line field that can be achieved through common RETs. “F” may be in the range of 20 to 140 nanometers. Pitch-fragmentation methods may allow to half the pitch in a dense line field such that, for example, the gate, supply, and data lines of sensor or memory cell arrays may be arranged at a pitch of F.
A need exists for a further shrinkage of the minimum pitch of dot-shaped semiconductor structures, for example buried structures, in two-dimensional arrays and one-dimensional chains of dot-shaped structures.
SUMMARYA method of manufacturing semiconductor structures is disclosed. In one embodiment, a first mask is provided above a substrate. The first mask includes first mask lines extending along a first axis. A second mask is provided above the first mask. The second mask includes second mask lines extending along a second axis that intersects the first axis. At least one of the first and second masks is formed by a pitch fragmentation method. Structures may be formed in the substrate, wherein the first and the second mask are effective as a combined mask. The structures may be equally spaced at a pitch in the range of a minimum lithographic feature size for repetitive line structures.
The accompanying drawings are included to provide a further understanding of the present invention and are incorporated in and constitute a part of this specification. The drawings illustrate the embodiments of the present invention and together with the description serve to explain the principles of the invention. Other embodiments of the present invention and many of the intended advantages of the present invention will be readily appreciated as they become better understood by reference to the following detailed description. The elements of the drawings are not necessarily to scale relative to each other. Like reference numerals designate corresponding similar parts.
In the following Detailed Description, reference is made to the accompanying drawings, which form a part hereof, and in which is shown by way of illustration specific embodiments in which the invention may be practiced. In this regard, directional terminology, such as “top,” “bottom,” “front,” “back,” “leading,” “trailing,” etc., is used with reference to the orientation of the Figure(s) being described. Because components of embodiments of the present invention can be positioned in a number of different orientations, the directional terminology is used for purposes of illustration and is in no way limiting. It is to be understood that other embodiments may be utilized and structural or logical changes may be made without departing from the scope of the present invention. The following detailed description, therefore, is not to be taken in a limiting sense, and the scope of the present invention is defined by the appended claims.
An embodiment of the invention refers to a method of manufacturing semiconductor structures. A first mask is provided above a substrate. The first mask includes first mask lines extending along a first axis. A second mask is provided above the first mask. The second mask includes second mask lines extending along a second axis that intersects the first axis. At least one of the first and second masks is formed by a pitch fragmentation method. Structures are formed in the substrate, wherein the first and the second mask are effective as a combined mask. The structures may be buried structures, for example contacts or impurity regions that are embedded in a mold layer
Referring to
The template patterns 118 may be template openings 114 that appear to be separated in X-section by line-shaped portions of the sacrificial mask material that appear to form sacrificial lines 111. The sacrificial lines 111 here and in the following may be part of a sacrificial pattern that includes also further portions between the sacrificial lines 111, wherein the further portions confine the template openings 114 along the first axis. A sacrificial line 111 may then be a short bar between neighboring template openings 114, by way of example.
Sidewall spacers may be formed along vertical sidewalls of the sacrificial lines 111. Sections of the sidewall spacers that extend along the first axis form first mask lines 112. Sections of the sidewall spacers that extend along the second axis form transverse mask lines. The sidewall spacers may be formed by conformal deposition of, for example, silicon nitride and a following anisotropic etch during which horizontal sections of the silicon nitride liner are removed. During or after the spacer etch, exposed sections of the intermediate layer 105 may be removed to expose sections of the substrate 100. The thickness of the sidewall spacers may be selected such that a template width tlw along a second axis 102, which may be perpendicular to the first axis 101, is essentially equal to the width of the sacrificial lines 111. According to other exemplary embodiments, the sidewall spacers may be thinner than the sacrificial lines 111 such that the final contact holes or trenches are wider than their half pitch.
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The sacrificial mask material, the sidewall spacer material and the material of the underlayer are selected such that they may be etched selectively against each other. A first material is etched selectively against a second material if they are etched at different etch rates, when they are exposed to the same etch chemistry. The sacrificial mask material may be amorphous silicon, silicon oxide or silicon nitride, the spacer material silicon nitride or silicon oxide and the underlayer material silicon oxynitride or amorphous silicon, by way of example.
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A first dimension trl of the contact openings 164 along the second axis 142 and a second dimension, which corresponds to a trim width trw in the meaning as discussed above and which extends along the first axis 141, may be selected to be essentially equal to the template width tlw and template length tll respectively. The distance between the second openings 176 and the neighboring first openings 174 may differ due to an overlay tolerance between the first 150 and the second mask 160. Even at a large overlay displacement, the first and the second openings 174, 176 will remain separated by the first mask lines 112 as the etch of the sacrificial lines 151 is selective to the material of the first mask lines 152. In this way, the formation of semi-dense contacts may be simplified or may be easily combined with the formation of dense contacts.
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The dimensions of the second openings 176 are defined by the second mask solely. In order to adjust their size to that of the first openings 174 and to achieve the same dimensions for the first and the second openings 174, 176, the contact openings 164 may be formed using another etch chemistry as used for the template openings 154. According to another embodiment, the contact openings 164 may be printed larger than required and then narrowed by a suitable process step, for example by a reflow step or a relax step, to match their dimensions to those of the template openings 154. Alternatively the contact openings 164 can have a larger target than the template openings 154. According to another embodiment, the trim patterning regarding the contact openings 164 may be applied after a removal of the sacrificial lines 151 or even after etching the intermediate layer 145. In a further alternative, the contact openings 164 may be printed and etched before the formation of the sidewall spacers such that the sidewalls spacers are fabricated both on the edges of the template openings 154 and the contact openings 164 in the same step. Further, together with the contact openings 164, other patterns may be printed, too, as well as, together with the template openings 154, other patterns may be printed, too.
A first mask 210 is provided above the substrate 200. For this purpose, a sacrificial material may be deposited on the patterned surface substrate 200 or on the intermediate layer 205. Using a photolithographic technique, template patterns 218 may be formed from the sacrificial material. The template patterns 218 may be template mesas covering sections of the intermediate layer 205 or the substrate 200. The template patterns 218 may have a template length tll along the first axis 201 and a template width tlw along a second axis 202, which is perpendicular to the first axis 201. The shape of the template mesas may be rectangular with rounded corners, stripe-shaped, circular, elliptic or oval. Sidewall spacers are provided on vertical sidewalls of the template mesas.
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By etching sections of the sacrificial lines 251 exposed by the trim opening 268, corresponding sections of the intermediate layer 245 are exposed. The combined pattern of the first and second mask lines 252, 260 is transferred into the intermediate layer 245. Remaining portions of the second mask 260, the sacrificial lines 251 and the first mask lines 252 are removed to provide an intermediate mask 270 as illustrated in
The intermediate mask 270 includes first openings 274 resulting from the template openings 258 and second openings 276 resulting from sections of the sacrificial lines 251 that are exposed by the trim opening 268. The length along the first axis 241 of contacts resulting from the first openings 274 is defined by the template length tll, while the length of contacts resulting from the second openings 276 is defined by the trim width trw. If the edges of the trim opening 268 are adjusted to the centre of the transverse mask lines and if the maximum permissible mask displacement is smaller than one half the thickness of the transverse mask lines, the length of the contacts results from the template length tll and depends from one single lithographic step only.
Second mask lines 322 may be provided as illustrated in
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The intermediate mask 330 includes first openings 334 and second openings 336, wherein the end of the contact chain is well defined and wherein along the second axis 302 an overlay tolerance between the first and the second mask in the range of the thickness of the sidewall spacers is permissible.
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A contact chain having first contacts arranged along a first row and second contacts arranged along a second row may be provided in this way. The arrangement in two staggered rows may relax the overlay requirements regarding a further lithographic mask for patterning buried line structures connecting the first and second contacts.
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The result of the chemical-mechanical polishing step is illustrated in
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The resulting structure is illustrated in
As the etch may be selective against the material of the word lines, even the word lines neighboring the exposed insulator lines 607 remain unaffected as illustrated in
Although specific embodiments have been illustrated and described herein, it will be appreciated by those of ordinary skill in the art that a variety of alternate and/or equivalent implementations may be substituted for the specific embodiments shown and described without departing from the scope of the present invention. This application is intended to cover any adaptations or variations of the specific embodiments discussed herein. Therefore, it is intended that this invention be limited only by the claims and the equivalents thereof.
Claims
1. A method of manufacturing semiconductor structures, comprising:
- providing a first mask above a substrate, the first mask comprising first mask lines extending along a first axis;
- providing a second mask above the first mask, the second mask comprising second mask lines extending along a second axis intersecting the first axis, wherein at least one of the first and second mask is formed by a pitch fragmentation method; and
- forming structures in the substrate using the first and the second mask as a combined mask.
2. The method of claim 1, wherein forming structures comprises forming trenches in the substrate using the first and the second mask as a combined etch mask.
3. The method of claim 1, wherein providing the first mask comprises:
- providing first sacrificial lines of a sacrificial material, the first sacrificial lines extending along the first axis; and
- providing sidewall spacers on vertical sidewalls of the first sacrificial lines, the sidewall spacers forming the first mask lines.
4. The method of claim 3, wherein the first sacrificial lines are removed in sections exposed by the second mask before forming the structures.
5. The method of claim 3, wherein the first mask comprises template patterns arranged in a template row along the second axis, each template pattern being confined by two of the first mask lines on opposing first sides and by two transverse mask lines extending along the second axis on opposing second sides, wherein the second axis is perpendicular to the first axis; and
- the second mask comprises a trim opening above the template row, the trim opening exposing at least sections of the first mask lines.
6. The method of claim 5, wherein each template pattern is a template opening exposing a section of the substrate.
7. The method of claim 5, wherein each template pattern is a template mesa covering a section of the substrate.
8. The method of claim 5, wherein a template length of the template pattern along the first axis exceeds a trim width of the trim opening along the first axis by at least 5 percent; and
- the trim opening exposes sections of the first sacrificial lines between the first mask lines, wherein the trim width determines a length of the structures along the first axis.
9. The method of claim 6, wherein a trim width of the trim opening along the first axis exceeds a template length of the template pattern along the first axis by at least 5 percent; and
- the trim opening exposes sections of the first sacrificial lines between the first mask lines, wherein the template length determines a length of structures assigned to the template openings and the trim width determines a length of the structures formed between the template patterns, the lengths defined along the first axis.
10. The method of claim 6, wherein a trim width of the trim opening along the first axis varies between a first trim width above the template patterns and a second trim width between the template patterns, wherein the first trim width exceeds a template length of the template pattern along the first axis and the second trim width is essentially equal to the template length; and
- the trim opening exposes sections of the first sacrificial lines between the first mask lines, wherein the template length determines a length of structures resulting from the template openings and the second trim width determines a minimum length of structures formed between the template patterns, the lengths defined along the first axis.
11. The method of claim 3, wherein the first mask comprises template patterns arranged in a template row along the second axis, each template pattern being confined by two of the first mask lines on opposing first sides and by two transverse mask lines extending along the second axis on opposing second sides, wherein the second axis is perpendicular to the first axis; and
- the second mask comprises a plurality of trim openings arranged along the template row, each trim opening exposing a section of one of the first sacrificial lines between the first mask lines.
12. The method of claim 11, wherein the trim openings have a trim width along the first axis and a trim length along the second axis, the trim width being essentially equal to a template length of the template pattern along the first axis and the trim length being essentially equal to a template width of the template pattern along the second axis.
13. The method of claim 2, further comprising:
- providing an intermediate layer on the substrate before providing the first mask, wherein forming trenches in the substrate comprises:
- patterning the intermediate layer using the first and the second mask as a combined etch mask to form an intermediate mask from the intermediate layer;
- removing residual portions of the first and second masks; and
- forming the trenches in the substrate using the intermediate mask as an etch mask.
14. The method of claim 1, further comprising:
- filling the first mask with a fill material before providing the second mask.
15. The method of claim 1, wherein providing the second mask comprises:
- providing second sacrificial lines of a sacrificial material above the substrate; and
- providing sidewall spacers on vertical sidewalls of the second sacrificial lines to form the second mask lines.
16. The method of claim 1, wherein providing the first mask comprises:
- providing first template lines extending along the first axis above the substrate;
- providing sacrificial sidewall spacers of a sacrificial material on vertical sidewalls of the first template lines; and
- providing the first mask lines between the sacrificial sidewall spacers.
17. The method of claim 14, wherein providing the second mask comprises:
- providing second template lines extending along the second axis above the first mask;
- providing sacrificial sidewall spacers of a sacrificial material on vertical sidewalls of the second template lines; and
- providing the second mask lines between the sacrificial sidewall spacers.
18. The method of claim 17, wherein the sacrificial material and the fill material are selectively etchable against the first and second mask lines.
19. The method of one claims 17, wherein the sacrificial material is the same as the fill material.
20. The method of claim 1, wherein providing the second mask comprises:
- overfilling the first line mask such that portions of the fill material cover the first line mask; and
- planarizing the fill material.
21. The method of claim 20, wherein the step of planarizing stops below an upper edge of the first mask lines.
22. The method of claim 1, wherein the second axis intersects the first axis at an angle of 20 to 25 degree.
23. A method of manufacturing contact structures, comprising:
- providing a first mask above a substrate using a pitch fragmentation method, the first mask comprising sections forming first mask lines extending along a first axis;
- providing a second mask above the first mask, the second mask comprising second mask lines extending along a second axis intersecting the first axis;
- forming trenches in the substrate using the first and the second mask as a combined etch mask; and
- providing contact structures within the trenches.
24. The method of claim 23, wherein providing the first mask includes:
- providing sacrificial lines of a sacrificial material, the sacrificial lines extending along the first axis; and
- providing sidewall spacers on vertical sidewalls of the sacrificial lines, the sidewall spacers forming the first mask lines.
25. The method of claim 24, wherein the sacrificial lines are removed in sections exposed by the second mask before etching the trenches.
26. The method of claim 23, wherein the first mask comprises template patterns arranged in a template row along the second axis, each template pattern being confined by two of the first mask lines on opposing first sides and two transverse mask lines extending along the second axis on opposing second sides, wherein the second axis is perpendicular to the first axis; and
- the second mask comprises a trim opening extending above the template row, the trim opening exposing at least sections of the first mask lines.
27. The method of claim 26, wherein each template pattern is a template opening exposing a section of the substrate.
28. The method of claim 26, wherein each template pattern is a template mesa covering a section of the substrate.
29. The method of claim 26, wherein the edges of the trim opening are disposed above one of the transverse mask lines respectively; and
- the trim opening exposes sections of the first sacrificial lines between the first mask lines, wherein a template length between opposing transverse mask lines defines a length of contact structures resulting from the template patterns.
30. The method of claim 27, wherein a template length between opposing transverse mask lines exceeds a trim width of the trim opening along the first axis;
- the trim opening exposes sections of the sacrificial lines between the first mask lines; and
- the trim width determines a length of the contact structures along the first axis.
31. The method of claim 27, wherein a trim width of the trim opening along the first axis varies between a first trim width above the template openings and a second trim width between the template openings, wherein the first trim width exceeds a template length between the transverse mask lines and the second trim width is essentially equal to the template length; and
- the trim opening exposes sections of the sacrificial lines between the first mask lines such that the template length determines a length of contact structures resulting from the template openings and the second trim width determines a minimum length of contact structures formed between the template patterns, the lengths defined in each case along the first axis.
32. The method of claim 23, wherein the first mask comprises template openings arranged in a template row along the second axis, each template pattern being confined by two of the first mask lines on opposing sides, wherein the second axis is perpendicular to the first axis; and
- the second mask comprises trim openings arranged along the template row, each trim opening exposing a section of one of the sacrificial mask between the first mask lines.
33. The method of claim 32, wherein the trim openings have a trim width along the first axis and a trim length along the second axis, the trim width being essentially equal to a template length of the template openings along the first axis and the trim length being essentially equal to a template width of the template openings along the second axis.
34. The method of claim 1, further comprising:
- providing an intermediate layer on the substrate before providing the first mask, wherein forming trenches in the substrate comprises:
- patterning the intermediate layer using the first and the second mask as a combined etch mask to form an intermediate mask from the intermediate layer;
- removing residual portions of the first and second masks; and
- forming the trenches in the substrate using the intermediate mask as an etch mask.
35. A hard mask arrangement comprising:
- a first mask comprising first mask lines extending along a first axis and being evenly spaced at a pitch of less than 2*F, wherein F is equivalent to a minimum lithographic feature size for evenly spaced lines structures; and
- a second mask comprising evenly spaced second mask lines extending along a second axis intersecting the first axis and being evenly spaced at a pitch of 2*F or smaller.
36. The hard mask arrangement of claim 35, further comprising first sacrificial lines of a sacrificial material, each first sacrificial line filling a space between first mask lines being assigned to a pair of neighboring first mask lines.
37. The hard mask arrangement of claim 35, further comprising fill lines of a fill material, each fill line filling a space between neighboring pairs of first mask lines.
38. The hard mask arrangement of claim 35, further comprising a fill layer of a fill material between the first and the second mask.
39. A hard mask arrangement comprising:
- a first mask including evenly spaced template patterns arranged in a template row, each template pattern being confined by two first mask lines extending along a first axis on opposing first sides and two transverse mask lines extending along a second axis on opposing second sides, the template row extending along the second axis; and
- a second mask comprising a trim opening extending above the template row and exposing at least sections of the first mask lines.
40. The hard mask arrangement of claim 39, wherein the first mask lines are evenly spaced at a pitch of less than 2*F, wherein F is equivalent to a minimum lithographic feature size for evenly spaced lines structures.
41. An integrated circuit including a memory cell array comprising:
- evenly spaced rows of evenly spaced capacitors, wherein the rows are alternatingly shifted one half a capacitor pitch within the rows, wherein the capacitor pitch is smaller than 2*F, F being equivalent to a minimum lithographic feature size for evenly spaced lines.
42. The integrated circuit of claim 41, wherein each capacitor includes a storage electrode, which cross-section in a matrix plane is rhomb-shaped.
43. An electronic system including a memory cell array comprising:
- evenly spaced rows of evenly spaced capacitors, wherein the rows are alternatingly shifted one half a capacitor pitch within the rows, wherein the capacitor pitch is smaller than 2*F and wherein F is equivalent to a minimum lithographic feature size for evenly spaced lines.
44. The electronic system of claim 43, wherein the electronic system is an audio system, a video system, a computer system, a game console, a communication system, a cell phone, a data storage system, a data storage module, a graphic card or a portable storage device comprising an interface to a computer system, an audio system, a video system, a game console or a data storage system.
Type: Application
Filed: Feb 20, 2007
Publication Date: Aug 21, 2008
Patent Grant number: 7867912
Applicant: QIMONDA AG (Muenchen)
Inventors: Dirk Caspary (Dresden), Arnd Scholz (Dresden), Stefano Parascandola (Dresden), Christoph Noelscher (Nurnberg)
Application Number: 11/676,635
International Classification: H01L 29/94 (20060101); G03F 1/00 (20060101); H01L 21/311 (20060101); H01L 27/108 (20060101);