SOLUTION-ASSISTED CARBON NANOTUBE PLACEMENT WITH GRAPHENE ELECTRODES
A semiconductor device includes a substrate having at least one electrically insulating portion. A first graphene electrode is formed on a surface of the substrate such that the electrically insulating portion is interposed between a bulk portion of the substrate and the first graphene electrode. A second graphene electrode formed on the surface of the substrate. The electrically insulating portion of the substrate is interposed between the bulk portion of the substrate and the second graphene electrode. The second graphene electrode is disposed opposite the first graphene electrode to define an exposed substrate area therebetween.
The present invention relates to carbon nanotubes, and more specifically, to a method of depositing carbon nanotubes on a substrate.
Nanotechnology, such as carbon nanotube (CNT) technology, has proven to be effective in addressing the ongoing trend of reducing the size of semiconductor devices. In particular, nanotube-based transistors, also known as carbon nanotube field-effect transistors (CNTFETs), are capable of digital switching. Various CNT placement techniques have been developed for depositing carbon nanotubes on a substrate to form the nanotube-based transistor. These CNT deposition techniques rely on substrate patterning, chemical surface functionalization, Langmuir-Blodgett-type techniques, or a combination thereof. However, the traditional CNT deposition techniques offer little control over the position, orientation, and density of the carbon nanotubes.
Another known technique for depositing carbon nanotubes on a substrate is based on dielectrophoresis, also known as the electric-field method. The conventional electric-field method requires the presence of metallic electrodes to induce an electric field at a desired location at which to dispose the carbon nanotubes. The presence of the metallic electrodes, however, deteriorates the functionality and performance of semiconductor devices after placement of the carbon nanotubes is complete. Further, maintaining embedded metal electrodes in the substrate prevents reducing the overall size of the semiconductor device.
SUMMARYAccording to an embodiment, a method of forming carbon nanotubes on a substrate includes forming a pair of graphene electrodes on a surface of the substrate. The pair of graphene electrodes includes a first graphene electrode and a second graphene electrode disposed opposite the first graphene electrode. The first and second graphene electrodes are separated from one another by an exposed portion of the substrate. The method further includes depositing a solution containing at least one carbon nanotube on the surface of the substrate. The solution covers the first and second graphene electrodes;. The method further includes generating an electric field across the first and second graphene electrodes. The electric field forces the carbon nanotubes to the exposed portion of the substrate and aligns the at least one carbon nanotube between the first and second graphene electrodes in a direction parallel with the electric field.
According to another embodiment, a semiconductor device includes a substrate having at least one electrically insulating portion. A first graphene electrode is formed on a surface of the substrate such that the electrically insulating portion is interposed between a bulk portion of the substrate and the first graphene electrode. A second graphene electrode formed on the surface of the substrate. The electrically insulating portion of the substrate is interposed between the bulk portion of the substrate and the second graphene electrode. The second graphene electrode is disposed opposite the first graphene electrode to define an exposed substrate area therebetween.
According to still another embodiment, a semiconductor device comprises a substrate wafer configured to insulate electrical current from flowing therethrough. A graphene electrode network includes first and second electrode branches separated from one another by an exposed portion of the substrate wafer. The first and second electrode branches extend along the substrate in direction parallel to one another. The first electrode branch is configured to receive a voltage source and the second electrode branch is configured to receive a ground source. A plurality of carbon nanotube arrays are arranged between the first and second electrode branches. The plurality of carbon nanotube arrays includes a plurality of individual carbon nanotubes. The carbon nanotubes are aligned perpendicular to the first and second electrode branches in response to an electric field generated by applying the voltage and ground sources.
Additional features are realized through the techniques of the present disclosure. Various embodiments are described in detail herein and are considered a part of the claimed invention. For a better understanding of the invention and the features of the various embodiments, refer to the description and to the drawings.
The subject matter of the inventive concept is particularly pointed out and distinctly claimed in the claims at the conclusion of the specification. The forgoing and other features of the embodiments are apparent from the following detailed description taken in conjunction with the accompanying drawings.
With reference now to
Referring now to
The graphene layer 104 may be categorized as a semi-metal. That is, although graphene is not a metal, the graphene layer 104 still provides metal-like characteristics, such as electrical conductivity properties comparable to metal. Various methods may be used to form the graphene layer 104 including, but not limited to, diffusion-assisted synthesis, or epitaxially growing the graphene layer 104 on the substrate 102. The graphene layer 104 may be grown as a single graphene layer 104 having a thickness of about 0.34 nm. In another embodiment, the graphene layer 104 may be grown as a plurality of stacked graphene layers 104, each layer having a thickness of about 0.34 nm.
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According to a first embodiment, for example, the masking pattern may be a saw-tooth pattern as illustrated in
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The exposed substrate 102 defines the carbon nanotube location area 116 having a width that extends between the graphene electrodes 118,120, as discussed in greater detail below. The width of the location area 116, i.e., the distance between opposing graphene electrodes 118, 120, may range from about 1 μm to about 1 nm. The graphene electrodes 118, 120 may be patterned according to the graphene and masking-layer etching processes described above. If the saw-tooth masking layer pattern is used, for example, first and second opposing saw-tooth shaped graphene electrodes 118, 120 may be formed as illustrated in
Turning to
With reference now to
More specifically, the carbon nanotubes inherently align in a direction parallel to the direction of the electric field 130 extending between the first and second graphene electrodes 118, 120. Accordingly, a first end of the carbon nanotubes 124 is disposed adjacent the first graphene electrode 118 and the opposing end of the carbon nanotube is disposed adjacent the second graphene electrode 120. It is appreciated that the carbon nanotubes 124 may be aligned without requiring physical contact with the first and second graphene electrodes 118, 120. That is, the carbon nanotubes 124 may be aligned with the first and second graphene electrodes 118, 120 exclusively using the electric field 130 without requiring direct contact with the graphene electrodes 118, 120.
The pattern of the graphene electrodes 118, 120 may also determine the arrangement of the carbon nanotubes 124, thereby allowing for predefined arrangement of carbon nanotube arrays 124 on the substrate 102. Supposing that the graphene electrodes have a saw-tooth pattern, as illustrated in
Turning now to
After the auxiliary mask 132 is formed to protect the carbon nanotubes 124, the graphene electrodes 118, 120 are removed from the substrate 102 as illustrated in
Turning now to
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A solution containing randomly arranged carbon nanotubes is deposited on the substrate to cover the graphene electrodes at operation 510. At operation 512, a voltage source is electrically connected to a first graphene electrode and a ground source is electrically connected to the opposing second graphene electrode. In response to connecting the voltage and ground sources, an electric field is induced between the opposing graphene electrodes. At operation 514, the carbon nanotubes are induced into alignment between the opposing graphene electrodes via the electric field. After the carbon nanotubes are aligned, the graphene electrodes are removed from the substrate at operation 516, and the method ends. It is appreciated that a mask may be formed over the carbon nanotubes to protect the nanotubes during removal of the graphene electrodes. The graphene electrodes may be removed using an oxygen plasma etching process, and the mask may be removed using an acetone wash. Accordingly, the carbon nanotubes are left remaining on the substrate according to a predefined arrangement and alignment such that the semiconductor device may be further utilized in a subsequent process flow, for example, subsequent transistor fabrication.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the singular forms “a”, “an” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms “comprises” and/or “comprising,” when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one more other features, integers, steps, operations, element components, and/or groups thereof.
The corresponding structures, materials, acts, and equivalents of all means or step plus function elements in the claims below are intended to include any structure, material, or act for performing the function in combination with other claimed elements as specifically claimed. The description of the various embodiments has been presented for purposes of illustration and description, but is not intended to be exhaustive or limited to the invention in the form disclosed. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the claims. Various embodiments were chosen and described in order to best explain the principles of the inventive concept and the practical application, and to enable others of ordinary skill in the art to understand various embodiments with various modifications as are suited to the particular use contemplated
The flow diagrams depicted herein are just one example. There may be many variations to this diagram or operations described therein without departing from the scope of the claims. For instance, operations may be performed in a differing order, added, deleted or modified. All of these variations are considered a part of the claimed invention.
While the preferred embodiment to the invention had been described, it will be understood that those skilled in the art, both now and in the future, may make various modifications which fall within the scope of the following claims. These claims should be construed to maintain the proper protection for the invention first described.
Claims
1. A method of forming carbon nanotubes on a substrate, the method comprising:
- forming a pair of graphene electrodes on a surface of the substrate, the pair of graphene electrodes separated from one another by an exposed portion of the substrate to define a first graphene electrode and a second graphene electrode opposite the first graphene electrode;
- depositing a solution containing at least one carbon nanotube on the surface of the substrate, the solution covering the first and second graphene electrodes; and
- generating an electric field across the first and second graphene electrodes, the electric field forcing the carbon nanotubes to the exposed portion of the substrate and aligning the at least one carbon nanotube between the first and second graphene electrodes in a direction parallel with the electric field.
2. The method of claim 1, further comprising removing the first and second electrodes from the substrate while maintaining the at least one carbon in the alignment induced by the electric field.
3. The method of claim 2, wherein the forming the pair of graphene electrodes further comprises:
- forming a graphene layer on the substrate;
- forming a masking layer on the graphene layer;
- defining the masking layer and the graphene layer according to a pattern that forms the exposed portion of the substrate between first and second masking layer portions of the masking layer; and
- removing the first and second masking layer portions to expose the first and second graphene electrodes, the first and second graphene electrodes patterned according to the etching applied to the masking layer and graphene layer.
4. The method of claim 3, further comprising forming a uniform portion at the edge of the first and second graphene electrodes, the uniform portion extending in a uniformed direction between ends of the edge.
5. The method of claim 4, positioning the at least one carbon nanotube between the edge of the first and second graphene electrodes via the electric field.
6. The method of claim 3, further comprising forming a plurality of teeth-like portions at the edge of the first and second graphene electrodes.
7. The method of claim 6, further comprising aligning a first end of the at least one nanotube adjacent a first teeth-like portion of the first graphene electrode and aligning a second end of the at least one nanotube adjacent a second teeth-like portion of the second graphene electrode located directly opposite from the first teeth-like portion.
8. The method of claim 3, further comprising forming the substrate from an electrically insulating material.
9. The method of claim 8, further comprising interposed an insulating layer between the graphene layer and the substrate.
10. The method of claim 9, wherein the generating the electric field further comprises applying a voltage source to the first graphene electrode and applying a ground source to the second graphene electrode.
11. The method of claim 10, wherein the voltage source is an alternating current (AC) voltage source.
12. A semiconductor device, comprising:
- a substrate having at least one electrically insulating portion;
- a first graphene electrode formed on a surface of the substrate such that the electrically insulating portion is interposed between a bulk portion of the substrate and the first graphene electrode; and
- a second graphene electrode formed on the surface of the substrate such that the electrically insulating portion is interposed between the bulk portion of the substrate and the second graphene electrode, the second graphene electrode disposed opposite the first graphene electrode to define an exposed substrate area therebetween.
13. The semiconductor device of claim 12, further comprising at least one carbon nanotube deposited on the surface of the substrate.
14. The semiconductor device of claim 13, wherein the first graphene electrode is configured to receive a voltage source and the second graphene electrode is configured to receive a ground source, the voltage and ground sources inducing an electric field including a plurality of field lines, the electric field forcing the at least one carbon nanotube to the exposed substrate area and aligning the at least one carbon nanotube in a direction parallel to the field lines.
15. The semiconductor device of claim 14, wherein the substrate is formed from an electrically insulating material.
16. The semiconductor device of claim 15, wherein the insulating portion is integrally formed with the substrate and formed from the same material as the substrate.
17. A semiconductor device, comprising:
- a substrate wafer configured to insulate electrical current from flowing therethrough;
- a graphene electrode network including first and second electrode branches separated from one another by an exposed portion of the substrate wafer, the first and second electrode branches extending along the substrate in direction parallel to one another, the first electrode branch configured to receive a voltage source and the second electrode branch configured to receive a ground source; and
- a plurality of carbon nanotube arrays arranged between the first and second electrode branches, the plurality of carbon nanotube arrays including a plurality of carbon nanotubes aligned perpendicular to the first and second electrode branches in response to an electric field induced by applying the voltage and ground sources.
18. The semiconductor device of claim 17, wherein the first and second electrode braches extend in a plurality of different directions such that the plurality of carbon nanotube arrays are aligned differently according to the directions of the first and second electrode branches.
19. The semiconductor device of claim 18, wherein the first electrode branch includes at least one first graphene electrode and the second electrode branch includes at least one second graphene electrode disposed directly opposite from the first graphene electrode.
20. The semiconductor device of claim 19, wherein the first and second graphene electrodes each include a plurality of teeth-like portions, and wherein each carbon nanotube included in a respective carbon nanotube array is aligned between a first teeth-like portion of the first graphene terminal and a second teeth-like portion of the second graphene terminal.
Type: Application
Filed: Mar 28, 2013
Publication Date: Oct 2, 2014
Inventors: Phaedon Avouris (Yorktown Heights, NY), Christos Dimitrakopoulos (Baldwin Place, NY), Damon B. Farmer (White Plains, NY), Mathias B. Steiner (New York, NY), Michael Engel (Karlsruhe), Ralph Krupke (Stutensee-Blankenloch), Yu-Ming Lin (West Harrison, NY)
Application Number: 13/852,798
International Classification: H01L 29/06 (20060101); H01L 21/02 (20060101);