OPTICAL SHIELD IN A PIXEL CELL PLANARIZATION LAYER FOR BLACK LEVEL CORRECTION
A pixel array includes a plurality of photodiodes disposed in a semiconductor layer and arranged in the pixel array. A color filter layer is disposed proximate to the semiconductor layer. Light is to be directed to at least a first one of the plurality of photodiodes through the color filter layer. An optical shield layer is disposed proximate to the color filter layer. The color filter layer is disposed between the optical shield layer and the semiconductor layer. The optical shield layer shields at least a second one of the plurality of photodiodes from the light.
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1. Field of the Disclosure
This disclosure relates generally to photodetectors, and in particular but not exclusively, relates to black level correction in image sensors.
2. Background
As pixel size scales down and array resolution scales up, construction of black level correction (“BLC”) pixels, and color filters faces increasingly difficult technical hurdles to overcome in next generation optical devices. Conventional methods of fabricating BLC pixels and color filters result in undesirable electrical signals and mechanical stresses in pixel arrays. Changes in temperature, humidity, and voltage can increase the magnitude of these unwanted effects when employing a traditional architecture.
Non-limiting and non-exhaustive embodiments of the invention are described with reference to the following figures, wherein like reference numerals refer to like parts throughout the various views unless otherwise specified.
Embodiments of a backside illuminated (“BSI”) imaging system with black reference pixels are described herein. In the following description, numerous specific details are set forth to provide a thorough understanding of the embodiments. One skilled in the relevant art will recognize, however, that the techniques described herein can be practiced without one or more of the specific details, or with other methods, components, materials, etc. In other instances, well-known structures, materials, or operations are not shown or described in detail to avoid obscuring certain aspects.
Reference throughout this specification to “one embodiment” or “an embodiment” or “one example” means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the present invention. Thus, the appearances of the phrases “in one embodiment” or “in an embodiment” or “one example” in various places throughout this specification are not necessarily all referring to the same embodiment. Furthermore, the particular features, structures, or characteristics may be combined or eliminated in any suitable manner in one or more embodiments.
Throughout this specification, several terms of art are used. These terms are to take on their ordinary meaning in the art from which they come, unless specifically defined herein or the context of their use would clearly suggest otherwise.
Here, examples in accordance with the teachings of the present invention address contributing factors to diminished image sensor performance with respect to black level correction. As will be discussed, an improved BLC ratio is achieved with an optical shield layer that is deposited after a color filter layer in accordance with the teachings of the present invention, because BLC pixels experience a mechanical and electrical environment similar to pixels that receive light. Additionally, better color uniformity is achieved if color filters are not fabricated on a prior patterned metal topography.
To illustrate,
As shown in the example depicted in
It should be noted that the examples shown in
In one example, the pixel array 201 is a two-dimensional array of image sensors or pixels (e.g., pixels P1, P2, P3 . . . , Pn). It is noted that pixel array 201 may be an example of pixel array 101 of
In one example, after each pixel 212 has acquired its image data or image charge, the image data is read out by readout circuitry 208 and then transferred to function logic 210. In various examples, readout circuitry 208 may include amplification circuitry, analog-to-digital (ADC) conversion circuitry, or otherwise. In one example, readout circuitry 208 may read out a row of image data at a time along readout column lines (illustrated) or may read out the image data using a variety of other techniques (not illustrated), such as a serial read out or a full parallel read out of all pixels simultaneously. Function logic 210 may simply store the image data or even manipulate the image data by applying post image effects (e.g., crop, rotate, remove red eye, adjust brightness, adjust contrast, or otherwise).
In one example, control circuitry 206 is coupled to pixel array 201 to control operational characteristics of pixel array 201. For example, control circuitry 206 may generate a shutter signal for controlling image acquisition. In one example, the shutter signal is a global shutter signal for simultaneously enabling all pixels 212 within pixel array 201 to simultaneously capture their respective image data during a single acquisition window. In another example, the shutter signal is a rolling shutter signal such that each row, column, or group of pixels 212 is sequentially enabled during consecutive acquisition windows.
The above description of illustrated embodiments of the invention, including what is described in the Abstract, is not intended to be exhaustive or to limit the invention to the precise forms disclosed. While specific embodiments of, and examples for, the invention are described herein for illustrative purposes, various modifications are possible within the scope of the invention, as those skilled in the relevant art will recognize.
These modifications can be made to the invention in light of the above detailed description. The terms used in the following claims should not be construed to limit the invention to the specific embodiments disclosed in the specification. Rather, the scope of the invention is to be determined entirely by the following claims, which are to be construed in accordance with established doctrines of claim interpretation.
Claims
1. A pixel array comprising:
- a plurality of photodiodes disposed in a semiconductor layer and arranged in the pixel array;
- a color filter layer disposed proximate to the semiconductor layer, wherein light is to be directed to at least a first one of the plurality of photodiodes through the color filter layer, wherein the light is to be directed to said at least the first one of the plurality of photodiodes through a backside of the pixel array;
- an optical shield layer disposed proximate to the color filter layer, wherein the color filter layer is disposed between the optical shield layer and the semiconductor layer, wherein the optical shield layer shields at least a second one of the plurality of photodiodes from the light; and
- a planarization layer disposed over the color filter layer such that at least a portion of the planarization layer is disposed between the optical shield layer and the color filter layer.
2. The pixel array of claim 1 wherein the semiconductor layer comprises silicon.
3. The pixel array of claim 1 further comprising one or more interlayers disposed between the semiconductor layer and the color filter layer.
4. The pixel array of claim 3 wherein the one or more interlayers comprises at least one of silicon nitride and silicon carbide.
5. The pixel array of claim 1 wherein the optical shield layer is deposited in the planarization layer disposed over the color filter layer.
6. The pixel array of claim 1 wherein the optical shield layer comprises metal.
7. The pixel array of claim 1 further comprising one or more lenses disposed proximate to the optical shield layer, wherein the light is to be directed through the one or more lenses and the color filter layer to the plurality of photodiodes.
8. (canceled)
9. An imaging system comprising:
- a pixel array including: a plurality of photodiodes disposed in a semiconductor layer and arranged in the pixel array; a color filter layer disposed proximate to the semiconductor layer, wherein light is to be directed to at least a first one of the plurality of photodiodes through the color filter layer, wherein the light is to be directed to said at least the first one of the plurality of photodiodes through a backside of the pixel array; an optical shield layer disposed proximate to the color filter layer, wherein the color filter layer is disposed between the optical shield layer and the semiconductor layer, wherein the optical shield layer shields at least a second one of the plurality of photodiodes from the light; and a planarization layer disposed over the color filter layer such that at least a portion of the planarization layer is disposed between the optical shield layer and the color filter layer;
- control circuitry coupled to the pixel array to control operation of the pixel array; and
- readout circuitry coupled to the pixel array to readout image data from the pixel array.
10. The imaging system of claim 9 wherein each pixel of the pixel array comprises at least one of the plurality of the photodiodes.
11. The imaging system of claim 9 further comprising function logic coupled to the readout circuitry to store the image data readout from the pixel array.
12. The imaging system of claim 9 wherein the semiconductor layer comprises silicon.
13. The imaging system of claim 9 wherein the pixel array further includes one or more interlayers disposed between the semiconductor layer and the color filter layer.
14. The imaging system of claim 13 wherein the one or more interlayers comprises at least one of silicon nitride and silicon carbide.
15. The imaging system of claim 9 wherein the optical shield layer is deposited in planarization layer disposed over the color filter layer.
16. The imaging system of claim 9 wherein the optical shield layer comprises metal.
17. The imaging system of claim 9 wherein the pixel array further comprises one or more lenses disposed proximate to the optical shield layer, wherein the light is to be directed through the one or more lenses and the color filter layer to the plurality of photodiodes.
18. (canceled)
19. A method of fabricating a pixel array comprising:
- forming a plurality of photodiodes in a semiconductor layer and arranged in the pixel array;
- forming a color filter layer proximate to the semiconductor layer, wherein light is to be directed to at least a first one of the plurality of photodiodes through the color filter layer, wherein the light is to be directed to said at least the first one of the plurality of photodiodes through a backside of the pixel array;
- depositing an optical shield layer proximate to the color filter layer, wherein the color filter layer is disposed between the optical shield layer and the semiconductor layer, wherein the optical shield layer shields at least a second one of the plurality of photodiodes from the light; and
- depositing at least a portion of a planarization layer prior to depositing the optical shield layer such that said at least the portion of the planarization layer is disposed between the optical shield layer and the color filter layer.
20. The method of claim 19 wherein forming the plurality of photodiodes in the semiconductor layer comprises forming the plurality of photodiodes in a silicon semiconductor layer.
21. The method of claim 19 further comprising depositing one or more interlayers proximate to the semiconductor layer prior to depositing the color filter layer such that the one or more interlayers are disposed between the semiconductor layer and the color filter layer.
22. The method of claim 21 wherein the one or more interlayers comprises at least one of silicon nitride and silicon carbide.
23. The method of claim 19 wherein the optical shield layer comprises metal.
24. (canceled)
25. The method of claim 19 further comprising forming one or more lenses proximate to the planarization layer, wherein the light is to be directed through the one or more lenses and the color filter layer to the plurality of photodiodes.
26. (canceled)
Type: Application
Filed: Sep 18, 2013
Publication Date: Mar 19, 2015
Applicant: OMNIVISION TECHNOLOGIES, INC. (Santa Clara, CA)
Inventors: Gang Chen (San Jose, CA), Jin Li (San Jose, CA), Duli Mao (Sunnyvale, CA), Dyson H. Tai (San Jose, CA)
Application Number: 14/030,395
International Classification: H01L 31/0232 (20060101); H01L 31/18 (20060101);