Semiconductor device having SiO.sub.x N.sub.y gate insulating film
In fabricating a thin film transistor, an active layer comprising a silicon semiconductor is formed on a substrate having an insulating surface. Hydrogen is introduced into the active layer. A thin film comprising SiO.sub.x N.sub.y is formed to cover the active layer and then a gate insulating film comprising a silicon oxide film formed on the thin film comprising SiO.sub.x N.sub.y. Also, a thin film comprising SiO.sub.x N.sub.y is formed under the active layer. The active layer includes a metal element at a concentration of 1.times.10.sup.15 to 1.times.10.sup.19 cm.sup.-3 and hydrogen at a concentration of 2.times.10.sup.19 to 5.times.10.sup.21 cm.sup.-3.
Claims
1. A semiconductor device comprising:
- a first thin film comprising SiO.sub.x N.sub.y formed on a substrate;
- an active layer comprising a silicon film, formed on the first thin film;
- a gate insulating film comprising a silicon oxide film, formed over the active layer; and
- a second thin film comprising SiO.sub.x N.sub.y formed between the active layer and the gate insulating film.
2. The device of claim 1 wherein the active layer includes a metal element for promoting crystallization at a concentration of 1.times.10.sup.15 to 1.times.10.sup.19 cm.sup.-3 and oxygen at a concentration of 2.times.10.sup.19 to 5.times.10.sup.21 cm.sup.-3.
3. The device of claim 2 wherein the metal element includes nickel.
4. The device of claims 1 wherein the first and second thin films include chlorine at a concentration of 1.times.10.sup.15 to 1.times.10.sup.20 cm.sup.-3.
5. The device of claim 4 wherein the active layer includes a metal element for promoting crystallization at a concentration of 1.times.10.sup.15 to 1.times.10.sup.19 cm.sup.-3 and oxygen at a concentration of 2.times.10.sup.19 to 5.times.10.sup.21 cm.sup.-3.
6. A semiconductor device comprising:
- a substrate having a first insulating film comprising silicon, oxygen and nitrogen;
- a semiconductor layer formed on said first insulating film, said semiconductor layer including source, drain and channel regions;
- a second insulating film comprising silicon, oxygen and nitrogen formed on said semiconductor layer; and
- a gate electrode over said semiconductor layer with said second insulating film interposed therebetween.
7. A semiconductor device according to claim 6 wherein said gate electrode comprises doped silicon.
8. A semiconductor device according to claim 6 wherein said gate electrode comprises metal.
9. A semiconductor device according to claim 6 further comprising a silicon oxide film interposed between said second insulating film and said gate electrode.
10. A semiconductor device according to claim 6 wherein said semiconductor layer comprises silicon.
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Type: Grant
Filed: Feb 5, 1998
Date of Patent: Apr 13, 1999
Inventor: Satoshi Teramoto (Atsugi-shi, Kanagawa-ken 243)
Primary Examiner: Minh Loan Tran
Attorneys: Sixbey, Friedman, Leedom & Ferguson, PC, Sixbey, Friedman, Leedom & Ferguson, PC
Application Number: 9/19,295
International Classification: H01L 2976;