Top plate for semiconductor manufacturaing equipment

Description

FIG. 1 is a perspective view of a top plate for semiconductor manufacturaing equipment showing our new design;

FIG. 2 is a front elevational view thereof, the rear elevational view being a mirror image thereof;

FIG. 3 is a right-side elevational view thereof, the left-side elevational view being a mirror image thereof;

FIG. 4 is a top plan view thereof;

FIG. 5 is a bottom plan view thereof;

FIG. 6 is another perspective view thereof;

FIG. 7 is a cross-sectional view taken along a line 7-7 of FIG. 4; and,

FIG. 8 is an enlarged view of portion 8 enclosed by a dot-dot-dash line in FIG. 6.

The broken lines shown are included for the purpose of illustrating portions of the design which form no part of the claimed design. The dot-dash lines indicate the boundary between the claimed portion and forms no part of the claimed design.

Claims

The ornamental design for a top plate for semiconductor manufacturaing equipment, as shown and described.