Collimator for a physical vapor deposition (PVD) chamber
Latest APPLIED MATERIALS, INC. Patents:
- SELECTIVE ETCHING OF SILICON-AND-GERMANIUM-CONTAINING MATERIALS WITH REDUCED UNDER LAYER LOSS
- METAL SIGNAL OR POWERLINE SEPARATION THROUGH SELECTIVE DEPOSITION IN ADVANCED MEMORY DEVICES
- FORMATION OF GATE ALL AROUND DEVICE
- METHODS OF MANUFACTURING INTERCONNECT STRUCTURES
- DISTINGUISHED FLIP CHIP PACKAGING FOR STRESS RELAXATION AND ENHANCED EM PROTECTION
Description
The broken lines in the drawings illustrate portions of the article that form no part of the claimed design.
Claims
The ornamental design for a collimator for a physical vapor deposition (PVD) chamber, as shown and described.
Referenced Cited
U.S. Patent Documents
Foreign Patent Documents
5544771 | August 13, 1996 | Lee |
5770026 | June 23, 1998 | Lee |
D760180 | June 28, 2016 | Dempster |
9543126 | January 10, 2017 | Riker |
D858468 | September 3, 2019 | Riker |
D859333 | September 10, 2019 | Riker |
D997111 | August 29, 2023 | Riker |
D998575 | September 12, 2023 | Riker |
20090308739 | December 17, 2009 | Riker |
20150114823 | April 30, 2015 | Lee |
20150354054 | December 10, 2015 | Fruchterman |
20160145735 | May 26, 2016 | Riker |
20170117121 | April 27, 2017 | Riker |
20170253959 | September 7, 2017 | Wang |
20170301525 | October 19, 2017 | Kato |
20180233335 | August 16, 2018 | Kato |
20180237903 | August 23, 2018 | Takeuchi |
20180265964 | September 20, 2018 | Kato |
20190027346 | January 24, 2019 | Takeuchi |
3010337070001 | November 2019 | KR |
3011384700002 | November 2021 | KR |
2002420001 | October 2019 | TW |
2021020001 | January 2020 | TW |
Patent History
Patent number: D1025935
Type: Grant
Filed: Nov 3, 2022
Date of Patent: May 7, 2024
Assignee: APPLIED MATERIALS, INC. (Santa Clara, CA)
Inventors: Martin Lee Riker (Round Rock, TX), Luke Vianney Varkey (Milpitas, CA), Xiangjin Xie (Fremont, CA)
Primary Examiner: Christy Nemeth
Assistant Examiner: Justin M. Donaldson
Application Number: 29/858,764
Type: Grant
Filed: Nov 3, 2022
Date of Patent: May 7, 2024
Assignee: APPLIED MATERIALS, INC. (Santa Clara, CA)
Inventors: Martin Lee Riker (Round Rock, TX), Luke Vianney Varkey (Milpitas, CA), Xiangjin Xie (Fremont, CA)
Primary Examiner: Christy Nemeth
Assistant Examiner: Justin M. Donaldson
Application Number: 29/858,764
Classifications
Current U.S. Class:
Semiconductor, Transistor Or Integrated Circuit (24) (D13/182)