Thermometer for semiconductor manufacturing apparatus

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Description

FIG. 1 is a front, top and right-side perspective view of a thermometer for semiconductor manufacturing apparatus showing my new design;

FIG. 2 is a front elevational view thereof;

FIG. 3 is a left side elevational view thereof;

FIG. 4 is a right-side elevational view thereof;

FIG. 5 is a top plan view thereof;

FIG. 6 is a bottom plan view thereof;

FIG. 7 is a rear elevational view thereof;

FIG. 8 is an enlarged view taken from the double-dotted line box labeled FIG. 8 in FIG. 1 thereof;

FIG. 9 is an enlarged view taken from the double-dotted line box labeled FIG. 9 in FIG. 2 thereof;

FIG. 10 is an enlarged view taken from the double-dotted line box labeled FIG. 10 in FIG. 4 thereof; and,

FIG. 11 is an enlarged view taken from the double-dotted line box labeled FIG. 11 in FIG. 5.

The dash-dash broken lines shown are included for the purpose of illustrating portions of the thermometer for semiconductor manufacturing apparatus that form no part of the claimed design.

The dash-dot broken lines immediately adjacent the shaded areas represent the bounds of the claimed design and form no part of the claimed design.

The double-dotted lines in FIGS. 1, 2, 4, 5, and 8-10 show the periphery of the enlarged views and form no part of the claimed design.

Claims

The ornamental design for a thermometer for semiconductor manufacturing apparatus, as shown and described.

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Patent History
Patent number: D1140755
Type: Grant
Filed: Dec 15, 2023
Date of Patent: Aug 11, 2026
Assignee: KOKUSAI ELECTRIC CORPORATION (Tokyo)
Inventor: Takayuki Nakada (Toyama)
Primary Examiner: Sara S Sahneh
Application Number: 29/921,334
Classifications