Semiconductor device

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Description

FIG. 1 is a front, top and right side perspective view of a semiconductor device, showing our new design;

FIG. 2 is a front, bottom and right side perspective view thereof;

FIG. 3 is a front elevational view thereof, the rear elevational view is omitted as that is the same image to the front elevational view thereof;

FIG. 4 is a right side elevational view thereof, the left side elevational view is omitted as that is symmetrical to the right side elevational view thereof;

FIG. 5 is a top plan view thereof;

FIG. 6 is a bottom plan view thereof; and,

FIG. 7 is a cross-sectional view thereof, taken along line 7—7 of FIG. 4, with the internal system omitted.

Claims

The ornamental design for a semiconductor device, as shown and described.

Referenced Cited
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Other references
  • U.S. patent application Ser. No. 29/144,821, filed Jul. 12, 2001.
  • U.S. patent application Ser. No. 29/144,818, filed Jul. 12, 2001.
  • U.S. patent application Ser. No. 29/144,820, filed Jul. 12, 2001.
  • U.S. patent application Ser. No. 29/144,819, filed Jul. 12, 2001.
  • U.S. patent application Ser. No. 29/144,816, filed Jul. 11, 2001.
  • U.S. patent application Ser. No. 29/144,678, filed Jul. 10, 2001.
  • U.S. patent application Ser. No. 29/150,991, filed Dec. 4, 2001.
Patent History
Patent number: D465773
Type: Grant
Filed: Dec 4, 2001
Date of Patent: Nov 19, 2002
Assignee: Mitsubishi Denki Kabushiki Kaisha (Tokyo)
Inventors: Takakazu Fukumoto (Tokyo), Muneharu Tokunaga (Tokyo), Tetsuya Matsuura (Tokyo)
Primary Examiner: Ted Shooman
Assistant Examiner: Selina Sikder
Attorney, Agent or Law Firm: Oblon, Spivak, McClelland, Maier & Neustadt, P.C.
Application Number: 29/150,991
Classifications
Current U.S. Class: Semiconductor, Transistor Or Integrated Circuit (24) (D13/182)
International Classification: 1303;