Patents Issued in June 28, 2007
  • Publication number: 20070145356
    Abstract: A carbon nanotube sensor (30), for determining the degree of the presence of an unwanted environmental agent, includes a plurality of carbon nanotubes (18). The sensor (30) comprises first and second conducting layers (32, 34) having alternatively interdigitated fingers (36, 38). The plurality of carbon nanotubes (18) having a material characteristic are coupled between each of the interdigitated fingers (36, 38). Optionally, a gate may be used for biasing the device for specific sensor applications by adjusting the electrical resistance.
    Type: Application
    Filed: December 22, 2005
    Publication date: June 28, 2007
    Inventors: Islamshah Amlani, George Maracas, Larry Nagahara
  • Publication number: 20070145357
    Abstract: There is provided herein a performance-enhancing composition comprising inorganic nanoparticles dispersed in a polymer selected from the group consisting of polysiloxane, polysilsesquioxane, and mixtures thereof. This composition, when applied to a thin-film transistor, such as a bottom-gate thin-film transistor, as an overcoat or top layer, improves the carrier mobility and current on/off ratio of the thin film transistor. Also provided is the thin-film transistor produced utilizing this process and/or composition.
    Type: Application
    Filed: December 23, 2005
    Publication date: June 28, 2007
    Inventors: Yiliang Wu, Jessica Sacripante, Beng Ong, Paul Smith
  • Publication number: 20070145358
    Abstract: The transparent conductor of the present invention comprises a conductive layer containing a conductive particle, a binder, a polymerization initiator, and a radical scavenger. In the transparent conductor of the present invention, the conductive layer contains the radical scavenger in addition to the conductive particle. Therefore, even when the conductive particle is pumped upon irradiation with UV rays, so that a radical occurs in the conductive layer, the radical scavenger contained in the conductive layer captures the radical. This restrains the radical from acting on the remaining polymerization initiator and thereby causing a side reaction. As a result, adjacent conductive particles are restrained from fluctuating the distance therebetween.
    Type: Application
    Filed: June 28, 2006
    Publication date: June 28, 2007
    Applicant: TDK CORPORATION
    Inventors: Noriyuki Yasuda, Chieko Yamada
  • Publication number: 20070145359
    Abstract: The invention provides organic thin film transistors including quinacridone derivatives with formula (I). These OTFTs are useful in making flat panel displays, photovoltaic devices and sensors. In the present invention, the disclosed quinacridone derivatives exhibit as p-type organic semiconductors in OTFTs.
    Type: Application
    Filed: December 5, 2006
    Publication date: June 28, 2007
    Inventor: Chi Ming Che
  • Publication number: 20070145360
    Abstract: Electronic devices comprising an anode, buffer layer, hole transport layer, photoactive layer, electron transport layer, electron injection layer, and cathode are provided, where the photoactive layer comprises a dual dopant in a metallic complex. The dopants are selected so that their emitting wavelengths are essentially the same, while their ionization potentials and electron affinities are substantially different. The dual dopant device allows for tuning the ionization potential of one dopant to enhance hole injection and/or minimize hole trapping, while independently tuning the electron affinity of the other dopant to enhance electron injection and/or minimize electron trapping.
    Type: Application
    Filed: December 22, 2006
    Publication date: June 28, 2007
    Inventor: Ying Wang
  • Publication number: 20070145361
    Abstract: An organic semiconductor material comprising a compound which has a generalized porphyrin skeleton and which has a molecular structure such that the distance from the generalized porphyrin ring plane to the center of each atom forming the generalized porphyrin skeleton, is not more than 1 ?
    Type: Application
    Filed: February 5, 2007
    Publication date: June 28, 2007
    Applicant: MITSUBISHI CHEMICAL CORPORATION
    Inventors: Shinji ARAMAKI, Noboru Ono
  • Publication number: 20070145362
    Abstract: A passive electronic device includes layers of a layered structure on a support surface. The device can include a first layer part that includes electrically conductive or semiconductive material and that has a contact surface. The device can also include second layer parts that include electrically conductive material and are in electrical contact with the contact surface, with a subset electrically connectible to external circuitry. At least one of the parts of the two layers can be produced by a printing operation or can include a printed patterned artifact such as an uneven boundary or an alignment. The printing operation can be direct printing or printing of a mask for etching or liftoff or both. The device could, for example, be a resistive device, such as a device with resistance varying in response to non-electrical stimuli, or a conductive device, such as with a contact pad for a pogo pin.
    Type: Application
    Filed: December 27, 2005
    Publication date: June 28, 2007
    Inventors: Michal Wolkin, Ana Arias
  • Publication number: 20070145363
    Abstract: A memory device may include a controller and a plurality of flash memory dice. The controller is provided for read and write access and communications with a host. However, the controller may also be utilized to test one or more of the flash memory dice mounted on the device. In this way, testing may be achieved with a relatively modestly priced tester by making use of the capabilities of the onboard controller. As a result, the cost of a memory device may be reduced in some cases.
    Type: Application
    Filed: December 23, 2005
    Publication date: June 28, 2007
    Inventor: Mickey Fandrich
  • Publication number: 20070145364
    Abstract: A test pattern for analyzing a delay characteristic of an interconnection line and a method of analyzing a delay characteristic of an interconnection line using the test pattern are provided. The test pattern for analyzing a delay characteristic of an interconnection line includes: a first metal line formed as a snake shaped structure having a plurality of concave-convex sections each having the same width; a second metal line having a comb shape formed on the same layer as the first metal line such that a plurality of teeth portions of the second metal line are respectively formed between the concave-convex sections at one side of the first metal line; and a third metal line having a comb shape formed on the same layer as the first metal line such that a plurality of teeth portions of the third metal line are respectively formed between the concave-convex sections at the other side of the first metal line.
    Type: Application
    Filed: December 21, 2006
    Publication date: June 28, 2007
    Inventor: Chan Park
  • Publication number: 20070145365
    Abstract: Embodiments relate to and image sensor. In embodiments, the image sensor may include a semiconductor substrate, a photodiode region, a gate electrode, a dummy gate, and an interlayer dielectric layer. The semiconductor substrate includes a field oxide layer. The photodiode region may be formed on the semiconductor substrate. The gate electrode may be formed on the semiconductor substrate. The dummy gate may be formed on the field oxide layer. The interlayer dielectric layer may be formed on one side of the dummy gate and includes an opening exposing the photodiode region.
    Type: Application
    Filed: December 22, 2006
    Publication date: June 28, 2007
    Inventor: Young Kim
  • Publication number: 20070145366
    Abstract: A method and a structure are provided for preventing lift-off of a semiconductor monitor pattern from a substrate . A semiconductor structure and a semiconductor monitor structure are formed on a substrate. A material layer is formed covering the semiconductor monitor structure. A part of the semiconductor structure is removed without removing the semiconductor monitor structure, by using the material layer as an etch protection layer. A mask for the method is also provided. The mask includes a clear area and a dark area. The dark area prevents a semiconductor monitor structure from being subjected to exposure so as to form a material layer covering the semiconductor monitor structure and prevent removal of the semiconductor monitor structure from the substrate while a part of a semiconductor structure is removed.
    Type: Application
    Filed: March 9, 2007
    Publication date: June 28, 2007
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hua-Shu Wu, Tsung-Mu Lai, Ming-Chih Chang, Che-Rong Laing
  • Publication number: 20070145367
    Abstract: The preferred embodiments of the present invention provide a three-dimensional (3D) semiconductor structure and a method of forming the same. The 3D semiconductor structure includes a first substrate bonded to a second substrate. The first substrate includes substantially all NMOS devices. The second substrate includes substantially all PMOS devices. The substrates can be bonded face-to-face, face-to-back, or back-to-back. The method includes providing a first substrate and a second substrate, forming a first circuit comprising at least one NMOS device on the first substrate, wherein the first substrate includes substantially no PMOS devices, forming a second circuit comprising at least one PMOS device on the second substrate, wherein the second substrate includes substantially no NMOS devices, and bonding the first and second substrates after forming the first and second circuits.
    Type: Application
    Filed: December 27, 2005
    Publication date: June 28, 2007
    Inventors: Hai-Ching Chen, Harold Hsiung, Henry Lo
  • Publication number: 20070145368
    Abstract: The present invention relates to a two-frequency switchover type crystal oscillator in which first and second IC chips and first and second crystal resonators are connected to wiring patterns of a circuit substrate to form first and second oscillation circuits, and the first and second oscillation circuits are selectively operated in accordance with a selection mechanism; a two-frequency switchover type crystal oscillator in which surfaces opposite to circuit function surfaces of the first and second IC chips are connected to form a two-stage structure; IC terminals of the circuit function surface of the first IC chip are directly connected both electrically and mechanically to the wiring patterns; and IC terminals of the circuit function surface of the second IC chip are connected electrically by wire bonding to the wiring patterns; wherein those wiring patterns of the wiring patterns that are connected to power source, output, and ground terminals of the first and second IC chips are connected in common wit
    Type: Application
    Filed: December 26, 2006
    Publication date: June 28, 2007
    Inventor: Makoto Watanabe
  • Publication number: 20070145369
    Abstract: An array substrate for a liquid crystal display device includes a substrate having a display area and a driving circuit area, a first semiconductor layer formed on the substrate in the display area, the first semiconductor layer having an active region and source and drain regions at opposing sides of the active region, a gate insulating layer formed on the first semiconductor layer, a gate electrode formed on the gate insulating layer and over the active region, the gate electrode being wider than the gate insulating layer, and an interlayer insulating layer formed over the substrate including the gate electrode, wherein the interlayer insulating layer, the gate electrode, the gate insulating layer, and the active region define a first cavity.
    Type: Application
    Filed: June 15, 2006
    Publication date: June 28, 2007
    Inventor: Joung-Uk Kwak
  • Publication number: 20070145370
    Abstract: An electro-optic device includes data lines and scanning lines extending to cross each other on a substrate, pixel electrodes disposed on the substrate for respective pixels defined corresponding to the data lines and the scanning lines in a plan view of the substrate, thin film transistors electrically connected to the respective pixel electrodes, and at least one amorphous wiring including an amorphous film and disposed in a region containing a region opposite to a channel region of each of the thin film transistors in a plan view of the substrate and in a layer different from that of semiconductor films of the thin film transistors.
    Type: Application
    Filed: December 18, 2006
    Publication date: June 28, 2007
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Minoru MORIWAKI
  • Publication number: 20070145371
    Abstract: A thin-film transistor, such as a top-gate thin-film transistor, is provided herein. The thin-film transistor has a performance-enhancing layer, such as a performance-enhancing bottom layer, comprising a polymer other than a polyimide. In specific embodiments, the polymer is selected from the group consisting of polysiloxane, polysilsesquioxane, and mixtures thereof. In other embodiments, it is a self-assembling polymeric monolayer of a silane agent and an organophosphonic acid. The performance-enhancing layer directly contacts the substrate. The layer improves the carrier mobility and current on/off ratio of the thin film transistor.
    Type: Application
    Filed: December 23, 2005
    Publication date: June 28, 2007
    Inventors: Yiliang Wu, Beng Ong, Paul Smith
  • Publication number: 20070145372
    Abstract: An object of the present invention is to provide a technique for improving characteristics of a TFT and realizing the structure of the TFT optimal for driving conditions of a pixel section and a driving circuit, using a smaller number of photo masks. A semiconductor device has a semiconductor film, a first electrode, and a first insulating film sandwiched between the semiconductor film and the first electrode, and further has a second electrode, and a second insulating film sandwiched between the semiconductor film and the second electrode. The first electrode and the second electrode overlap with each other across a channel-formed region which the semiconductor film has. A constant voltage is applied to the first electrode at any time.
    Type: Application
    Filed: December 6, 2006
    Publication date: June 28, 2007
    Inventors: Shunpei Yamazaki, Mai Osada
  • Publication number: 20070145373
    Abstract: The present invention provides an epitaxial imprinting process for fabricating a hybrid substrate that includes a bottom semiconductor layer; a continuous buried insulating layer present atop said bottom semiconductor layer; and a top semiconductor layer present on said continuous buried insulating layer, wherein said top semiconductor layer includes separate planar semiconductor regions that have different crystal orientations, said separate planar semiconductor regions are isolated from each other. The epitaxial printing process of the present invention utilizing epitaxial growth, wafer bonding and a recrystallization anneal.
    Type: Application
    Filed: March 9, 2007
    Publication date: June 28, 2007
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Toshiharu Furukawa, Carl Radens, William Tonti, Richard Williams
  • Publication number: 20070145374
    Abstract: A thin film transistor substrate includes a base substrate, a gate electrode, a gate insulating layer, a surface treating layer, an active layer, a source electrode and a drain electrode. The gate electrode is formed on the base substrate. The gate insulating layer is formed on the base substrate to cover the gate electrode. The surface treating layer is formed on the gate insulating layer by treating the gate insulating layer with a nitrogen-containing gas to prevent leakage current. The active layer is formed on the surface treating layer to cover the gate electrode. The source electrode and the gate electrode that are spaced apart from each other by a predetermined distance are formed on the active layer.
    Type: Application
    Filed: December 27, 2006
    Publication date: June 28, 2007
    Inventors: Sang-Woo Whangbo, Shi-Yul Kim, Sung-Hoon Yang, Woo-Geun Lee
  • Publication number: 20070145375
    Abstract: A method of manufacturing a nanowire, a method of manufacturing a semiconductor apparatus including a nanowire and a semiconductor apparatus formed from the same are provided. The method of manufacturing a semiconductor apparatus may include forming a material layer pattern on a substrate, forming a first insulating layer on the material layer pattern, a first nanowire forming layer and a top insulating layer on the substrate, wherein a total depth of the first insulating layer and the first nanowire forming layer may be formed to be smaller than a depth of the material layer pattern, sequentially polishing the top insulating layer, the first nanowire forming layer and the first insulating layer so that the material layer pattern is exposed, exposing part of the first nanowire forming layer to form an exposed region and forming a single crystalline nanowire on an exposed region of the first nanowire forming layer.
    Type: Application
    Filed: December 22, 2006
    Publication date: June 28, 2007
    Inventor: Hans Cho
  • Publication number: 20070145376
    Abstract: Affords GaN crystal substrates that can reduce the occurring of cracks and fractures in the GaN crystal substrates when the semiconductor devices are manufactured, semiconductor devices including them, methods of manufacturing the semiconductor devices, and methods of identifying the GaN crystal substrates. A gallium nitride crystal substrate has a surface area of 10 cm2 or more. The difference between the maximum and the minimum of Raman shifts corresponding to the E2H phonon mode in a region except for a region from the outer periphery in the surface of the gallium nitride crystal substrate to a line 5 mm radially inward from the outer periphery of the surface is 0.5 cm?1 or less. And also affords semiconductor devices including them, methods of manufacturing the semiconductor devices, and methods of identifying the GaN crystal substrates.
    Type: Application
    Filed: December 26, 2006
    Publication date: June 28, 2007
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Manabu Okui, Ken-ichiro Miyatake, Hideaki Nakahata, Shinsuke Fujiwara, Seiji Nakahata
  • Publication number: 20070145377
    Abstract: A semiconductor device of a double diffused MOS structure employing a silicon carbide semiconductor substrate. The semiconductor device comprises a silicon carbide semiconductor epitaxial layer provided on a surface of the silicon carbide semiconductor substrate and having a first conductivity which is the same conductivity as the silicon carbide semiconductor substrate, and an impurity region formed by doping a surface portion of the silicon carbide semiconductor epitaxial layer with an impurity of a second conductivity, the impurity region having a profile such that a near surface thereof has a relatively low second-conductivity impurity concentration and a deep portion thereof has a relatively high second-conductivity impurity concentration.
    Type: Application
    Filed: February 25, 2005
    Publication date: June 28, 2007
    Inventor: Mineo Miura
  • Publication number: 20070145378
    Abstract: A bipolar junction transistor (BJT) includes a silicon carbide (SiC) collector layer of first conductivity type, an epitaxial silicon carbide base layer of second conductivity type on the silicon carbide collector layer, and an epitaxial silicon carbide emitter mesa of the first conductivity type on the epitaxial silicon carbide base layer. An epitaxial silicon carbide passivation layer of the first conductivity type is provided on at least a portion of the epitaxial silicon carbide base layer outside the silicon carbide emitter mesa. The epitaxial silicon carbide passivation layer can be configured to fully deplete at zero device bias. Related fabrication methods also are disclosed.
    Type: Application
    Filed: December 22, 2005
    Publication date: June 28, 2007
    Inventors: Anant Agarwal, Sumithra Krishnaswami, Sei-Hyung Ryu, D. Capell
  • Publication number: 20070145379
    Abstract: A light emitting device (A) includes a semiconductor die (100).
    Type: Application
    Filed: December 22, 2004
    Publication date: June 28, 2007
    Inventors: Ivan Eliashevich, Hari Venugopalan, Xiang Gao, Michael Sackrison
  • Publication number: 20070145380
    Abstract: An electrode structure is disclosed for enhancing the brightness and/or efficiency of an LED. The electrode structure can have a metal electrode and an optically transmissive thick dielectric material formed intermediate the electrode and a light emitting semiconductor material. The electrode and the thick dielectric cooperate to reflect light from the semiconductor material back into the semiconductor so as to enhance the likelihood of the light ultimately being transmitted from the semiconductor material. Such LED can have enhanced utility and can be suitable for uses such as general illumination.
    Type: Application
    Filed: May 19, 2006
    Publication date: June 28, 2007
    Inventors: Frank Shum, William So, Steven Lester
  • Publication number: 20070145381
    Abstract: A light-emitting diode has: a substrate; a light-emitting layer having a first conductivity type cladding layer, an active layer, and a second conductivity type cladding layer stacked sequentially on a front side of the substrate; a first current-blocking portion partially formed in the middle on the light-emitting layer; a current-conducting portion formed on the second conductivity type cladding layer and the first current-blocking portion; a lower electrode formed on the back side of the substrate, a light-reflecting layer formed between the substrate and the light-emitting layer; a partial electrode formed on the surface of the light-reflecting layer and in a portion positioned below the first current-blocking portion; and a second current-blocking portion formed over the surface of the light-reflecting layer excluding the portion in which is formed the partial electrode.
    Type: Application
    Filed: July 12, 2006
    Publication date: June 28, 2007
    Applicant: HITACHI CABLE, LTD.
    Inventors: Tsunehiro Unno, Katsuya Akimoto, Masahiro Arai
  • Publication number: 20070145382
    Abstract: A high-efficiency semiconductor light emitting diode and a method for manufacturing the same are provided. The semiconductor LED has high internal quantum efficiency and can reduce the bad effect caused by the crystal defect. In the semiconductor light emitting diode, a conductive substrate has a three-dimensional top surface, and a light-emitting stack structure has a three-dimensional structure and includes an n-type nitride semiconductor layer, an active layer, and a p-type nitride semiconductor layer, which are sequentially formed on the conductive substrate. A p-electrode is formed on the p-type nitride semiconductor layer, and an n-electrode is formed on a bottom surface of the conductive substrate.
    Type: Application
    Filed: November 9, 2006
    Publication date: June 28, 2007
    Inventors: Pun Jae Choi, Sang Yeob Song, Suk Youn Hong
  • Publication number: 20070145383
    Abstract: A light emitting diode (LED) is provided with a base substrate, a plurality of light emitting chips disposed on the upper surface of the base substrate and electrically coupled in parallel to one another, and a fluorescent material layer for covering the light emitting chips.
    Type: Application
    Filed: November 9, 2006
    Publication date: June 28, 2007
    Inventors: Soo-Guy Rho, Kyu-Seok Kim
  • Publication number: 20070145384
    Abstract: In a device, a III-nitride light emitting layer is disposed between an n-type region and a p-type region. A first spacer layer, which is disposed between the n-type region and the light emitting layer, is doped to a dopant concentration between 6×1018 cm3 and 5×1019 cm?3. A second spacer layer, which is disposed between the p-type region and the light emitting layer, is not intentionally doped or doped to a dopant concentration less than 6×1018 cm?3.
    Type: Application
    Filed: March 5, 2007
    Publication date: June 28, 2007
    Applicant: PHILIPS LUMILEDS LIGHTING COMPANY, LLC
    Inventors: Nathan Gardner, Gangyi Chen, Werner Goetz, Michael Krames, Gerd Mueller, Yu-Chen Shen, Satoshi Watanabe
  • Publication number: 20070145385
    Abstract: A first semiconductor light emitting device comprises: a transparent substrate; a light emitting layer; and a roughened region. The transparent substrate has a first major surface and a second major surface, and is translucent to light in a first wavelength band. The light emitting layer is selectively provided in a first portion on the first major surface of the transparent substrate and configured to emit light in the first wavelength band. The roughened region is provided in a second portion different from the first portion on the first major surface. A second semiconductor light emitting device comprises: a transparent substrate; a light emitting layer; a first electrode; and at least one groove. The groove is provided on the second major surface of the transparent substrate and is extending from a first side face to a second side face opposing the first side face of the transparent substrate.
    Type: Application
    Filed: March 13, 2007
    Publication date: June 28, 2007
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Kenichi Ohashi, Yasuhiko Akaike, Hitoshi Sugiyama, Yasuharu Sugawara
  • Publication number: 20070145386
    Abstract: Provided are a semiconductor light emitting device having a nano pattern and a method of manufacturing the semiconductor light emitting device. The semiconductor light emitting device includes: a semiconductor layer comprising a plurality of nano patterns, wherein the plurality of nano patterns are formed inside the semiconductor layer; and an active layer formed on the semiconductor layer. The optical output efficiency is increased and inner defects of the semiconductor light emitting device are reduced.
    Type: Application
    Filed: February 14, 2007
    Publication date: June 28, 2007
    Applicant: Samsung Electro-mechanics Co., Ltd.
    Inventors: Jeong-wook Lee, Youn-joon Sung, Ho-sun Paek, Hyun-soo Kim, Joo-sung Kim, Suk-ho Yoon
  • Publication number: 20070145387
    Abstract: The invention relates to an LED housing and its fabrication method. In the LED housing, a heat conducting part has a chip mounting area, a heat connecting area opposed to the chip mounting area and a groove formed adjacent to the heat connecting area. An electrical connecting part has a wiring area placed adjacent to the chip mounting area and an external power connecting area led to the wiring area. A housing body is made of molding resin, and integrally holds the heat conducting part and the electrical connecting part while isolating the electrical connecting part from the heat conducting part. The housing body is provided with a recess extended from a portion of the groove of the heat conducting part to a side of the housing body. In this fashion, the invention can overcome restricted application problems by isolating the electrical connecting parts from the heat conducting part.
    Type: Application
    Filed: March 1, 2007
    Publication date: June 28, 2007
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Seon Goo LEE, Bum Joon JIN, Kyung Taeg HAN, Chang Wook KIM
  • Publication number: 20070145388
    Abstract: A surface emitting semiconductor component (1) with an emission direction which comprises a semiconductor body (2). The semiconductor body comprises a plurality of active regions (4a, 4b) which are suitable for the generation of radiation and are arranged in a manner spaced apart from one another, a frequency-selective element (6) being formed in the semiconductor body.
    Type: Application
    Filed: December 5, 2006
    Publication date: June 28, 2007
    Applicant: Osram Opto Semiconductors GmbH
    Inventors: Marc Philippens, Tony Albrecht, Martin Muller, Wolfgang Schmid
  • Publication number: 20070145389
    Abstract: A light emitting device firstly includes a light emitting diode (LED) structure, having a top surface with a light emitting region. The device also has a heterojunction within the device structure, the heterojunction having a p-type and an n-type semiconductor layer, and a plurality of electrodes positioned on the top surface, each being electrically connected to one of the p-type and n-type semiconductor layers. At least a first and a second electrodes are connected to a same type semiconductor layer and are physically separated from each other. The device further includes a first and a second heterojunction regions within the heterojunction, each being respectively defined between one of the first and second electrodes and one of the other electrodes connected to the other type semiconductor layer. The first and second heterojunction regions are alternatively driven for emitting lights in the time domain.
    Type: Application
    Filed: December 23, 2005
    Publication date: June 28, 2007
    Inventors: Ming Lu, Geoffrey Shuy
  • Publication number: 20070145390
    Abstract: A nitride-based semiconductor device includes a diode provided on a semiconductor substrate. The diode contains a first nitride-based semiconductor layer made of non-doped AlXGa1-XN (0?X<1); a second nitride-based semiconductor layer made of non-doped or n-type AlYGa1-YN (0?Y?1, X<Y) having a lattice constant smaller than that of the first nitride-based semiconductor layer; a first electrode formed on the second nitride-based semiconductor layer; a second electrode formed on the second nitride-based semiconductor layer; and an insulating film that covers the second nitride-based semiconductor layer below a peripheral portion of the first electrode. In the diode, a recess structure portion is formed at a position near the peripheral portion of the first electrode on the second nitride-based semiconductor layer, and the first electrode covers the second nitride-based semiconductor layer and at least a part of the insulating film.
    Type: Application
    Filed: November 29, 2006
    Publication date: June 28, 2007
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Masahiko KURAGUCHI
  • Publication number: 20070145391
    Abstract: A vertical nitride semiconductor light emitting device and a manufacturing method thereof are provided. In the device, an ohmic contact layer, a p-type nitride semiconductor layer, an active layer, an n-type nitride semiconductor layer and an n-electrode are sequentially formed on a conductive substrate. At least one of a surface of the p-type nitride semiconductor layer contacting the ohmic contact layer and a surface of the n-type nitride layer contacting the n-electrode has a high resistance area of damaged nitride single crystal in a substantially central portion thereof. The high resistance area has a Schottky junction with at least one of the ohmic contact layer and the n-electrode.
    Type: Application
    Filed: October 24, 2006
    Publication date: June 28, 2007
    Inventors: Doo Go Baik, Bang Won Oh, Tae Jun Kim
  • Publication number: 20070145392
    Abstract: Light emitting devices and methods of fabricating light emitting devices having a current blocking mechanism below the wire bond pad are provided. The current blocking mechanism may be a reduced conduction region in an active region of the device. The current blocking mechanism could be a damage region of a layer on which a contact is formed. The current blocking mechanism could be a Schottky contact between an ohmic contact and the active region of the device. A semiconductor junction, such as a PN junction could also be provided between the ohmic contact and the active region.
    Type: Application
    Filed: March 2, 2007
    Publication date: June 28, 2007
    Inventors: Kevin Haberern, Michael Bergmann, Van Mieczkowski, David Emerson, John Edmond
  • Publication number: 20070145393
    Abstract: A light emitting device package including a transparent cover having an electrode pattern formed on a bottom surface thereof; a light emitting device installed below the transparent cover and electrically connected to an external circuit via the electrode pattern; a fixing resin which fixes the light emitting device onto the bottom surface of the transparent cover; and a metal slug provided under the fixing resin to dissipate heat away from the light emitting device.
    Type: Application
    Filed: July 31, 2006
    Publication date: June 28, 2007
    Inventors: Arthur Darbinian, Seung Tae Choi, Ki Hwan Kwon, Chang Youl Moon, Kyu Ho Shin
  • Publication number: 20070145394
    Abstract: A semiconductor light-emitting material includes a semiconductor substance including a matrix semiconductor whose constituent atoms are bonded to form a tetrahedral structure, an impurity atom S substituted for an atom in a lattice site of the matrix semiconductor, and an impurity atom I inserted in a interstitial site of the matrix semiconductor, the impurity atom S and the impurity atom I being bonded through charge transfer therebetween in a state that the impurity atom S has an electric charge coincident with that of the constituent atom of the matrix semiconductor and the impurity atom I has an electron configuration of a closed shell structure, in which the semiconductor substance is stretched in a direction of a bond forming the tetrahedral structure.
    Type: Application
    Filed: September 13, 2006
    Publication date: June 28, 2007
    Inventors: Tatsuo Shimizu, Kazushige Yamamoto, Shigeru Haneda
  • Publication number: 20070145395
    Abstract: A light emitting module including a light source set and a light guide member is provided. The light source set is suitable for providing a light and the light guide member is disposed above the light source set. The light guide member has a top surface, an opposite light incident surface, a first reflection surface, and an opposite light emergent surface connected between the top surface and the light incident surface. The top surface has a first concave surface serving a second reflection surface suitable for reflecting the light. Besides, a portion of the light reflected by the second reflection surface emerges from the light emergent surface through the reflection of the first reflection surface, and the other portion of the light directly emerges from the light emergent surface. Additionally, a surface light source device having the light emitting module is also provided.
    Type: Application
    Filed: October 26, 2006
    Publication date: June 28, 2007
    Applicant: CORETRONIC CORPORATION
    Inventors: Ming-Dah Liu, Tzeng-Ke Shiau, Wen-Bin Chou, Teng-Chao Hou
  • Publication number: 20070145396
    Abstract: A semiconductor light emitting device having high reflectivity and a high electrical contact property between a light reflection layer and a semiconductor layer is provided. The semiconductor light emitting device is formed by laminating a semiconductor layer, a light reflection layer and a protective layer on a substrate in this order. The semiconductor layer is formed by laminating a buffer layer, a GaN layer, an n-type contact layer, an n-type cladding layer, an active layer, a p-type cladding layer and a p-type contact layer in this order. The light reflection layer is formed by depositing an Ag alloy on a surface of the p-type contact layer while heating the substrate at, for example, a temperature from 100° C. to less than 400° C.
    Type: Application
    Filed: November 29, 2006
    Publication date: June 28, 2007
    Inventors: Yoshiaki Watanabe, Tomonori Hino, Toshimasa Kobayashi, Hironobu Narui
  • Publication number: 20070145397
    Abstract: An (Al, Ga, In)N light emitting diode (LED), wherein light extraction from chip and/or phosphor conversion layer is optimized. By novel shaping of LED and package optics, a high efficiency light emitting diode is achieved.
    Type: Application
    Filed: December 8, 2006
    Publication date: June 28, 2007
    Inventors: Steven DenBaars, Shuji Nakamura, James Speck
  • Publication number: 20070145398
    Abstract: Provided is a light emission diode package and a fabricating method thereof. The light emission diode package includes a heat sink having a groove, a printed circuit board on the heat sink, a light emission diode on the groove, a reflector coupled to the heat sink, a lead frame included in the reflector and electrically connecting the light emission diode to the printed circuit board and a molding unit on the light emission diode.
    Type: Application
    Filed: December 21, 2006
    Publication date: June 28, 2007
    Inventor: Kyoug Shin
  • Publication number: 20070145399
    Abstract: An LED package is improved in heat radiating performance. The LED package includes a package substrate having heat radiating means; a heat radiating layer arranged on the package substrate with an area at least larger than a mounting area of a light emitting diode chip to provide a horizontal heat radiating path; and an electrically-connecting structure including first and second conductive leads arranged on the heat radiating layer. The light emitting diode chip is mounted on the heat radiating layer or the first conductive lead by a heat conductive adhesive layer.
    Type: Application
    Filed: December 22, 2006
    Publication date: June 28, 2007
    Inventors: Jin Park, Young Yoon
  • Publication number: 20070145400
    Abstract: There is provided a semiconductor device mounted with a light emitting element, which can be downsized easily, improve light emitting efficiency and be formed easily, and a method for manufacturing the semiconductor device effectively. The semiconductor device includes a substrate, a light emitting element mounted on the substrate by flip chip bonding, a sealing structure sealing the light emitting element and a phosphor film which is formed on an internal surface of the sealing structure. The sealing structure includes a blocking portion which is formed integrally with the substrate so as to surround the light emitting element on the substrate and functions as a reflector that reflects a light emitted from the light emitting element and a cover portion which is arranged on the top of the blocking portion and is bonded to the blocking portion.
    Type: Application
    Filed: December 26, 2006
    Publication date: June 28, 2007
    Inventors: Masahiro Sunohara, Mitsutoshi Higashi, Yuichi Taguchi, Hideaki Sakaguchi, Akinori Shiraishi, Naoyuki Koizumi, Kei Murayama
  • Publication number: 20070145401
    Abstract: In the semiconductor light emitting device of the present invention, a reflective layer for reflecting light emitted by a semiconductor light emitting element is formed on a Cu wiring pattern, and a bonding section is formed on a light-emitting-element-mounting area on the Cu wiring pattern, to which an electrode of an LED chip is connected, the bonding section being made of a material allowing the semiconductor light emitting element to be soldered on the reflective layer without flux. Consequently, it is possible to realize a high-quality semiconductor light emitting device which has a semiconductor light emitting element firmly attached to a bonding surface and which is capable of emitting light while reducing deterioration in luminosity and color tone shift.
    Type: Application
    Filed: December 27, 2006
    Publication date: June 28, 2007
    Applicant: SHARP KABUSHIKI KAISHA
    Inventor: Masahiro Ikehara
  • Publication number: 20070145402
    Abstract: This invention describes a radiation-emitting semiconductor component with the a multilayered structure that contains a radiation-emitting active layer, and a window transparent to radiation that has a first principal face and a second principal face opposite the first principal face, and whose first principal face adjoins the multilayered structure. At least one recess is made in the window, which preferably has the form of an indentation of the second principal face or as an edge excavation. At least one lateral surface of the window or of the recess is provided at least partially with a contact surface. Alternatively or cumulatively, at least one contact surface of the component has a plurality of openings.
    Type: Application
    Filed: March 9, 2007
    Publication date: June 28, 2007
    Inventors: Dominik Eisert, Volker Harle, Frank Kuhn, Manfred Mundbrod-Vangerow, Uwe Strauss, Jacob Ulrich, Ernst Nirschl, Norbert Linder, Reinhard Sedlmeier, Ulrich Zehnder, Johannes Baur
  • Publication number: 20070145403
    Abstract: A luminescent device including a die pad lead composed of an inner lead and an outer lead, a case for uniting the inner lead, a light emitting diode chip mounted on a first predetermined position of one main surface of the inner lead, and a transparent sealing material portion for sealing the light emitting diode chip and a part of the one main surface. The case seals the inner lead other than an area sealed by the transparent sealing material portion, and the inner lead of the die pad lead has bending portions at least two places including a first bending portion and a second bending portion. A rear of the first predetermined position in the inner lead of the die pad lead is exposed outside the case, and the second bending portion is formed in the case so that the outer lead extends from a side of the case.
    Type: Application
    Filed: December 26, 2006
    Publication date: June 28, 2007
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Taizo TOMIOKA, Takahiro SUZUKI, Hiroyuki TOKUBO, Yukinori AOKI
  • Publication number: 20070145404
    Abstract: A semiconductor device made by mounting a light emitting element on a substrate, where an optically-transparent cover with a flat plate shape is installed on the light emitting element and a groove part for suppressing reflection of light emission of the light emitting element is formed in the cover.
    Type: Application
    Filed: December 26, 2006
    Publication date: June 28, 2007
    Inventors: Kei Murayama, Akinori Shiraishi, Masahiro Sunohara, Naoyuki Koizumi, Hideaki Sakaguchi, Mitsutoshi Higashi, Yuichi Taguchi
  • Publication number: 20070145405
    Abstract: Disclosed is a light-emitting device (100) has a light-emitting layer portion (24) which is composed of a group III-V compound semiconductor and a transparent thick-film semiconductor layer (90) with a thickness of not less than 40 ?m which is formed on at least one major surface side of the light-emitting layer portion (24) and composed of a group III-V compound semiconductor having a band gap energy larger than the photon energy equivalent of the peak wavelength of emission flux from the light-emitting layer portion (24). The transparent thick-film semiconductor layer (90) has a lateral surface portion (90S) which is a chemically etched surface. The dopant concentration of the transparent thick-film semiconductor layer (90) is not less than 5×1016/cm3 and not more than 2×1018/cm3. The light-emitting device can have a transparent thick-film semiconductor layer while being significantly improved in light taking-out efficiency from the lateral surface portion.
    Type: Application
    Filed: October 15, 2004
    Publication date: June 28, 2007
    Applicant: Shin -Etsu Handotai Co., Ltd.
    Inventors: Masato Yamada, Masayuki Shinohara, Masanobu Takahashi, Keizou Adomi, Jun Ikeda