Patents Issued in December 7, 2017
  • Publication number: 20170352417
    Abstract: Apparatus and methods utilize a replica circuit to generate a voltage for programming of a memory cell, such as a memory cell of a phase-change memory (PCM). Current passing through a circuit including the memory cell to be programmed is mirrored in a scaled or unscaled manner, and provided as an input to the replica circuit. The replica circuit represents voltage drops that should be encountered when programming the memory cell. An input voltage is also provided to the replica circuit, which affects the voltage drop within the replica circuit that represents the voltage drop of the cell. The voltage drop across the replica circuit can then be mirrored and provided to bias the circuit including the memory cell.
    Type: Application
    Filed: August 7, 2017
    Publication date: December 7, 2017
    Inventors: Umberto Di Vincenzo, Simone Lombardo
  • Publication number: 20170352418
    Abstract: A high-speed memory circuit architecture for arrays of resistive change elements is disclosed. An array of resistive change elements is organized into rows and columns, with each column serviced by a word line and each row serviced by two bit lines. Each row of resistive change elements includes a pair of reference elements and a sense amplifier. The reference elements are resistive components with electrical resistance values between the resistance corresponding to a SET condition and the resistance corresponding to a RESET condition within the resistive change elements being used in the array. A high speed READ operation is performed by discharging one of a row's bit lines through a resistive change element selected by a word line and simultaneously discharging the other of the row's bit lines through of the reference elements and comparing the rate of discharge on the two lines using the row's sense amplifier. Storage state data are transmitted to an output data bus as high speed synchronized data pulses.
    Type: Application
    Filed: August 14, 2017
    Publication date: December 7, 2017
    Inventors: Claude L. Bertin, Glen
  • Publication number: 20170352419
    Abstract: A memory device is able to store data using both on-chip dynamic random-access memory (“DRAM”) and nonvolatile memory (“NVM”). The memory device, in one aspect, includes NVM cells, word lines (“WLs”), a cell channel, and a DRAM mode select. The NVM cells are capable of retaining information persistently and the WLs are configured to select one of the NVM cells to be accessed. The cell channel, in one embodiment, is configured to interconnect the NVM cells to form a NVM string. The DRAM mode select can temporarily store data in the cell channel when the DRAM mode select is active.
    Type: Application
    Filed: August 25, 2017
    Publication date: December 7, 2017
    Inventor: Fu-Chang Hsu
  • Publication number: 20170352420
    Abstract: Methods, systems, and devices for operating a ferroelectric memory cell or cells are described. One method includes determining whether to access a first memory cell of a first memory cell array or a second memory cell of a second memory cell array, where a first digit line coupled to the first memory cell is coupled to a paging buffer register including a sense amplifier. The method further includes operating a transfer gate based at least in part on determining to read the second memory cell of the second memory cell array, where the transfer gate is configured to selectively couple a second digit line coupled to the second memory cell to the paging buffer register through the first digit line.
    Type: Application
    Filed: July 31, 2017
    Publication date: December 7, 2017
    Inventor: Kazuhiko Kajigaya
  • Publication number: 20170352421
    Abstract: Various embodiments comprise apparatuses and methods including a three-dimensional memory apparatus having upper strings and lower strings. The upper strings can include a first string of memory cells and a second string of memory cells arranged substantially parallel and adjacent to one another. The lower strings can include a third string of memory cells and a fourth string of memory cells arranged substantially parallel and adjacent to one another. The strings can each have a separate sense amplifier coupled thereto. The first and third strings and the second and fourth strings can be configured to be respectively coupled in series with each other during a read operation. Additional apparatuses and methods are described.
    Type: Application
    Filed: August 25, 2017
    Publication date: December 7, 2017
    Inventor: Toru Tanzawa
  • Publication number: 20170352422
    Abstract: A solid state drive (SSD) with improved power efficiency includes one or more non-volatile memory devices configured to operate according to a programming voltage for a program function or an erase function and to a supply voltage for a read function. The SSD also includes a voltage regulator, external of the one or more non-volatile memory devices, having an output connected to the one or more non-volatile memory devices to supply the programming voltage and an input connected to receive a first voltage, the voltage regulator configured to convert the first voltage to the programming voltage. A discrete capacitor is connected to supply the first voltage to the voltage regulator. The one or more non-volatile memory devices operate according to the programming voltage supplied by the voltage regulator during both the normal operation of the SSD and in the event of a power loss or failure of the SSD.
    Type: Application
    Filed: June 6, 2016
    Publication date: December 7, 2017
    Inventor: Stephen K. Pardoe
  • Publication number: 20170352423
    Abstract: Systems and methods for managing data retention in a solid-state storage system utilizing data retention flag bytes are disclosed. A data storage device includes a non-volatile memory comprising a plurality of non-volatile memory devices and a controller configured to write data to a memory unit of the non-volatile memory array and write a data retention flag value indicating a number of bits of the written data programmed in a first of a plurality of logical states. The controller is further configured to read the data and determine a number of bits having the first of the plurality of logical states in the read data, and determine a difference between the number of bits of the written data programmed in the first logical state and the number of bits having the first logical state in the read data. The difference is used to determine data retention characteristics of the non-volatile memory.
    Type: Application
    Filed: April 10, 2017
    Publication date: December 7, 2017
    Inventors: Dengtao Zhao, Yongke Sun, Haibo Li, Jui-Yao Yang, Kroum Stoev
  • Publication number: 20170352424
    Abstract: Provided are several preferred options of 3D hierarchical NAND arrays being formed in a (2D DL//3D LBL)?(3D CSL//3D WL) scheme and their associated 2D PBs are preferably formed right below the 3D array but on the reversed side of Psub so that the large silicon areas of most 2D peripheral circuits can be saved and the various 3D nLC NAND operations can be performed in more powerful pipeline and concurrent manner with a dramatic reduction in latency and power consumption. The preferred various 3D hierarchical NAND memories comprise a plurality of divided 3D sub-arrays for nLC storage, a plurality of 3D N-bit Cstring-based DCRs with minimum memory capacity to store 3×2n pages of program data when a 3-WL rotational nLC program scheme is adopted, and a plurality of distributed N-bit PBs with same number of LBL lines.
    Type: Application
    Filed: June 7, 2017
    Publication date: December 7, 2017
    Inventor: Peter Wung Lee
  • Publication number: 20170352425
    Abstract: A non-volatile semiconductor memory device in which, while voltage from a first control line is applied, as a memory gate voltage, to a sub control line through a switching transistor, another switching transistor can block voltage application to a corresponding sub control line. Thus, while a plurality of memory cells are arranged in one direction along the first control line, the number of memory cells to which a memory gate voltage is applied can reduced by the switching transistor, which reduces the occurrence of disturbance, accordingly. The sub control line to which the memory gate voltage is applied from the first control line is used as the gates of memory transistors, and thus the sub control line and the gates are disposed in a single wiring layer, thereby achieving downsizing as compared to a case in which the sub control line and the gates are disposed in separate wiring layers.
    Type: Application
    Filed: December 11, 2015
    Publication date: December 7, 2017
    Inventors: Hideo Kasai, Yasuhiro Taniguchi, Yutaka Shinagawa, Ryotaro Sakurai, Yasuhiko Kawashima, Kosuke Okuyama
  • Publication number: 20170352426
    Abstract: Apparatus and methods are disclosed, including a method that raises an electrical potential of a plurality of access lines to a raised electrical potential, where each access line is associated with a respective charge storage device of a string of charge storage devices. The electrical potential of a selected one of the access lines is lowered, and a data state of the charge storage device associated with the selected access line is sensed while the electrical potential of the selected access line is being lowered. Additional apparatus and methods are described.
    Type: Application
    Filed: August 24, 2017
    Publication date: December 7, 2017
    Inventor: Toru Tanzawa
  • Publication number: 20170352427
    Abstract: According to one embodiment, a distribution of threshold voltages of a plurality of memory cells is acquired from a nonvolatile memory which includes the plurality of memory cells, a malfunction state occurring in the nonvolatile memory is identified based on a shape of the distribution, and a read voltage when data is read out of the nonvolatile memory is set to a voltage value corresponding to a type of the malfunction state.
    Type: Application
    Filed: August 25, 2017
    Publication date: December 7, 2017
    Applicant: TOSHIBA MEMORY CORPORATION
    Inventor: Tsuyoshi ATSUMI
  • Publication number: 20170352428
    Abstract: A non-volatile memory device includes a memory cell array including a plurality of memory cells, wherein at least one selected memory cell that is selected from among the plurality of memory cells is programmed based on a high voltage, a high voltage generator configured to generate the high voltage by boosting an input voltage based on a pumping clock, a pumping clock generator configured to generate the pumping clock, a program current controller configured to adjust a program current flowing in the at least one selected memory cells, and a control logic configured to control a frequency of the pumping clock and an amount of the program current based on a time in a program section in which the at least one selected memory cell is programmed.
    Type: Application
    Filed: June 1, 2017
    Publication date: December 7, 2017
    Inventors: Ho-young SHIN, Myeong-hee OH, Ji-sung KIM
  • Publication number: 20170352429
    Abstract: Apparatuses and memory refresh methods are disclosed, such as those involving checking a portion of a memory device for errors in response to the memory device being powered on, and reprogramming corrected data to the memory device if errors are found in checking the portion of the nonvolatile memory for errors. Other apparatuses and memory refresh methods are disclosed.
    Type: Application
    Filed: August 23, 2017
    Publication date: December 7, 2017
    Inventor: Greg A. Blodgett
  • Publication number: 20170352430
    Abstract: A non-volatile memory system includes one or more control circuits configured to program memory cells and verify the programming. The verifying of the programmed memory cells includes applying one or more voltages to perform boosting of a channel region associated with unselected memory cells, allowing the boosting of the channel region for a portion of time while applying the one or more voltages, preventing/interrupting the boosting of the channel region while applying the one or more voltages for a duration of time based on position of a memory cell selected for verification, applying a compare signal to the memory cell selected for verification, and performing a sensing operation for the memory cell selected for verification in response to the compare signal.
    Type: Application
    Filed: June 3, 2016
    Publication date: December 7, 2017
    Applicant: SANDISK TECHNOLOGIES LLC
    Inventors: Hong-Yan Chen, Yingda Dong
  • Publication number: 20170352431
    Abstract: Memory devices include an array of memory cells and circuitry for control and/or access of the array of memory cells, wherein the circuitry is configured to perform a method including applying a particular voltage to an unselected access line of a program operation, sensing a current of a selected access line of the program operation while applying the particular voltage to the unselected access line, indicating a fail status of the program operation if an absolute value of the sensed current of the selected access line is greater than a particular current, and proceeding with the program operation if the absolute value of the sensed current of the selected access line is less than a particular current.
    Type: Application
    Filed: August 25, 2017
    Publication date: December 7, 2017
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Jeffrey A. Kessenich, Joemar Sinipete, Chiming Chu, Jason L. Nevill, Kenneth W. Marr, Renato C. Padilla
  • Publication number: 20170352432
    Abstract: An e-fuse device includes a transferring circuit, a detecting-and-outputting circuit, and a fusing circuit. The transferring circuit transfers an input signal to a data node. The detecting-and-outputting circuit generates an output signal according to the logic level of the data node. The fusing circuit includes an e-fuse cell, a first transistor, a second transistor, and a switch element. The e-fuse cell is coupled between a high-voltage node supplied with the high voltage or a ground and a first node. The first transistor is coupled between the first node and a second node and is controlled by the output signal. The second transistor is coupled between the second node and the ground and is controlled by a fusing signal. The switch element is coupled between the first node and the data node and is controlled by a switch signal.
    Type: Application
    Filed: June 5, 2017
    Publication date: December 7, 2017
    Inventor: Ying-Te TU
  • Publication number: 20170352433
    Abstract: A memory device includes a memory cell array, a multiplexing circuit, and a control logic circuit. The memory cell array includes a first sub memory cell array, a second sub memory cell array, and a third sub memory cell array. The multiplexing circuit selects the first sub memory cell array, the second sub memory cell array, and the third sub memory cell array in a first mode of operation, and when the first sub memory cell array is defective in a second mode of operation, the multiplexing circuit selects the second sub memory cell array and the third sub memory cell array. The control logic circuit selects the first mode of operation or the second mode of operation. The control logic circuit controls the multiplexing circuit so that the first, second and third sub memory cell arrays are connected to input or output pads.
    Type: Application
    Filed: March 6, 2017
    Publication date: December 7, 2017
    Inventors: Jongpil SON, Hosung SONG, Wonchang JUNG
  • Publication number: 20170352434
    Abstract: A memory device may include a memory cell array including a plurality of memory cells, and an internal operation circuit configured to perform a test operation in a test mode using a parallel bit operation of simultaneously comparing a plurality of bits and also perform an internal operation including a comparison operation with respect to external data in a normal mode other than the test mode using the parallel bit operation.
    Type: Application
    Filed: May 20, 2017
    Publication date: December 7, 2017
    Inventors: Je-min RYU, Hak-soo YU, Reum OH, Seong-young SEO, Soo-jung RHO
  • Publication number: 20170352435
    Abstract: Methods, apparatuses, devices, and systems for producing and controlling and fusion activities of nuclei. Hydrogen atoms or other neutral species (neutrals) are induced to rotational motion in a confinement region as a result of ion-neutral coupling, in which ions are driven by electric and magnetic fields. The controlled fusion activities cover a spectrum of reactions including aneutronic reactions such as proton-boron-11 fusion reactions.
    Type: Application
    Filed: May 12, 2017
    Publication date: December 7, 2017
    Inventor: Alfred Y. Wong
  • Publication number: 20170352436
    Abstract: Exemplary embodiments provide automated nuclear fission reactors and methods for their operation. Exemplary embodiments and aspects include, without limitation, re-use of nuclear fission fuel, alternate fuels and fuel geometries, modular fuel cores, fast fluid cooling, variable burn-up, programmable nuclear thermostats, fast flux irradiation, temperature-driven surface area/volume ratio neutron absorption, low coolant temperature cores, refueling, and the like.
    Type: Application
    Filed: September 14, 2010
    Publication date: December 7, 2017
    Applicant: Searete LLC
    Inventors: Roderick A. Hyde, Muriel Y. Ishikawa, Nathan P. Myhrvold, Lowell L. Wood, JR.
  • Publication number: 20170352437
    Abstract: One embodiment provides a multi-segment rod that includes a plurality of rod segments. The rod segments are removably mated to each other via mating structures in an axial direction. An irradiation target is disposed within at least one of the rod segments, and at least a portion of at least one mating structure includes one and/or more combinations of neutron absorbing materials.
    Type: Application
    Filed: September 10, 2010
    Publication date: December 7, 2017
    Applicant: GE-HITACHI NUCLEAR ENERGY AMERICAS LLC
    Inventors: Russell Patrick Higgins, Vernon W. Mills, David Grey Smith, Gerald Anthony Luciano, Roger Howard Van Slyke, William Earl Russell, II, Bradley D. Bloomquist
  • Publication number: 20170352438
    Abstract: A nuclear fuel assembly having a bottom nozzle with protrusions that extend from the upstream (lower or fluid entry) and downstream (upper or fluid exit) side of a horizontally supported perforated flow plate. The protrusions have a funnel-like shape that gradually decreases the lateral flow area on the upstream side of the perforated flow plate and gradually increases the lateral flow area on the downstream side of the perforated plate. The protrusions on the downstream side are preferably recessed to accommodate the ends of the fuel rods.
    Type: Application
    Filed: April 3, 2014
    Publication date: December 7, 2017
    Applicant: Westinghouse Electric Company LLC
    Inventors: Kirkland D. Broach, Michael L. Lewis, Mark W. Peterson, David S. Huegel, Peyton M. Frick
  • Publication number: 20170352439
    Abstract: A control rod drive replacement device is provided.
    Type: Application
    Filed: September 1, 2015
    Publication date: December 7, 2017
    Inventors: Kurt David KLAHN, Patrick GRUENEWALD, Dorian Tim LAMBERT
  • Publication number: 20170352440
    Abstract: An automated system for on-line monitoring and coil diagnostics of rod position indicator (RPI) coils coil diagnostic, or RPI coil diagnostic system. The RPI coil diagnostic system performs coil diagnostics for a RPI system in a nuclear power plant. The RPI coil diagnostic system is in electrical communication with and monitors the outputs of the detector coils. The RPI coil diagnostic system measures characteristics of the detector coils that are indicative of the health of the detector coils and/or the connections between the detector coils and the RPI electronics.
    Type: Application
    Filed: June 16, 2017
    Publication date: December 7, 2017
    Applicant: Analysis and Measurement Services Corporation
    Inventors: Gregory W. Morton, Hashem M. Hashemian, Brent D. Shumaker
  • Publication number: 20170352441
    Abstract: A conduit housing includes a top face, a pair of side faces disposed opposite each other and adjacent to the top face, a front side, and a rear side. The top face includes a plurality of vertical conduit ports arranged in a plurality of rows. The front side is positioned between the pair of side faces and defines a plurality of stepped faces. The rear side is disposed opposite the front side and adjacent the top face. The stepped faces include a plurality of downward faces and each of the plurality of downward faces defines a downward face plane. The stepped faces also include a plurality of upward faces, where each of the plurality of upward faces defines an upward face plane. Each upward face includes a plurality of pitched conduit ports.
    Type: Application
    Filed: December 13, 2016
    Publication date: December 7, 2017
    Applicant: TerraPower, LLC
    Inventors: Peter W. Gibbons, P. Harley Park
  • Publication number: 20170352442
    Abstract: Fuel assembly for a nuclear reactor comprising a housing of longitudinal axis (X) having a central section containing nuclear-fuel pins and an upper section, forming a portion of the head of the assembly, containing a upper neutron shielding device (NSD) including neutron absorbers and means for reversibly interlocking with the housing and a moveable weight forming the head of the NSD, which is mounted so as to be able to move translationally relative to the rest of the NSD over a given path, said interlocking means being configured so that the NSD and the housing can be interlocked and uninterlocked by moving the moveable weight along the longitudinal axis by means of a grapple for extraction of the NSD, the claws of this grapple engaging with the moveable weight and the rest of the NSD being in downward longitudinal abutment in the interior of the housing.
    Type: Application
    Filed: December 18, 2015
    Publication date: December 7, 2017
    Inventors: Denis Lorenzo, Thierry Beck, Guy Mailhe
  • Publication number: 20170352443
    Abstract: Systems and methods for upgrading power output of previously-deployed nuclear power plants are described. Systems and methods may include a base nuclear power plant with a predetermined base power output rating and a predetermined base whole core refueling interval. Systems and methods may also include a power upgrade kit for increasing the base power output rating from the base power output rating to an increased power output rating without a change in fuel charge, reactor structures, or civil structures.
    Type: Application
    Filed: June 5, 2017
    Publication date: December 7, 2017
    Inventor: Leon C. Walters
  • Publication number: 20170352444
    Abstract: A shutter for controlling radiation exposure includes a rotatable member. The rotatable member is rotatable between an open position and a closed position. The rotatable member includes a passageway, wherein the passageway is positioned to receive radiation in the open position and is not positioned to receive radiation in the closed position. In the closed position, the rotatable member may substantially block or absorb the radiation. The passageway may collimate the radiation into a beam of radiation. The rotatable member may include a plurality of passageways positioned to receive radiation in the open position. The rotatable member may be rotatable between a plurality of open positions, each open position corresponding to at least one passageway. The open positions may align the source of radiation with different passageways in the rotatable member to form a different beam shape, a different number of beams, a different beam direction, or combinations thereof.
    Type: Application
    Filed: June 6, 2017
    Publication date: December 7, 2017
    Applicants: University of Florida Research Foundation, Incorporated, GEORGETOWN RAIL EQUIPMENT COMPANY
    Inventors: Charles Wayne AARON, Shuang CUI, Michael John LIESENFELT, Paul Daniel RIDGEWAY, James Edward BACIAK, Jeb Everett BELCHER
  • Publication number: 20170352445
    Abstract: A scintillator for imaging using X-rays or gamma rays or charged particles, includes a network of glass capillaries with an inner diameter no greater than 500 micrometers. The capillaries are filled with a polymer material made up of at least: (i) a monomer selected from the group including vinyltoluene, styrene and vinylxylene and the isomers thereof, (ii) a cross-linking agent made up of a dimethacrylate having a central chain which includes 1 to 12 carbon atoms, and (iii) lead dimethacrylate. The cross-linking agent is provided to make up 17 wt % to 60 wt % of the mixture thereof with the monomer, and the lead dimethacrylate makes up at least 5 wt %. The cross-linking agent is provided in a ratio of 1.75 to 2.25 times the weight content of the lead dimethacrylate.
    Type: Application
    Filed: December 18, 2015
    Publication date: December 7, 2017
    Inventors: Stéphane DARBON, Tony CAILLAUD, Adrien ROUSSEAU, Matthieu HAMEL
  • Publication number: 20170352446
    Abstract: The present invention discloses a graphene/porous iron oxide nanorod composite and a method for preparing the same. The composite includes graphene and Fe2O3 nanoparticles loaded on the graphene. The Fe2O3 nanoparticles have a honeycomb porous structure. The synthesis method of the composite is simple and the raw materials are inexpensive.
    Type: Application
    Filed: September 14, 2015
    Publication date: December 7, 2017
    Inventors: Weiqin SHENG, Qiang LV, Hesun ZHU
  • Publication number: 20170352447
    Abstract: Disclosed are an organic heterocyclic compound represented by Chemical Formula A and an organic light-emitting diode comprising the same. wherein substituents R1 to R8, X1 to X4, W1, and Y1 are each as defined in the specification.
    Type: Application
    Filed: May 30, 2017
    Publication date: December 7, 2017
    Inventors: Se-jin Lee, Seok-Bae PARK, Taejung YU, Byung-sun YANG, Yeong-tae CHOI
  • Publication number: 20170352448
    Abstract: The invention relates to power cable polymer composition which comprises a thermoplastic polyethylene having a chlorine content which is less than X, wherein X is 10 ppm, a power cable, for example, a high voltage direct current (HV DC), a power cable polymer insulation, use of a polymer composition for producing a layer of a power cable, and a process for producing a power cable.
    Type: Application
    Filed: December 18, 2015
    Publication date: December 7, 2017
    Inventors: Villgot ENGLUND, Per-Ola HAGSTRAND, Virginie ERIKSSON, Annika SMEDBERG
  • Publication number: 20170352449
    Abstract: A wire harness includes a conductive path including a braided part and a sheath member accommodating the conductive path so as to protect the conductive path. The braided part is provided as an outermost layer of the conductive path. The braided part includes a cushion part having elasticity in a radial direction of the conductive path and projecting outward in the radial direction toward the sheath member.
    Type: Application
    Filed: June 1, 2017
    Publication date: December 7, 2017
    Applicant: YAZAKI CORPORATION
    Inventors: Toshihiro NAGASHIMA, Hideomi ADACHI, Takeshi OGUE, Masahide TSURU, Hiroyuki YOSHIDA, Kenta YANAZAWA
  • Publication number: 20170352450
    Abstract: A shielded electrical cable includes one or more conductor sets extending along a length of the cable and being spaced apart from each other along a width of the cable. Each conductor set has one or more conductors having a size no greater than 24 AWG and each conductor set has an insertion loss of less than about -20 dB/meter over a frequency range of 0 to 20 GHz. First and second shielding films are disposed on opposite sides of the cable, the first and second films including cover portions and pinched portions arranged such that, in transverse cross section, the cover portions of the first and second films in combination substantially surround each conductor set, and the pinched portions of the first and second films in combination form pinched portions of the cable on each side of each conductor.
    Type: Application
    Filed: August 18, 2017
    Publication date: December 7, 2017
    Inventor: Douglas B. Gundel
  • Publication number: 20170352451
    Abstract: A Metal-Clad (MC) cable assembly is provided. In one approach, the MC cable assembly includes a core having a plurality of conductors laid parallel to one another, each of the plurality of conductors including an electrical conductor and insulation, with or without a jacket layer. The MC cable assembly further includes a metal sheath disposed over the core. In some approaches, the MC cable assembly further includes an assembly tape disposed around the plurality of conductors. In some approaches, the MC cable assembly further includes a subassembly having a set of conductors, and an assembly jacket layer disposed over the subassembly. In some approaches, a polymeric protective layer is provided over an insulation layer of one or more of the plurality of conductors and the subassembly. In some approaches, a bonding/grounding conductor may also be cabled with the plurality of conductors.
    Type: Application
    Filed: May 26, 2017
    Publication date: December 7, 2017
    Inventors: David Campbell, George Anthony Straniero
  • Publication number: 20170352452
    Abstract: In a communication cable having a multi-core cable with a plurality of core cables in which a pair of signal lines are covered with an insulator, in which the insulator is covered with a shield tape, and in which the shield tape is covered with a wrapping tape, and having a connector formed on an end portion of the multi-core cable, the communication cable further has a case which is inserted/removed to/from a slot formed on a communication device to which the communication cable is connected, a substrate which is housed in the case and to which an end portion of the multi-core cable is connected, and a resin portion which molds a connection portion between the end portion of the multi-core cable and the substrate.
    Type: Application
    Filed: June 1, 2017
    Publication date: December 7, 2017
    Inventors: Hideki NONEN, Takashi KUMAKURA
  • Publication number: 20170352453
    Abstract: The present invention is a superconducting stabilization material used for a superconducting wire, which is formed of a copper material which contains: one or more types of additive elements selected from Ca, La, and Ce in a total of 3 ppm by mass to 400 ppm by mass; and a balance being Cu and inevitable impurities and in which a total concentration of the inevitable impurities excluding O, H, C, N, and S which are gas components is 5 ppm by mass to 100 ppm by mass.
    Type: Application
    Filed: December 24, 2015
    Publication date: December 7, 2017
    Applicant: MITSUBISHI MATERIALS CORPORATION
    Inventors: Kosei FUKUOKA, Yuki ITO, Kazunari MAKI
  • Publication number: 20170352454
    Abstract: A superconductive cable including: a former; one or more superconductive conductor layers provided outside the former; an insulating layer configured to surround the superconductive conductor layers; and one or more superconductive shield layers provided on an exterior of the insulating layer. The superconductive conductor layers and the superconductive shield layers are formed of superconductive wire rods, and each superconductive wire rod includes a metal substrate layer and a plurality of superconducting layers deposited on the metal substrate layer using a superconductive material. In the superconductive wire rods of an outermost superconductive conductor layer among the superconductive conductor layers and an innermost superconductive shield layer among the superconductive shield layers, each of the metal substrate layers and the superconducting layers are disposed in opposite directions.
    Type: Application
    Filed: November 11, 2014
    Publication date: December 7, 2017
    Applicant: LS Cable & System LTD.
    Inventors: Jin Bae NA, Han Joong KIM, Young Woong KIM, Chang Yeol CHOI, Heo Gyung SUNG, Seok Ju LEE
  • Publication number: 20170352455
    Abstract: A method for producing MnZn-ferrite comprising Fe, Mn and Zn as main components, and at least Co, Si and Ca as sub-components, the main components in the MnZn-ferrite comprising 53-56% by mol (as Fe2O3) of Fe, and 3-9% by mol (as ZnO) of Zn, the balance being Mn as MnO, comprising the step of sintering a green body to obtain MnZn-ferrite; the sintering comprising a temperature-elevating step, a high-temperature-keeping step, and a cooling step; the high-temperature-keeping step being conducted at a keeping temperature of higher than 1050° C. and lower than 1150° C. in an atmosphere having an oxygen concentration of 0.4-2% by volume; the oxygen concentration being in a range of 0.001-0.2% by volume during cooling from 900° C. to 400° C. in the cooling step; and the cooling speed between (Tc+70)° C. and 100° C. being 50° C./hour or more, wherein Tc represents a Curie temperature (° C.) calculated from % by mass of Fe2O3 and ZnO.
    Type: Application
    Filed: December 24, 2015
    Publication date: December 7, 2017
    Applicant: HITACHI METALS, LTD.
    Inventors: Norikazu KOYUHARA, Yasuharu MIYOSHI, Tomoyuki TADA, Satoru TANAKA
  • Publication number: 20170352456
    Abstract: The invention relates to a device and a method for adjusting an inductance of at least one electric conductor. The device includes an adjustment arrangement with a first magnetically conductive element and at least a second magnetically conductive element. The adjustment arrangement includes at least a first spacer element arranged in between the first magnetically conductive element and the second magnetically conductive element.
    Type: Application
    Filed: December 16, 2015
    Publication date: December 7, 2017
    Inventors: Robert Czainski, Daniel Wilhelm Oellingrath
  • Publication number: 20170352457
    Abstract: A marker coil includes a flexible substrate, a coil formed on the substrate by wiring, and a substrate holding part that is capable of being attached to a testee. A convex shape is formed in one of the substrate and the substrate holding part, and an engaging part for engaging the convex shape is formed in the other one of the substrate and the substrate holding part.
    Type: Application
    Filed: May 30, 2017
    Publication date: December 7, 2017
    Applicant: Ricoh Company, Ltd.
    Inventors: Hiroshi KUBOTA, Yasuyuki KAWABUCHI
  • Publication number: 20170352458
    Abstract: Individual coils as well as two or more coils arranged one over the other or one coil in combination with a sensor, which can be integrated into planar semiconductor technology are described. A coil comprises a turn and two supply lines for supplying current to the coil. The turn and the supply lines are formed from a metal layer. One of the two supply lines is connected to a first end of the turn and the other of the two supply lines is connected to a second end of the turn.
    Type: Application
    Filed: June 6, 2017
    Publication date: December 7, 2017
    Inventors: Ralf LERNER, Siegfried HERING
  • Publication number: 20170352459
    Abstract: An oblique angle polarized magnet includes a rectangular magnetized permanent magnet having a grain direction, an attraction surface, and a magnetic primary field line that is orthogonal to the grain direction but non-orthogonal to the attraction surface. The oblique angle polarized magnet may be used in a magnetically positioned apparatus, such as a tablet computing device cover operable as a stand for the tablet computing device. The magnetically positioned apparatus may be configured to assume a position where first and second magnets are oriented in a non-parallel orientation such that the first and second surfaces of the magnets oriented at an acute angle with respect to each other. The magnets may facilitate the position.
    Type: Application
    Filed: June 6, 2016
    Publication date: December 7, 2017
    Inventors: Timothy W. Scales, Hao Zhu, Samuel G. Smith
  • Publication number: 20170352460
    Abstract: A magnetic field generation apparatus (6) of a magnetorheological polishing device comprises at least one electromagnetic pole set capable of producing a gradient magnetic field and consisting of two electromagnetic poles having opposing polarities; the electromagnetic poles forming the electromagnetic pole set uses at least two annular magnetic poles arranged in concentric circles, wherein the polarities of two adjacent magnetic poles are opposing. The apparatus (6) is used for processing a multi-degree of freedom movement workpiece with a magnetorheological fluid, and with single clamping, is capable of simultaneously performing polishing processing on the outer surface(s) of one or more workpieces, the outer surfaces of which may be flat surfaces, cambered surfaces or complex curved surfaces. The apparatus (6) effectively solves the problem of it being difficult to finish complex shaped surfaces, reduces workpiece processing procedures, and effectively increases polishing efficiency.
    Type: Application
    Filed: October 17, 2016
    Publication date: December 7, 2017
    Inventors: Liang Xu, Yongfu Chen, Jun Xu, Zhi Li, Feng Wei
  • Publication number: 20170352461
    Abstract: A power converter module is connected to an electrical power supply and is configured to generate a first voltage and a second voltage for controlling operation of a valve, where the valve includes a solenoid for affecting opening and closing of the valve. The first voltage is a boost voltage for accelerating opening of the valve. The second voltage is a holding voltage for maintaining the valve in an open state. A boost control module is configured to control supply of the first voltage to the solenoid of the valve in accordance with a first state of an opening boost control signal when a valve control signal directs opening of the valve, and is configured to control supply of the second voltage to the solenoid of the valve in accordance with a second state of the opening boost control signal when the valve control signal directs opening of the valve.
    Type: Application
    Filed: June 3, 2016
    Publication date: December 7, 2017
    Inventors: Devon Pelkey, Dirk Rudolph
  • Publication number: 20170352462
    Abstract: To provide a solenoid configured so that vibration and noise in energization can be reduced. A solenoid 1 is configured to use magnetic action in energization of a coil 2 to drive, in an axial direction, a core 4 at least including a first magnetic resistor. The solenoid 1 includes a shaft 5 attached to the core 4, and bearings 6, 7 supporting both end portions of the core. The solenoid 1 further includes a second magnetic resistor 4b configured to generate force for moving at least the core 4 in a radial direction by the magnetic action.
    Type: Application
    Filed: January 26, 2016
    Publication date: December 7, 2017
    Inventors: Akira ONO, Jun MIHARA
  • Publication number: 20170352463
    Abstract: Methods and systems are provided for operating an electromagnetic coil assembly. As one example, a method comprises responsive to energization of an electromagnetic coil of an electromagnetic coil assembly, translating the electromagnetic coil along a central axis of the electromagnetic coil assembly toward a magnetic armature while maintaining the armature fixed along the central axis. The electromagnetic coil assembly may be utilized within various clutching, braking, or lever applications.
    Type: Application
    Filed: August 24, 2017
    Publication date: December 7, 2017
    Inventors: Oliver Heravi, Adrian Simula, Bryan Averill
  • Publication number: 20170352464
    Abstract: A linear variable displacement transformer (LVDT) position sensor. The position sensor comprises a bobbin, a primary coil of wire wound on the bobbin, a first secondary coil wound in stepped layers on the bobbin, and a second secondary coil wound in stepped layers on the bobbin. The first secondary coil comprises a plurality of booster windings at an end of the first secondary coil. The second secondary coil comprises a plurality of booster windings at an end of the second secondary coil opposite the end of the first secondary coil booster windings. The stepped windings of the second secondary coil are complementary to the stepped windings of the first secondary coil.
    Type: Application
    Filed: June 1, 2016
    Publication date: December 7, 2017
    Inventors: Paresh Sanchihar, Murgesh R. Sajjan, Subramanian Esakki, Aaron Daniels, John Jerred
  • Publication number: 20170352465
    Abstract: A cooling fan variable-frequency control system for a power transformer includes a control device and a fan unit. The control device includes a microprocessor that is set with a first temperature range, a second temperature range higher than the first temperature range, and a fan switching time. The microprocessor is connected to a temperature sensor for detecting a temperature of an insulating oil in a power transformer. A variable-frequency controller and a fixed-frequency controller are connected to the microprocessor and are connected to a switching controller. The fan unit is connected to the switching controller and includes first and second fans. The microprocessor controls the switching controller according to the fan switching time to thereby control the variable-frequency controller to connect with the first fan or the second fan. The first fan and the second fan can operate at a fixed frequency and at a variable frequency.
    Type: Application
    Filed: June 1, 2016
    Publication date: December 7, 2017
    Inventors: Ming-He Lin, Chia-Ching Lin
  • Publication number: 20170352466
    Abstract: It has been difficult to manufacture a large-capacity transformer having a laminated iron core structure using an amorphous alloy material easily. A laminated iron core structure includes a laminated iron core configured by aligning a plurality of laminated iron core blocks each configured by laminating iron core materials in a direction different from a lamination direction, a first frame extending along an outer periphery of the laminated iron core and a partition plate arranged between the plurality of laminated iron core blocks.
    Type: Application
    Filed: December 7, 2015
    Publication date: December 7, 2017
    Inventors: Makoto SHINOHARA, Kunihiko ANDO, Yoichi AMAKO, Kohei SATO