Forming An Intended Mixture (excluding Mixed Crystal) (e.g., Doped) Patents (Class 117/19)
  • Publication number: 20040025783
    Abstract: It is an object of the present invention to provide a hydrogen-doped silica powder that is useful in the formation of a quartz glass crucible that is capable of pulling a silicon single crystal without causing a state having dislocations in the silicon single crystal due to peeling of quartz glass segment. It is a further object of the invention to provide a quartz glass crucible for use in pulling a silicon single crystal whose inner surface is formed by use of the hydrogen-doped silica powder and a producing method of the silica powder.
    Type: Application
    Filed: May 16, 2003
    Publication date: February 12, 2004
    Inventors: Yasuo Ohama, Takayuki Togawa
  • Patent number: 6685772
    Abstract: Computer programs and computer-implemented methods for predicting from first principles the behavior of dopants and defects in the processing of electronic materials. The distribution of dopant and defect components in a substrate lattice is predicted based on external conditions and fundamental data for a set of microscopic processes that can occur during material processing operations. The concentration behavior of one or more fast components is calculated in two stages, by solving a first relationship for a time period before the fast component reaches a pseudo steady state at which the concentration of the fast component is determined by concentrations of one or more second components, and by solving a second relationship for a time period after the first component reaches the pseudo steady state. Application of these methods to modeling ultrashallow junction processing is also described.
    Type: Grant
    Filed: March 28, 2002
    Date of Patent: February 3, 2004
    Assignee: California Institute of Technology
    Inventors: William A. Goddard, III, Gyeong S. Hwang
  • Patent number: 6660082
    Abstract: A method for doping a melt with a dopant has the melt being provided in a crucible. The dopant is introduced into a vessel and the vessel is immersed in the melt, the dopant being transferred into the melt through an opening which forms in the vessel. There is also an apparatus which comprises a vessel containing the dopant and a device which is connected to the vessel, for lowering the vessel into a melt and for lifting the vessel out of the melt, the vessel being provided with an opening which is blocked by a closure piece which is of the same type of material as the melt and melts when it is brought into contact with the melt.
    Type: Grant
    Filed: February 14, 2001
    Date of Patent: December 9, 2003
    Assignee: Wacker Siltronic Gesellschaft für Halbleitermaterialien AG
    Inventors: Martin Weber, Erich Gmeilbauer, Robert Vorbuchner, Walter Neumaier, Peter Vilzmann
  • Patent number: 6652824
    Abstract: A method of growing a crystalline ingot having a <110> orientation, such as a dislocation-free (“DF”) crystalline ingot, is provided. The method of manufacture includes providing a liquidous melt. Next, a seed crystal having a <110> crystal direction is contacted with the surface of the melt. The seed crystal is then withdrawn from the melt to thereby grow a neck. According to one embodiment, the seed elevation rate is automatically modified during the withdrawing step to reduce the diameter of the neck to greater than about 2.5 mm. Thereafter, the seed elevation rate is manually modified to alternate the diameter of the neck between about 2 mm and about 2.5 mm to thereby shape the neck into a recurring hourglass configuration. The neck is then withdrawn from the melt to grow a crystalline ingot having a <110> crystal direction and a diameter of at least about 200 mm.
    Type: Grant
    Filed: December 9, 2002
    Date of Patent: November 25, 2003
    Assignee: SEH America, Inc.
    Inventors: Rosemary T. Nettleton, Robert L. Faulconer, Aaron W. Johnson
  • Publication number: 20030209188
    Abstract: An inexpensive method of coating silicon shot with boron atoms comprises (1) immersing silicon shot in a boron dopant spin-on solution comprising a borosilicate, a polymer precursor, and a volatile solvent, and (2) removing the solvent so as to leave a polymeric coating containing borosilicate on the shot. A precise amount of this coated shot may then be mixed with a measured quantity of silicon pellets and the resulting mixture may then be melted to provide a boron-doped silicon melt for use in growing p-type silicon bodies that can be converted to substrates for photovoltaic solar cells.
    Type: Application
    Filed: May 9, 2002
    Publication date: November 13, 2003
    Applicant: ASE Americas, Inc.
    Inventor: Bernhard P. Piwczyk
  • Patent number: 6632411
    Abstract: The present invention provides a silicon wafer sliced from a silicon single crystal ingot grown by the Czochralski method under such conditions that V-rich region should become dominant, wherein count number of particles having a size of 0.1 &mgr;m or more is 1 count/cm2 or less when particles are counted by using a particle counter and a method for producing a silicon single crystal. Thus, there is provided a production technique that can improve productivity and reduce cost for high quality silicon wafers of excellent device characteristics by further reducing density and size of defects such as COP.
    Type: Grant
    Filed: November 23, 2001
    Date of Patent: October 14, 2003
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Ryoji Hoshi, Izumi Fusegawa, Tomohiko Ohta, Shigemaru Maeda
  • Patent number: 6632277
    Abstract: A method of manufacturing a silicon wafer with robust gettering sites and a low concentration of surface defects is provided. The method comprises adding polycrystalline silicon to a crucible; adding a nitrogen-containing dopant to the crucible; heating the crucible to form a nitrogen-doped silicon melt; pulling a silicon crystal from the melt according to the Czochralski technique; forming a silicon wafer from the silicon crystal, wherein the silicon wafer includes a front surface and a back surface; placing the silicon wafer into a deposition chamber; heating the wafer; and simultaneously depositing an epitaxial first film of a desired compound onto the front surface of the wafer and a second film of the desired compound onto the back surface of the wafer.
    Type: Grant
    Filed: January 11, 2001
    Date of Patent: October 14, 2003
    Assignee: SEH America, Inc.
    Inventors: Gerald R. Dietze, Sean G. Hanna, Zbigniew J. Radzimski
  • Patent number: 6626994
    Abstract: There are provided a silicon wafer for epitaxial growth wherein a void type defect is not exposed on the surface where an epitaxial layer is grown, and a method for producing an epitaxial wafer comprising measuring the number of the void type defects exposed on the surface of a silicon wafer and/or the number of the void type defects which exist in the part to the depth of at least 10 nm from the surface of the silicon wafer, choosing the silicon wafer wherein the number of these void type defects is smaller than the predetermined value, and growing an epitaxial layer on the surface of the chosen silicon wafer. Thereby, there can be provided a silicon wafer for epitaxial growth wherein generation of SF is reduced and epitaxial wafer, and a method for producing it.
    Type: Grant
    Filed: July 24, 2001
    Date of Patent: September 30, 2003
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Akihiro Kimura, Hideki Sato, Ryuji Kono, Masahiro Kato, Masaro Tamatsuka
  • Publication number: 20030172865
    Abstract: The present invention provides a silicon single crystal wafer having a diameter of 300 mm or more and having a defect-free layer containing no COP for a depth of 3 &mgr;m or more from a surface and a method for producing a silicon single crystal, wherein, when a silicon single crystal having a diameter of 300 mm or more is pulled with nitrogen doping by the CZ method, the crystal is grown with a value of V/G [mm2/K•min] of 0.17 or less, where V [mm/min] is a pulling rate, and G [K/mm] is an average of temperature gradient in the crystal along a pulling axis from the melting point of silicon to 1400° C.
    Type: Application
    Filed: February 12, 2003
    Publication date: September 18, 2003
    Inventor: Makoto Iida
  • Publication number: 20030154907
    Abstract: In a Czochralski (CZ) single crystal puller equipped with a cooler and a thermal insulation member, which are to be disposed in a CZ furnace, smooth recharge and additional charge of material are made possible. Further, elimination of dislocations from a silicon seed crystal by use of the Dash's neck method can be performed smoothly. To these ends, there is provided a CZ single crystal puller, wherein a cooler and a thermal insulation member are immediately moved upward away from a melt surface during recharge or additional charge of material or during elimination of dislocations from a silicon seed crystal by use of the Dash's neck method.
    Type: Application
    Filed: January 7, 2003
    Publication date: August 21, 2003
    Applicant: Komatsu Denshi Kinzoku Kabushiki Kaisha
    Inventors: Hiroshi Inagaki, Shigeki Kawashima, Makoto Kamogawa, Toshirou Kotooka, Toshiaki Saishoji, Daisuke Ebi, Kentaro Nakamura, Kengo Hayashi, Yoshinobu Hiraishi, Shigeo Morimoto, Hiroshi Monden, Tadayuki Hanamoto, Tadashi Hata
  • Patent number: 6599360
    Abstract: According to the present invention, there are provided a silicon wafer, wherein an epi-layer is not formed on a surface, and number of LSTDs having a size of 50 nm or more existing in a surface layer portion is 0.
    Type: Grant
    Filed: September 20, 2001
    Date of Patent: July 29, 2003
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Makoto Iida, Masanori Kimura
  • Publication number: 20030106483
    Abstract: This invention relates to an electronic element having an electron function which acts even at room temperature using a super dielectric effect. The element has a crystalline electron system, and uses a perovskite crystal in the ground state of a “macroscopic quantum effect” which occurs when the electron number is defined, or nearly defined.
    Type: Application
    Filed: December 19, 2002
    Publication date: June 12, 2003
    Inventor: Masanori Sugawara
  • Publication number: 20030106484
    Abstract: According to the present invention, there is disclosed a silicon single crystal wafer grown according to the CZ method which is a wafer having a diameter of 200 mm or more produced from a single crystal grown at a growth rate of 0.5 mm/min or more without doping except for a dopant for controlling resistance, wherein neither an octahedral void defect due to vacancies nor a dislocation cluster due to interstitial silicons exists as a grown-in defect, and a method for producing it.
    Type: Application
    Filed: December 26, 2002
    Publication date: June 12, 2003
    Inventors: Izumi Fusegawa, Koji Kitagawa, Ryoji Hoshi, Masahiro Sakurada, Tomohiko Ohta
  • Patent number: 6569237
    Abstract: A method of producing high-quality epitaxial wafers with scarce occurrence of epitaxial layer defects by allowing an epitaxial layer on wafers sliced from a nitrogen-doped silicon single crystal as well as a method of pulling up a silicon single crystal to serve as the raw material therefore is provided. More particularly, a method of pulling up a single crystal from a nitrogen-doped silicon material melt while allowing the single crystal to grow is provided which comprises employing a passing or residence time in the temperature range of 1150-1050° C. of not less than 50 minutes and/or a passing or residence time in the temperature range of 1050-950° C. of not more than 40 minutes in the step of pulling up of the single crystal. Further, a method of manufacturing epitaxial wafers is provided which comprises allowing an epitaxial layer on the surface of silicon wafers sliced from the single crystal pulled up by the method mentioned above.
    Type: Grant
    Filed: June 21, 2001
    Date of Patent: May 27, 2003
    Assignee: Sumitomo Metal Industries, Ltd.
    Inventors: Tadami Tanaka, Toshiaki Ono, Eiichi Asayama
  • Patent number: 6565651
    Abstract: A method of manufacturing a damage-resistant silicon wafer is provided. The method comprises adding polycrystalline silicon to a crucible, adding a nitrogen-containing dopant to the crucible, heating the polycrystalline silicon to form a melt of nitrogen-doped silicon, pulling a nitrogen-doped silicon crystal from the melt using a seed crystal according to the Czochralski technique, forming a silicon wafer from the silicon crystal, the silicon wafer having an edge, and rounding the edge of the silicon wafer. The method may optionally include applying an electrical potential across the crucible while pulling the nitrogen-doped silicon crystal from the melt.
    Type: Grant
    Filed: January 11, 2001
    Date of Patent: May 20, 2003
    Assignee: SEH America, Inc.
    Inventors: Gerald R. Dietze, Sean G. Hanna, Zbigniew J. Radzimski
  • Patent number: 6565822
    Abstract: An epitaxial silicon wafer, which has no projections having a size of 100 nm or more and a height of 5 nm or more on an epitaxial layer, and a method for producing an epitaxial silicon wafer, wherein a single crystal ingot containing no I-region is grown when a silicon single crystal is grown by the CZ method, and an epitaxial layer is deposited on a silicon wafer sliced from the single crystal ingot and containing no I-region for the entire surface. An epitaxial wafer of high quality with no projection-like surface distortion observed as particles on an epi-layer surface is provided by forming a wafer having no I-region for the entire surface from a single crystal and depositing an epitaxial layer thereon, and a single crystal having no I-region for entire plane is produced with good yield and high productivity, thereby improving productivity of epi-wafers and realizing cost reduction.
    Type: Grant
    Filed: September 21, 2000
    Date of Patent: May 20, 2003
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Ryoji Hoshi, Susumu Sonokawa, Masahiro Sakurada, Tomohiko Ohta, Izumi Fusegawa
  • Patent number: 6548886
    Abstract: A silicon semiconductor substrate is obtained by deriving a silicon semiconductor substrate from a silicon single crystal grown by the Czochralski method from a molten silicon containing not less than 1×1016 atoms/cm3 and not more than 1.5×1019 atoms/cm3 of nitrogen and heat-treating the silicon semiconductor substrate at a temperature of not less than 1000° C. and not more than 1300° C. for not less than one hour and is characterized by the fact that the density of crystal defects measuring not less than 0.1 &mgr;m as reduced to diameter is not more than 104 pieces/cm3 at least in the region reaching a depth of 1 &mgr;m from the surface of the substrate and the nitrogen content at the center of thickness of the silicon semiconductor substrate is not less than 1×1013 atoms/cm3 and not more than 1×1016 atoms/cm3.
    Type: Grant
    Filed: March 10, 2000
    Date of Patent: April 15, 2003
    Assignee: Wacker NSCE Corporation
    Inventors: Atsushi Ikari, Masami Hasebe, Katsuhiko Nakai, Hikaru Sakamoto, Wataru Ohashi, Taizo Hoshino, Toshio Iwasaki
  • Patent number: 6547875
    Abstract: A wafer of the invention is a silicon wafer of 0.02 &OHgr;cm or less in resistivity for deposition of an epitaxial layer, and the number of crystal originated particles (COP) and the number of interstitial-type large dislocation loops (L/D) are respectively 0 to 10 per wafer. A wafer of the invention is an epitaxial wafer having an epitaxial layer being 0.1 &OHgr;cm or more in resistivity and 0.5 to 5 &mgr;m in thickness formed on this wafer by means of a CVD method. A wafer of the invention is OSF-free and hardly makes traces of COP and L/D appear on the surface of an epitaxial layer when the epitaxial layer is formed. By heat treatment in a semiconductor device manufacturing process after the epitaxial layer is formed, BMDs occur uniformly and highly in density in the wafer and a uniform IG effect can be obtained in the wafer.
    Type: Grant
    Filed: September 25, 2000
    Date of Patent: April 15, 2003
    Assignee: Mitsubishi Materials Silicon Corporation
    Inventors: Ken Nakajima, Tamiya Karashima, Hiroyuki Shiraki
  • Patent number: 6548035
    Abstract: A silicon single crystal wafer for epitaxial growth grown by the CZ method, which is doped with nitrogen and has a V-rich region over its entire plane, or doped with nitrogen, has an OSF region in its plane, and shows an LEP density of 20/cm2 or less or an OSF density of 1×104/cm2 or less in the OSF region, epitaxial wafer utilizing the substrate, as well as methods for producing them and method for evaluating a substrate suitable for an epitaxial wafer. There are provided a substrate for an epitaxial wafer that suppresses crystal defects to be generated in an epitaxial layer when epitaxial growth is performed on a CZ silicon single crystal wafer doped with nitrogen and also has superior IG ability, epitaxial wafer utilizing the substrate, as well as methods for producing them and method for evaluating a substrate suitable for an epitaxial wafer.
    Type: Grant
    Filed: June 14, 2001
    Date of Patent: April 15, 2003
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Akihiro Kimura, Makoto Iida, Yoshinori Hayamizu, Ken Aihara, Masanori Kimura
  • Patent number: 6544332
    Abstract: A method for producing a silicon single crystal in accordance with CZ method, characterized in that before producing the crystal having a predetermined kind and concentration of impurity, another silicon single crystal having the same kind and concentration of impurity as the crystal to be produced is grown to thereby determine an agglomeration temperature zone of grown-in defects thereof, and then based on the temperature, growth condition of the crystal to be produced or temperature distribution within a furnace of a pulling apparatus is set such that a cooling rate of the crystal for passing through the agglomeration temperature zone is a desired rate to thereby produce the silicon single crystal. A silicon single crystal produced in accordance with the above method, characterized in that a density of LSTD before subjecting to heat treatment is 500 number/cm2 or more and the average defect size is 70 nm or less.
    Type: Grant
    Filed: April 26, 2001
    Date of Patent: April 8, 2003
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Makoto Iida, Masanori Kimura, Hiroshi Takeno, Yoshinori Hayamizu
  • Publication number: 20030061985
    Abstract: A single crystal silicon ingot having a constant diameter portion that contains arsenic dopant atoms at a concentration which results in the silicon having a resistivity that is less than about 0.0025 &OHgr;·cm, and wafers sliced therefrom. The present invention is also directed to a method of doping a silicon melt so that the foregoing ingot may be produced. Specifically, the method entails introducing arsenic dopant below the surface of a silicon melt, rather than on the surface, using a dopant feeder that is at least partially submersed in the silicon melt.
    Type: Application
    Filed: September 27, 2002
    Publication date: April 3, 2003
    Applicant: MEMC Electronic Materials, Inc.
    Inventors: Milind Kulkarni, Mohsen Banan, Christopher V. Luers
  • Patent number: 6517632
    Abstract: A method of fabricating a silicon single crystal ingot and a method of fabricating a silicon wafer using the ingot, characterized in that: the method is structured in such a manner that the silicon single crystal ingot is pulled up from the silicon fused liquid 7 in which nitrogen N and carbon C are doped in polycrystalline silicon, by using the Czochralski method, and its nitrogen density is 1×1013-5×1015 atoms/cm3, and the carbon density is 5×1015-3×1016 atoms/cm3.
    Type: Grant
    Filed: January 17, 2001
    Date of Patent: February 11, 2003
    Assignee: Toshiba Ceramics Co., Ltd.
    Inventors: Toshirou Minami, Yumiko Hirano, Kouki Ikeuchi, Takashi Miyahara, Takashi Ishikawa, Osamu Kubota, Akihiko Kobayashi
  • Publication number: 20020189527
    Abstract: The object of the present invention is a process of preparing a crystal, which comprises:
    Type: Application
    Filed: March 26, 2002
    Publication date: December 19, 2002
    Inventor: Michele M. L. Meyer-Fredholm
  • Publication number: 20020179003
    Abstract: The present invention relates to a method for producing a silicon single crystal pulled while doping with carbon and nitrogen and controlling to have an N-region over an entire plane of the crystal, and a silicon wafer doped with carbon and nitrogen and having an N-region over an entire plane. From this develops a growth technique of a silicon single crystal possible to grow a single crystal having few grown-in defects and high IG ability at a high growing rate, and there are provided a silicon wafer having an N-region over an entire plane of the crystal and high IG ability, an epitaxial wafer and an annealed wafer having excellent crystallinity and IG ability.
    Type: Application
    Filed: December 12, 2001
    Publication date: December 5, 2002
    Inventors: Makoto Iida, Masanori Kimura
  • Patent number: 6468881
    Abstract: A single crystal silicon is produced using a Czocharalski (CZ) method. Silicon nitride powder is put in the bottom of a quartz crucible to provide a nitrogen concentration in the single crystal silicon of not less than about 1×1013 atoms/cm3. A poly-silicon raw material is then charged in the crucible. A pulling rate for the single crystal silicon is low so that an oxidation induced stacking faults ring exists or disappears at the center. Maintaining the nitrogen concentration of the single crystal silicon to not less than 1×1013 atoms/cm3 decrease the vacancy cluster and existinguish the dislocation cluster. Wafers prepared from the single crystal silicon have very high quality with minimal defects.
    Type: Grant
    Filed: July 18, 2000
    Date of Patent: October 22, 2002
    Assignee: Sumitomo Metal Industries, Ltd.
    Inventors: Takayuki Kubo, Masanori Kuwahara
  • Publication number: 20020144642
    Abstract: A method and apparatus for producing silicon single crystals with reduced iron contamination is disclosed. The apparatus contains at least one structural component constructed of a graphite substrate and a silicon carbide protective layer covering the surface of the substrate that is exposed to the atmosphere of the growth chamber. The graphite substrate has a concentration of iron no greater than about 1.5*1012 atoms/cm3and the silicon carbide protective layer has a concentration of iron no greater than about 1.0*1012 atoms/cm3.
    Type: Application
    Filed: November 7, 2001
    Publication date: October 10, 2002
    Inventors: Hariprasad Sreedharamurthy, Mohsen Banan, John D. Holder
  • Patent number: 6451108
    Abstract: A method for manufacturing a dislocation-free silicon single crystal, includes the steps of preparing a silicon seed crystal formed of a dislocation-free single crystal having a boron concentration of 1×1018 atoms/cm3 or more, preparing a silicon melt having a boron concentration which differs from that of the seed crystal by 7×1018 atoms/cm3 or less, and bringing the seed crystal into contact with the silicon melt to grow the silicon single crystal.
    Type: Grant
    Filed: January 23, 2001
    Date of Patent: September 17, 2002
    Assignee: President of Shinshu University
    Inventors: Keigo Hoshikawa, Xinming Huang, Tatsuo Fukami, Toshinori Taishi
  • Patent number: 6387466
    Abstract: The high quality silicon wafer of large diameter is invented by mainly paying attention to the particles ascribed to the crystal and the wafer is optimal for manufacturing ultra highly integrated devices. The silicon wafer is of diameter of 300 mm and larger sliced from a single-crystal silicon ingot pulled by CZ method, the surface is mirror-polished and cleaned with ammonia based cleaning solution, and the number of particles of 0.083 &mgr;m and larger in size detected on its main surface is 120 and smaller and/or particles of 0.090 &mgr;m and larger in size is smaller than 80.
    Type: Grant
    Filed: October 28, 1999
    Date of Patent: May 14, 2002
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Izumi Fusegawa, Masakazu Sato
  • Publication number: 20020026892
    Abstract: In order to make preparation of a semiconductor material having a high conductance possible by increasing a carrier concentration even in a case where a crystal layer is doped with p-type impurity raw materials and n-type impurity raw materials, an impurity doping method for semiconductor wherein a crystal layer made of crystal raw materials is doped with impurities, comprises each of plural types of impurity raw materials being supplied at close timings in a pulsed manner within one cycle wherein all types of the crystal raw materials are supplied in one time each in the case when plural types of the crystal raw materials are alternately supplied in a pulsed manner with maintaining each of predetermined purge times.
    Type: Application
    Filed: August 30, 2001
    Publication date: March 7, 2002
    Inventors: Yoshinobu Aoyagi, Souhachi Iwai, Hideki Hirayama
  • Patent number: 6350314
    Abstract: A process for producing nitrogen-doped semiconductor wafers has the nitrogen being derived from a dopant gas which contains NH3. The process includes pulling a single crystal from a melt of molten semiconductor material, feeding the dopant gas to the semiconductor material, and cutting the nitrogen-doped semiconductor wafers off the pulled single crystal. The dopant gas is fed to the semiconductor material at most until pulling begins for that part of the single crystal from which the semiconductor wafers are cut.
    Type: Grant
    Filed: August 31, 2000
    Date of Patent: February 26, 2002
    Assignee: Wacker Siltronic Gesellschaft für Halbleitermaterialien AG
    Inventors: Wilfried Von Ammon, Herbert Weidner, Dirk Zemke, Christoph Frey
  • Publication number: 20020020339
    Abstract: A process for controlling the amount of insoluble gas trapped by a silicon melt is disclosed. After a crucible is charged with polycrystalline silicon, a gas comprising at least about 10% of a gas having a high solubility in silicon is used as the purging gas for a period of time during melting. After the polycrystalline silicon charge has completely melted, the purge gas may be switched to a conventional argon purge. Utilizing a purge gas highly soluble in silicon for a period of time during the melting process reduces the amount of insoluble gases trapped in the charge and, hence, the amount of insoluble gases grown into the crystal that form defects on sliced wafers.
    Type: Application
    Filed: August 30, 2001
    Publication date: February 21, 2002
    Inventor: John D. Holder
  • Publication number: 20020000189
    Abstract: A method of producing high-quality epitaxial wafers with scarce occurrence of epitaxial layer defects by allowing an epitaxial layer on wafers sliced from a nitrogen-doped silicon single crystal as well as a method of pulling up a silicon single crystal to serve as the raw material therefore is provided. More particularly, a method of pulling up a single crystal from a nitrogen-doped silicon material melt while allowing the single crystal to grow is provided which comprises employing a passing or residence time in the temperature range of 1150-1050° C. of not less than 50 minutes and/or a passing or residence time in the temperature range of 1050-950° C. of not more than 40 minutes in the step of pulling up of the single crystal. Further, a method of manufacturing epitaxial wafers is provided which comprises allowing an epitaxial layer on the surface of silicon wafers sliced from the single crystal pulled up by the method mentioned above.
    Type: Application
    Filed: June 21, 2001
    Publication date: January 3, 2002
    Applicant: SUMITOMO METAL INDUSTRIES, LTD.
    Inventors: Tadami Tanaka, Toshiaki Ono, Eiichi Asayama
  • Patent number: 6315828
    Abstract: A continuous oxidation process and apparatus for using the same are disclosed. During growth of a semiconductor crystal an oxygen-containing gas is continuously injected into the crystal pulling apparatus in an exhaust tunnel downstream from the hot zone to continuously oxidize hypostoichiometric silicon dioxide, silicon vapor, and silicon monoxide produced in the hot zone during the crystal growth so as to minimize or eliminate the possibility of rapid over-pressurization of the apparatus upon exposure to the atmosphere.
    Type: Grant
    Filed: January 21, 2000
    Date of Patent: November 13, 2001
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: John D. Holder, Bayard K. Johnson
  • Patent number: 6312517
    Abstract: A method of lowering the resistivity of resultant silicon crystal from a Czochralski crystal growing process by adding arsenic dopant to the melt in multiple stages.
    Type: Grant
    Filed: May 11, 2000
    Date of Patent: November 6, 2001
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Mohsen Banan, Milind Kulkarni, Charles Whitmer, II
  • Patent number: 6302956
    Abstract: The invention relates to the field of electronics and can be used in acoustic electronic frequency-selective devices in surface acoustic waves (SAW) and volumetric acoustic waves. The purpose of the invention is the formulation of an industrial process to develop stoichiometrically structured monocrystals of lanthalum gallium silicate, of no less than 75 mm in diameter and greater than 3,5 kg in weight, along a direction of <01.1>±3°. The discs are cut out at a 90° angle with respect to the lengthwise axis, thereby ensuring that the value of the frequency temperature coefficient is zero.
    Type: Grant
    Filed: November 8, 1999
    Date of Patent: October 16, 2001
    Assignee: Rafida Developments, Inc.
    Inventors: Vladimir Vladimirovich Alenkov, Oleg Alexeevich Bouzanov, Alexandr Borisovich Gritsenko, Georgy Georgievich Koznov
  • Publication number: 20010020438
    Abstract: A method for manufacturing a dislocation-free silicon single crystal, includes the steps of preparing a silicon seed crystal formed of a dislocation-free single crystal having a boron concentration of 1×1018 atoms/cm3 or more, preparing a silicon melt having a boron concentration which differs from that of the seed crystal by 7×1018 atoms/cm3 or less, and bringing the seed crystal into contact with the silicon melt to grow the silicon single crystal.
    Type: Application
    Filed: January 23, 2001
    Publication date: September 13, 2001
    Applicant: President of Shinshu University
    Inventors: Keigo Hoshikawa, Xinming Huang, Tatsuo Fukami, Toshinori Taishi
  • Patent number: 6284041
    Abstract: A process for growing a single crystal in which variation in a dopant concentration in a melt contained in a crucible can be reduced and a single crystal having small variation in specific resistance can be produced. The process is the Czhohralski growth of a silicon single crystal including the steps: melting a crystal raw material in a crucible; bringing into contact a seed crystal to a melt contained in the crucible to thereby stabilize the surface temperature of the melt that is called “the seed crystal contact technique;” and adding a dopant into the crucible after carrying out the seed crystal contact technique. Furthermore, in the process, a dopant may be added while the seed crystal contact technique is stopped, and the seed crystal contact technique may be carried out again. Alternatively, a dopant may be added while the seed crystal contact technique is carried out.
    Type: Grant
    Filed: August 18, 1999
    Date of Patent: September 4, 2001
    Assignee: Sumitomo Metal Industries, Ltd.
    Inventors: Ken Hamada, Hiroyuki Tanabe
  • Patent number: 6277501
    Abstract: The present invention has as an objective providing a silicon epi-wafer, and a manufacturing method therefor, which simplifies processing as much as possible in an attempt to lower the cost of an epi-wafer, and which is capable of manifesting a sufficient IG effect even in low-temperature device fabrication processing of under 1080° C. in an epi-wafer, and furthermore, in device processing, which enhances gettering capabilities for a variety of impurities in wafer device processing, without performing, following wafer slicing, any process from which an EG effect can be anticipated. As for the silicon single crystal, which is grown via the CZ method so as to make the oxygen concentration relatively high, and to intentionally make the carbon concentration high, outstanding gettering capabilities are manifested in the wafer itself, without performing EG processing.
    Type: Grant
    Filed: January 29, 1999
    Date of Patent: August 21, 2001
    Assignee: Sumitomo Metal Industries, Ltd.
    Inventor: Takashi Fujikawa
  • Patent number: 6261361
    Abstract: There is disclosed a method for producing a silicon single crystal wafer wherein a silicon single crystal is grown in accordance with the CZ method with doping nitrogen in an N-region in a defect distribution chart which shows a defect distribution in which the horizontal axis represents a radial distance D (mm) from the center of the crystal and the vertical axis represent a value of F/G (mm2/° C.·min), where F is a pulling rate (mm/min) of the single crystal, and G is an average intra-crystal temperature gradient(° C./mm) along the pulling direction within a temperature range of the melting point of silicon to 1400° C. There can be provided a method of producing a silicon single crystal wafer consisting of N-region where neither V-rich region nor I-rich region is present in the entire surface of the crystal by CZ method, under the condition that can be controlled easily in a wide range, in high yield, and in high productivity.
    Type: Grant
    Filed: May 19, 2000
    Date of Patent: July 17, 2001
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Makoto Iida, Masaro Tamatsuka, Masanori Kimura, Shozo Muraoka
  • Patent number: 6261362
    Abstract: The objective of this invention is to provide a manufacturing method wherewith optimally low-COP substrates can be efficiently manufactured for epitaxial wafers in order to obtain high epitaxial surface quality that will not have an adverse effect on device characteristics. A phenomenon was discovered whereby COPs are eliminated by solution annealing or flattening when epitaxial films are formed on wafers wherein the density of grown-in defects (COPs) with a size of 0.130 &mgr;m or larger is 0.03 defects/cm2 or lower, the use of which phenomenon is characteristic of the invention.
    Type: Grant
    Filed: September 14, 1999
    Date of Patent: July 17, 2001
    Assignee: Sumitomo Metal Industries, Ltd.
    Inventors: Takashi Fujikawa, Masaharu Ninomiya
  • Patent number: 6238478
    Abstract: A first layer having a same conductivity and a substantially identical concentration as a CZ substrate having a high impurity concentration is formed by a vapor phase growth process on the substrate directly, a pressure is changed to purge an atmosphere, and then a second layer having a same conductivity as the substrate and having a lower concentration by 3 or more orders of magnitude than the substrate is formed by the vapor phase growth process. Thereby there is simply and inexpensively formed a silicon single crystal thin film by the vapor phase growth process which film has no crystal defective layer and has a dopant concentration abruptly changing at an interface between the film and a high concentration layer.
    Type: Grant
    Filed: September 8, 1998
    Date of Patent: May 29, 2001
    Assignee: Shin-Etsu Handotai, Co., Ltd.
    Inventor: Hitoshi Habuka
  • Patent number: 6228164
    Abstract: A process for producing a silicon single crystal has the crystal being pulled using the Czochralski method while being doped with oxygen and nitrogen. The single crystal is doped with oxygen at a concentration of less than 6.5*1017 atoms cm−3 and with nitrogen at a concentration of more than 5*1013 atoms cm−3 while the single crystal is being pulled. Another process is for producing a single crystal from a silicon melt, in which the single crystal is doped with nitrogen and the single crystal is pulled at a rate V, an axial temperature gradient G(r) being set up at the interface of the single crystal and the melt, in which the ratio V/G(r) in the radial direction is at least partially less than 1.3*10−3cm2min−1 K−1.
    Type: Grant
    Filed: May 25, 1999
    Date of Patent: May 8, 2001
    Assignee: Wacker Siltronic Gesellschaft für Halbleitermaterialien AG
    Inventors: Wilfried von Ammon, Rüdiger Schmolke, Dieter Gräf, Ulrich Lambert
  • Patent number: 6197109
    Abstract: There is disclosed a method for producing a silicon single crystal by growing the silicon single crystal by the Czochralski method, characterized in that the crystal is pulled at a pulling rate [mm/min] within a range of from V1 to V1+0.062×G while the crystal is doped with nitrogen during the growing, where G [K/mm] represents an average temperature gradient along the crystal growing direction, which is for a temperature range of from the melting point of silicon to 1400° C., and provided in an apparatus used for the crystal growing, and V1 [mm/min] represents a pulling rate at which an OSF ring disappears at the center of the crystal when the crystal is pulled by gradually decreasing the pulling rate.
    Type: Grant
    Filed: June 10, 1999
    Date of Patent: March 6, 2001
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Makoto Iida, Masaro Tamatsuka, Wataru Kusaki, Masanori Kimura, Shozo Muraoka
  • Patent number: 6139625
    Abstract: There is disclosed a method of producing a silicon single crystal wafer wherein a silicon single crystal ingot in which nitrogen is doped is grown by Czochralski method, the single crystal ingot is sliced to yield a silicon single crystal wafer, and then the silicon single crystal wafer is subjected to heat treatment with a rapid heating/rapid cooling apparatus, and the silicon single crystal wafer produced by the method. There can be provided a method for producing a silicon single crystal wherein growth of crystal defects (grown-in defects) in silicon single crystal produced by CZ method are suppressed, particularly growth of crystal defects are prevented in the surface layer of the wafer, and crystal defect can be surely removed by a short time heat treatment even if small crystal defects are generated.
    Type: Grant
    Filed: March 8, 1999
    Date of Patent: October 31, 2000
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Masaro Tamatsuka, Norihiro Kobayashi, Satoshi Oka
  • Patent number: 6113687
    Abstract: A silicon single crystal wafer having good device characteristics can be manufactured according to the Czochralski method without formation of any dislocation cluster within a crystal surface. Where a silicon single crystal having an oxygen concentration of less than 8.5.times.10.sup.17 atoms/cm.sup.3 (ASTM F1188-88) is manufactured, a radius of a latent zone of oxidation induced stacking defects ring-likely-distributed in the crystal surface is made within a range of 70% to 0% of a crystal radius, and a value of V/G (mm.sup.2 /.degree. C..multidot.minute) is controlled at a predetermined critical value or over at radial positions except an outermost periphery of the crystal when a pulling rate is taken as V (mm/minute), and a crystalline temperature gradient along the pulling axis is taken as G (.degree. C./mm). On the other hand, when a silicon single crystal having an oxygen concentration of not less than 8.5.times.10.sup.17 atoms/cm.sup.
    Type: Grant
    Filed: November 17, 1998
    Date of Patent: September 5, 2000
    Assignee: Sumitomo Metal Industries, Ltd.
    Inventors: Masataka Horai, Kazuyuki Egashira, Tadami Tanaka
  • Patent number: 6080237
    Abstract: This invention is directed to a method for the production of a dislocation-free silicon single crystal by the Czochralski method. This method attains growth of the main body part of the dislocation-free silicon single crystal by immersing a seed crystal in a melt of silicon and then pulling the seed crystal without recourse to the necking. The seed crystal thus used is a dislocation-free silicon single crystal. The horizontal maximum length of the part of the seed crystal being immersed in the melt at the time of completing the immersion of the seed crystal in the melt is not less than 5 mm. The immersing rate of the seed crystal in the melt is not more than 2.8 mm/min and the part of the seed crystal to be immersed in the melt is a crystal as grown.
    Type: Grant
    Filed: June 8, 1998
    Date of Patent: June 27, 2000
    Assignees: Nippon Steel Corporation, NSC Electron Corporation
    Inventors: Toshio Iwasaki, Shin-ichi Fujimoto, Hiroshi Isomura, Takayoshi Ishida, Michiharu Tamura, Atsushi Ikari
  • Patent number: 6059875
    Abstract: A method of introducing nitrogen into a melt for use in producing a nitrogen-doped silicon single crystal by the Czochralski method includes adding a silicon material to a vessel, such as a quartz crucible, adding a nitrogen-containing powder, preferably silicon nitride powder, to the vessel, and heating the vessel for a time sufficient to melt the silicon material and to dissolve the nitrogen-containing in the silicon material in order to form the melt. A nitrogen-doped silicon single crystal is then produced from the melt by the Czochralski method by pulling the silicon single crystal from the melt with a seed crystal.
    Type: Grant
    Filed: January 11, 1999
    Date of Patent: May 9, 2000
    Assignee: Seh America, Inc.
    Inventors: Scott M. Kirkland, Oleg V. Kononchuk, Akihiko Tamura
  • Patent number: 6059876
    Abstract: the present invention provides an improved method and apparatus for doping silicon and other crystals made by the Czochralski process wherein the surface of the melt is partially enclosed or covered in order to capture the dopant vapors and improve the efficiency with which they are dissolved in the melt. In accordance with the invention the dopant is suspended in a vapor retention vessel such as a quartz bell jar which is suspended above the melt so that the heat from the melt causes the dopant to vaporize. In accordance with the invention, an annular baffle is provided around the mouth of the vessel or the rim of the crucible containing the melt such that the amount of uncovered open area on the surface of the melt is reduced and the dopant vapor is retained in contact with the surface of the melt such that it dissolves more efficiently in the melt.
    Type: Grant
    Filed: February 5, 1998
    Date of Patent: May 9, 2000
    Assignee: William H. Robinson
    Inventors: Philip C. S. Yin, Philip Edward Blosser, Roger F. Jones
  • Patent number: 6019838
    Abstract: A crystal growing apparatus is able to provide dopant to a melt in the apparatus. A hopper is carrying dopant is integrated into a pull shaft of the apparatus so that dopant can be added to the melt without providing additional orifices in the apparatus or by opening the interior of the apparatus to the atmosphere.
    Type: Grant
    Filed: January 5, 1998
    Date of Patent: February 1, 2000
    Assignee: MEMC Electronic Materials, Inc.
    Inventor: Marcello Canella
  • Patent number: 6013129
    Abstract: Provided is a method for the production of a heavily-doped silicon wherein an element X whose ionic radius is larger than Si and an element Y whose ionic radius is smaller than Si are added to a Si crystal growing atmosphere at an atomic ratio of X:Y=1:(1+.alpha.) or X:Y=(1+.alpha.):1 with the proviso of .alpha. being a value of 1-5. When Si is double-doped with the elements X and Y, the number of carriers is increased up to 10.sup.20 -10.sup.22 /cm.sup.3. The double-doping may be adaptable to any of a pull method, an epitaxy method or a selective diffusion method. The double-doping remarkably increases the number of carriers, so as to produce metallic Si which can be useful itself as a wiring material due to its low resistivity.
    Type: Grant
    Filed: August 19, 1998
    Date of Patent: January 11, 2000
    Assignee: Japan Science and Technology Corporation
    Inventor: Hiroshi Yoshida