Of Amorphous Precursor Patents (Class 117/8)
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Patent number: 8475588Abstract: A wafer structure and epitaxial growth method for growing the same. The method may include forming a mask layer having nano-sized areas on a wafer, forming a porous layer having nano-sized pores on a surface of the wafer by etching the mask layer and a surface of the wafer, and forming an epitaxial material layer on the porous layer using an epitaxial growth process.Type: GrantFiled: March 13, 2009Date of Patent: July 2, 2013Assignee: Samsung Corning Precision Materials Co., Ltd.Inventor: Sung-Soo Park
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Patent number: 8470089Abstract: The invention relates to a process for manufacturing a single crystal comprising a rare-earth halide, having improved machining or cleavage behavior, comprising heat treatment in a furnace, the atmosphere of which is brought, for at least 1 hour, to between 0.70 times Tm and 0.995 times Tm of a single crystal comprising a rare-earth halide, Tm representing the melting point of said single crystal, the temperature gradient at any point in the atmosphere of the furnace being less than 15 K/cm for said heat treatment. After carrying out the treatment according to the invention, the single crystals may be machined or cleaved without uncontrolled fracture. The single crystals may be used in a medical imaging device, especially a positron emission tomography system or a gamma camera or a CT scanner, for crude oil exploration, for detection and identification of fissile or radioactive materials, for nuclear and high-energy physics, for astrophysics or for industrial control.Type: GrantFiled: May 15, 2008Date of Patent: June 25, 2013Assignee: Saint-Gobain Cristaux et DetecteursInventors: Dominique Richaud, Alain Iltis, Vladimir Ouspenski
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Patent number: 8449671Abstract: A method of fabricating an SiC single crystal includes (a) physical vapor transport (PVT) growing a SiC single crystal on a seed crystal in the presence of a temperature gradient, wherein an early-to-grow portion of the SiC single crystal is at a lower temperature than a later-to-grow portion of the SiC single crystal. Once grown, the SiC single crystal is annealed in the presence of a reverse temperature gradient, wherein the later-to-grow portion of the SiC single crystal is at a lower temperature than the early-to-grow portion of the SiC single crystal.Type: GrantFiled: June 26, 2008Date of Patent: May 28, 2013Assignee: II-VI IncorporatedInventors: Ping Wu, Ilya Zwieback, Avinesh K. Gupta, Edward Semenas
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Publication number: 20130065065Abstract: A thin film which comprises an organic metal salt or an an alkoxide salt or an amorphous thin film is formed on a substrate, wherein each of the thin films enables the formation of a Dion-Jacobson perovskite-type metal oxide represented by the composition formula A(Bn?1MnO3n+1) (wherein n is a natural number of 2 or greater; A represents one or more monovalent cations selected from Na, K, Rb and Cs; B comprises one or more components selected from a trivalent rare earth ion, Bi, a divalent alkaline earth metal ion and a monovalent alkali metal ion; and M comprises one or more of Nb and Ta; wherein a solid solution may be formed with Ti and Zr) on a non-oriented substrate. The resulting product is maintained at the temperature between room temperature and 600° C.; and crystallization is achieved while irradiating the amorphous thin film or the thin film comprising the organic metal salt or the alkoxide salt on the substrate with ultraviolet light such as ultraviolet laser.Type: ApplicationFiled: April 12, 2011Publication date: March 14, 2013Inventors: Tomohiko Nakajima, Tetsuo Tsuchiya, Takaaki Manabe
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Patent number: 8367550Abstract: A conductive layer may be fabricated on a semiconductor substrate by loading a silicon substrate in to a chamber whose inside temperature is at a loading temperature in the range of approximately 250° C. to approximately 300° C., increasing the inside temperature of the chamber from the loading temperature to a process temperature, and sequentially stacking a single crystalline silicon layer and a polycrystalline silicon layer over the silicon substrate by supplying a silicon source gas and an impurity source gas in to the chamber, where the chamber may be, for example, a CVD chamber or a LPCVD chamber.Type: GrantFiled: December 27, 2010Date of Patent: February 5, 2013Assignee: SK Hynix Inc.Inventors: Jong Bum Park, Chun Ho Kang, Young Seung Kim
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Patent number: 8367301Abstract: A mask for crystallizing silicon includes a first, a second, and a third pattern part arranged in a longitudinal direction, each of the first, second, and third pattern parts including a plurality of unit blocks for transmitting and blocking a portion of light. At least two of the first, second and third pattern parts have a corresponding pattern to each other. Advantageously, scans using the aforementioned mask effectively remove a boundary on the silicon formed by the difference in the amount of laser beam irradiation received by the silicon, thereby improving electronic characteristics of the silicon.Type: GrantFiled: September 8, 2010Date of Patent: February 5, 2013Assignee: Samsung Display Co., Ltd.Inventors: Hyun-Dae Kim, Han-Na Jo
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Patent number: 8287642Abstract: Devices and methods for providing stimulated Raman lasing are provided. In some embodiments, devices include a photonic crystal that includes a layer of silicon having a lattice of holes and a linear defect that forms a waveguide configured to receive pump light and output Stokes light through Raman scattering, wherein the thickness of the layer of silicon, the spacing of the lattice of holes, and the size of the holes are dimensioned to provide Raman lasing. In some embodiments, methods include forming a layer of silicon, and etching the layer of silicon to form a lattice of holes with a linear defect that forms a waveguide configured to receive pump light and output Stokes light through Raman scattering, wherein the thickness of the layer of silicon, the spacing of the lattice of holes, and the size of the holes are dimensioned to provide Raman lasing.Type: GrantFiled: November 17, 2010Date of Patent: October 16, 2012Assignee: The Trustees of Columbia University in the City of New YorkInventors: Chee Wei Wong, James F. McMillan, Xiaodong Yang, Richard Osgood, Jr., Jerry Dadap, Nicolae Panoiu
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Patent number: 8263483Abstract: A method including producing a monocrystalline layer is disclosed. A first lattice constant on a monocrystalline substrate has a second lattice constant at least in a near-surface region. The second lattice constant is different from the first lattice constant. Lattice matching atoms are implanted into the near-surface region. The near-surface region is momentarily melted. A layer is epitaxially deposited on the near-surface region that has solidified in monocrystalline fashion.Type: GrantFiled: July 7, 2009Date of Patent: September 11, 2012Assignee: Infineon Technologies Austria AGInventors: Franz Hirler, Hans-Joachim Schulze
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Patent number: 8258050Abstract: A method of making a crystalline semiconductor structure provides a photonic device by employing low thermal budget annealing process. The method includes annealing a non-single crystal semiconductor film formed on a substrate to form a polycrystalline layer that includes a transition region adjacent to a surface of the film and a relatively thicker columnar region between the transition region and the substrate. The transition region includes small grains with random grain boundaries. The columnar region includes relatively larger columnar grains with substantially parallel grain boundaries that are substantially perpendicular to the substrate. The method further includes etching the surface to expose the columnar region having an irregular serrated surface.Type: GrantFiled: July 17, 2009Date of Patent: September 4, 2012Assignee: Hewlett-Packard Development Company, L.P.Inventors: Hans S. Cho, Theodore I. Kamins
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Patent number: 8221544Abstract: A polycrystalline film is prepared by (a) providing a substrate having a thin film disposed thereon, said film capable of laser-induced melting, (b) generating a sequence of laser pulses having a fluence that is sufficient to melt the film throughout its thickness in an irradiated region, each pulse forming a line beam having a predetermined length and width, said width sufficient to prevent nucleation of solids in a portion of the thin film that is irradiated by the laser pulse, (c) irradiating a first region of the film with a first laser pulse to form a first molten zone, said first molten zone demonstrating a variation in width along its length to thereby define a maximum width (Wmax) and a minimum width (Wmin), wherein the first molten zone crystallizes upon cooling to form one or more laterally grown crystals, (d) laterally moving the film in the direction of lateral growth a distance that is greater than about one-half Wmax and less than Wmin; and (e) irradiating a second region of the film with a secoType: GrantFiled: December 2, 2005Date of Patent: July 17, 2012Assignee: The Trustees of Columbia University in the City of New YorkInventors: James S. Im, Paul C. Van Der Wilt
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Patent number: 8216361Abstract: Monocrystalline semiconductor wafers have defect-reduced regions, the defect-reduced regions having a density of GOI-relevant defects within the range of 0/cm2 to 0.1/cm2 and occupy overall an areal proportion of 10% to 100% of the planar area of the semiconductor wafer, wherein the remaining regions of the semiconductor wafer have a significantly higher defect density than the defect-reduced regions. The wafers may be produced by a method for annealing GOI relevant defects in the wafer, by irradiating defined regions of a side of the semiconductor wafer by laser wherein each location is irradiated with a power density of 1 GW/m2 to 10 GW/m2 for at least 25 ms, wherein the laser emits radiation of a wavelength above the absorption edge of the wafer semiconductor material and wherein the temperature of the wafer rises by less than 20 K as a result of irradiation.Type: GrantFiled: September 7, 2011Date of Patent: July 10, 2012Assignee: Siltronic AGInventors: Dieter Knerer, Andreas Huber, Ulrich Lambert, Friedrich Passek
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Publication number: 20120171112Abstract: A titanium oxide nano tube material is configured so that crystal grains of a nano tube has a crystal structure oriented with the [001] direction of a tetragonal crystal system as a preferred direction. FWHM (Full Width at Half Maximum) of a rocking curve with respect to the (004) plane peak is 11.1 degrees to 20.3 degrees. The titanium oxide nano tube material has excellent photoelectric characteristics since the crystal grains of the nano tube are oriented with the (004) plane or the [001] direction of a tetragonal crystal system as a preferred direction.Type: ApplicationFiled: August 4, 2011Publication date: July 5, 2012Applicant: SNU R&DB FOUNDATIONInventors: Sang-Wook Lee, Ik-Jae Park, Dong-Hoe Kim, Kug-Sun Hong, Gil-Sang Han, Hyun-Suk Jung
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Publication number: 20120160152Abstract: The transfer of the structure of a crystal (3) having an amorphous or crystal structure to a thin layer (1) with a different structure can be achieved by the combination of a pressing (6) and a heating (7) to apply the layer onto the crystal and anneal it to crystallize it. Characteristically, wedges (5) are placed at the edges to flex the layer and give rise to cracking of the assembly and releasing the layer when the pressure ceases, which eliminates the complicated methods for withdrawing the crystal (3) or even destroying it, enables the use of the crystal (3) in several layers to be crystallized, allows a good manufacturing rate and reduces costs.Type: ApplicationFiled: September 14, 2010Publication date: June 28, 2012Applicant: Commissariat A L'Energie Atomique Et Aux Energies AlternativesInventor: Cyril Cayron
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Patent number: 8157912Abstract: Polycrystalline alumina (PCA) that has been doped with magnesium oxide is converted to sapphire by additionally doping the PCA with boron oxide and sintering to induce abnormal grain growth. The boron oxide may be added to an already formed green PCA ceramic shape by applying an aqueous boric acid solution to the green ceramic and heating the green ceramic in air to convert the boric acid to boron oxide.Type: GrantFiled: September 11, 2007Date of Patent: April 17, 2012Assignee: OSRAM SYLVANIA Inc.Inventor: George C. Wei
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Patent number: 8119546Abstract: An array substrate includes a base substrate, a switching element, and a pixel electrode. The switching element is on the base substrate. The switching element includes a poly silicon pattern having at least one block. Grains are formed in each of the at least one block that are extended in a plurality of directions. The pixel electrode is electrically connected to the switching element. Therefore, current mobility and design margin of the switching element are improved.Type: GrantFiled: April 28, 2008Date of Patent: February 21, 2012Assignee: Samsung Electronics Co., Ltd.Inventors: Soong-Yong Joo, Myung-Koo Kang
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Patent number: 8118932Abstract: By locally heating specific scan positions within a region of interest and automatically obtaining respective measurement data in a time-resolved and spatially-resolved fashion, dynamic processes within a metallization layer of semiconductor devices may be efficiently monitored and/or modified. For instance, OBIRCH and SEI techniques may be used in combination with the automated data recording and manipulation, thereby providing an efficient means for in situ failure analysis, defect identification, for any dynamic degradation processes in interconnects and interlayer dielectrics.Type: GrantFiled: May 24, 2006Date of Patent: February 21, 2012Assignee: Advanced Micro Devices, Inc.Inventors: Joerg Buschbeck, Eckhard Langer, Marco Grafe
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Patent number: 8114217Abstract: There are provided a crystallization method which can design laser beam having a light intensity and a distribution optimized on an incident surface of a substrate, form a desired crystallized structure while suppressing generation of any other undesirable structure area and satisfy a demand for low-temperature processing, a crystallization apparatus, a thin film transistor and a display apparatus. When crystallizing a non-single-crystal semiconductor thin film by irradiating laser beam thereto, irradiation light beam to the non-single-crystal semiconductor thin film have a light intensity with a light intensity distribution which cyclically repeats a monotonous increase and a monotonous decrease and a light intensity which melts the non-single-crystal semiconductor. Further, at least a silicon oxide film is provided on a laser beam incident surface of the non-single-crystal semiconductor film.Type: GrantFiled: July 2, 2008Date of Patent: February 14, 2012Assignee: Sharp Kabushiki KaishaInventors: Masayuki Jyumonji, Hiroyuki Ogawa, Masakiyo Matsumura, Masato Hiramatsu, Yoshinobu Kimura, Yukio Taniguchi, Tomoya Kato
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Patent number: 8105435Abstract: The inhomogeneous energy distribution at the beam spot on the irradiated surface is caused by a structural problem and processing accuracy of the cylindrical lens array forming an optical system. According to the present invention, in the optical system for forming a rectangular beam spot, an optical system for homogenizing the energy distribution of the shorter side direction of a rectangular beam spot of a laser light on an irradiated surface is replaced with a light guide. The light guide is a circuit that can confine emitted beams in a certain region and guide and transmit its energy flow in parallel with the axis of a path thereof.Type: GrantFiled: August 28, 2009Date of Patent: January 31, 2012Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventor: Koichiro Tanaka
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Patent number: 8101018Abstract: In a method for fabricating a semiconductor device and an apparatus for inspecting a semiconductor, laser processing is performed at different laser powers at different positions on a monitor substrate from a plurality of substrates having undergone an SPC step, to form polycrystalline silicon film over the entire area of the substrate. Thereafter, in an optimum power inspection/extraction step, the polycrystalline silicon film formed with varying film quality on the monitor substrate is inspected on inspection equipment to determine the optimum laser power. Then, in a laser processing step, the surface of the subsequent substrates having undergone the SPC step is irradiated with laser at the optimum laser power. Thus, high-quality polycrystalline silicon film is formed over the entire area of the substrate.Type: GrantFiled: March 2, 2005Date of Patent: January 24, 2012Assignee: Sharp Kabushiki KaishaInventor: Yasunobu Tagusa
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Patent number: 8088219Abstract: Monocrystalline semiconductor wafers have defect-reduced regions, the defect-reduced regions having a density of GOI-relevant defects within the range of 0/cm2 to 0.1/cm2 and occupy overall an areal proportion of 10% to 100% of the planar area of the semiconductor wafer, wherein the remaining regions of the semiconductor wafer have a significantly higher defect density than the defect-reduced regions. The wafers may be produced by a method for annealing GOI relevant defects in the wafer, by irradiating defined regions of a side of the semiconductor wafer by laser wherein each location is irradiated with a power density of 1 GW/m2 to 10 GW/m2 for at least 25 ms, wherein the laser emits radiation of a wavelength above the absorption edge of the wafer semiconductor material and wherein the temperature of the wafer rises by less than 20 K as a result of irradiation.Type: GrantFiled: July 26, 2007Date of Patent: January 3, 2012Assignee: Siltronic AGInventors: Dieter Knerer, Andreas Huber, Ulrich Lambert, Friedrich Passek
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Patent number: 8052790Abstract: A silicon crystallization mask of the present invention includes; a main exposure portion including a plurality of complete light transmission regions which completely transmit light therethrough, and a preliminary exposure portion including a plurality of incomplete light transmission regions, which each partially transmit light therethrough, wherein at least two of the incomplete light transmission regions have different magnitudes of light transmittance from each other.Type: GrantFiled: March 19, 2009Date of Patent: November 8, 2011Assignee: Samsung Electronics Co., Ltd.Inventor: Se-Jin Chung
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Patent number: 8052789Abstract: Disclosed are a polycrystalline silicon and a crystallization method thereof according to an exemplary embodiment of the present invention. The polycrystalline silicon comprises: an insulating substrate; and an optical portion formed on the insulating substrate for receiving a CW laser beam and varying the intensity of the beam in order of strength-weakness, strength-weakness, and strength-weakness on one dimension, so that an amorphous silicon thin film is crystallized. Therefore, the present invention can form a good polycrystalline silicon thin film by growing crystal grains with a constant direction and size, when an amorphous silicon thin film disposed on an insulating film such as a glass substrate is crystallized to a polycrystalline silicon thin film.Type: GrantFiled: November 8, 2006Date of Patent: November 8, 2011Assignee: Kyunghee University Industrial & Academic Collaboration FoundationInventors: Jin Jang, Jae-Hwan Oh, Eun-Hyun Kim, Ki-Hyoung Kim
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Patent number: 8052791Abstract: A phase modulation element according to the present invention has a first area having a first phase value based on a phase modulation unit having a predetermined size and a second area having a second phase value based on the phase modulation unit having the predetermined size, and each phase distribution is defined by a change in area shares of the first area and the second area depending on each position.Type: GrantFiled: April 16, 2009Date of Patent: November 8, 2011Assignee: Sharp Kabushiki KaishaInventors: Masakiyo Matsumura, Yukio Taniguchi
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Patent number: 8048220Abstract: The invention relates to a method for producing a strained layer. Said method comprises the following steps: placing the layer on a substrate and straining it, structuring the strained layer, relaxing the layer, producing directional off-sets in the layer to be strained. A layered structure produced in this manner has triaxially strained layers.Type: GrantFiled: September 22, 2005Date of Patent: November 1, 2011Assignee: Forschungszentrum Julich GmbHInventors: Siegfried Mantl, Bernhard Holländer, Dan Mihai Buca
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Publication number: 20110220011Abstract: A method of growing a single crystal of gallium oxide at a lower temperature than the melting point (1900° C.) of gallium oxide is provided. A compound film (hereinafter referred to as “gallium oxide compound film”) containing Ga atoms, O atoms, and atoms or molecules that easily sublimate, is heated to sublimate the atoms or molecules that easily sublimate from inside the gallium oxide compound film, thereby growing a single crystal of gallium oxide with a heat energy that is lower than a binding energy of gallium oxide.Type: ApplicationFiled: March 8, 2011Publication date: September 15, 2011Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Akiharu MIYANAGA, Tatsuya HONDA, Takatsugu OMATA, Yusuke NONAKA
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Patent number: 8016940Abstract: The short-pulse laser light 9 emitted from the short-pulse laser light source 1 is focused on and caused to irradiate an organic crystal 8 contained in a sample container 6 via a shutter 2, intensity adjusting element 3, irradiation position control mechanism 4, and focusing optical system 5. The sample container 6 is carried on a stage 7, and can be moved in three dimensions along the x axis, y axis and z axis in an x-y-z orthogonal coordinate system with the direction of the optical axis being taken as the z axis; furthermore, the sample container 6 can be rotated about the z axis. Working of the organic crystal 8 is performed by means of short-pulse laser light that is focused on and caused to irradiate the surface of the organic crystal 8. Prior to working, nitrogen is caused to jet onto the sample container 6 by a low-temperature gas jet device C that is a cooling device; consequently, the organic crystal 8 is cooled to ?150° C. or below.Type: GrantFiled: March 30, 2005Date of Patent: September 13, 2011Assignees: Nikon CorporationInventors: Hiroaki Adachi, Hiroshi Kitano
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Patent number: 7985294Abstract: An optical device and a method of manufacturing the optical device, with the method including the steps of forming a dopant layer on a stoichiometric lithium niobate single crystal substrate with Li to Nb mole composition ratio of 49.5% to 50.5%, and diffusing a dopant in the dopant layer into at least a portion of the stoichiometric lithium niobate single crystal substrate. The stoichiometric lithium niobate single crystal substrate includes 0.5 to 5 mol % of Mg. In the diffusing step, a heat treatment is performed at a diffusion temperature of 1000° C. to 1200° C. for a diffusion time of 3 hours to 24 hours in a dry atmosphere of at least one of O2, N2, Ar and He gas having a dew-point temperature of ?35° C. or less.Type: GrantFiled: March 3, 2006Date of Patent: July 26, 2011Assignees: Sumitomo Osaka Cement Co., Ltd., National Institute for Materials ScienceInventors: Futoshi Yamamoto, Katsutoshi Kondou, Junichiro Ichikawa, Masaru Nakamura, Sunao Kurimura, Shunji Takekawa, Kenji Kitamura
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Patent number: 7981212Abstract: A flash lamp annealing device comprises a heater plate, a loader, a lamp set and a control circuit. The heater plate heats a wafer to a predetermined temperature. The wafer is loaded on the loader disposed on the heater plate. The lamp set has one or a plurality of lamps to provide the wafer with a power. The control circuit is coupled to the lamp set to control the flash time of the lamp set.Type: GrantFiled: March 29, 2006Date of Patent: July 19, 2011Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Fu-Kang Tien, Jui-Pin Hung
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Patent number: 7967910Abstract: A fine structure body comprises: (i) a base body, and (ii) a plurality of metal nanorods, which have been distributed and located on a surface of the base body, a proportion X being equal to at least 15%, the proportion X being calculated with the formula: X=(A?B)/C×100[%] wherein A represents the sum total of the projected areas of all of the metal nanorods, B represents the sum total of the projected areas of certain metal nanorods, each of which is located as an isolated metal nanorod at a spacing larger than 10 nm from the closest metal nanorod, and C represents the entire projected area of the fine structure body, including regions free from the metal nanorods.Type: GrantFiled: November 20, 2006Date of Patent: June 28, 2011Assignee: FUJIFILM CorporationInventor: Yuki Matsunami
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Patent number: 7955432Abstract: A phase shifter which modulates the phase of incident light has a light-transmitting substrate such as a glass substrate, and a phase modulator such as a concavity and convexity pattern which is formed on the laser beam incident surface of the light-transmitting substrate and modules the phase of incident light. A light-shielding portion which shields light in the peripheral portion where the optical intensity distribution decreases of the phase modulator is formed on the laser beam incident surface or exit surface of the phase shifter, thereby shielding the peripheral light in the irradiation surface of the incident laser beam.Type: GrantFiled: September 20, 2006Date of Patent: June 7, 2011Assignee: Advanced LCD Technologies Development Center Co., Ltd.Inventors: Hiroyuki Ogawa, Masato Hiramatsu
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Patent number: 7942965Abstract: A method of fabricating silicon parts are provided herein. The method includes growing a silicon sample, machining the sample to form a part, and annealing the part by exposing the part sequentially to one or more gases. Process conditions during silicon growth and post-machining anneal are designed to provide silicon parts that are particularly suited for use in corrosive environments.Type: GrantFiled: March 19, 2007Date of Patent: May 17, 2011Assignee: Applied Materials, Inc.Inventors: Elmira Ryabova, Jie Yuan, Jennifer Sun
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Patent number: 7935617Abstract: A method of providing a layer in a semiconductor device, wherein the layer includes Si1-x-yGexCy, and wherein the carbon in the layer is in a stable condition, includes preparing a silicon substrate; preparing a SiGeC precursor; forming a Si1-x-yGexCy layer on the silicon substrate from the precursor; forming a top silicon layer on the Si1-x-yGexCy layer; and completing the semiconductor device.Type: GrantFiled: August 31, 2004Date of Patent: May 3, 2011Assignee: Sharp Laboratories of America, Inc.Inventor: Douglas J. Tweet
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Patent number: 7927421Abstract: A light irradiation apparatus irradiates a target plane with light having a predetermined light intensity distribution. The apparatus includes a light modulation element having a light modulation pattern of a periodic structure represented by a primitive translation vector (a1, a2), an illumination system for illuminating the modulation element with the light, and an image forming optical system for forming the predetermined light intensity distribution obtained by the modulation pattern on the target plane. A shape of an exit pupil of the illumination system is similar to the Wigner-Seitz cell of a primitive reciprocal lattice vector (b1, b2) obtained from the primitive translation vector (a1, a2) by the following equations: b1=2?(a2×a3)/(a1·(a2×a3)) and b2=2?(a3×a1)/(a1·(a2×a3)) in which a3 is a vector having an arbitrary size in a normal direction of a flat surface of the modulation pattern of the modulation element, “·” is an inner product of the vector, and “×” is an outer product of the vector.Type: GrantFiled: March 16, 2007Date of Patent: April 19, 2011Assignee: Advanced LCD Technologies Development Center Co., Ltd.Inventor: Yukio Taniguchi
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Patent number: 7919366Abstract: A laser crystallization method in which an amorphous silicon thin film 2 formed on a substrate 1 is irradiated with a laser beam, the method including the steps of providing the amorphous silicon thin film 2 with an absorbent to form an absorbent layer 3 on the desired specific local areas of the amorphous silicon thin film 2 and laser annealing for crystallizing the specific local areas of the amorphous silicon thin film 2 by irradiating the amorphous silicon thin film 2 including the specific local areas with a semiconductor laser beam L having a specific wavelength absorbable by the absorbent layer 3 and unabsorbable by the amorphous silicon thin film 2 for heating the absorbent layer 3.Type: GrantFiled: October 9, 2009Date of Patent: April 5, 2011Assignees: Osaka University, The Japan Steel Works, Ltd.Inventors: Takahisa Jitsuno, Keiu Tokumura, Ryotaro Togashi, Toshio Inami, Hideaki Kusama, Tatsumi Goto
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Publication number: 20110036288Abstract: Disclosed is a method for Sr—Ti—O-base film formation. The method comprises placing a substrate with a Ru film formed thereon in a treatment vessel, introducing a gaseous Ti material, a gaseous Sr material, and a gaseous oxidizing agent into the treatment vessel to form a first Sr—Ti—O-base film having a thickness of not more than 10 nm on the Ru film, annealing the first Sr—Ti—O-base film for crystallization, introducing a gaseous Ti material, a gaseous Sr material, and a gaseous oxidizing agent into the treatment vessel to form a second Sr—Ti—O-base film on the first Sr—Ti—O-base film, and annealing the second Sr—Ti—O-base film for crystallization.Type: ApplicationFiled: February 18, 2009Publication date: February 17, 2011Applicants: TOKYO ELECTRON LIMITED, ELPIDA MEMORY, INC.Inventors: Yumiko Kawano, Susumu Arima, Akinobu Kakimoto, Toshiyuki Hirota, Takakazu Kiyomura
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Patent number: 7887632Abstract: The present invention provides a method for manufacturing a monocrystalline film and a device formed by the above method, and according to the method mentioned above, lift-off of the monocrystalline silicon film is preferably performed and a high-purity monocrystalline silicon film can be obtained. A monocrystalline silicon substrate (template Si substrate) 201 is prepared, and on this monocrystalline silicon substrate 201, an epitaxial sacrificial layer 202 is formed. Subsequently, on this sacrificial layer 202, a monocrystalline silicon thin film 203 is rapidly epitaxially-grown using a RVD method, followed by etching of the sacrificial layer 202, whereby a monocrystalline silicon thin film 204 used as a photovoltaic layer of solar cells is formed.Type: GrantFiled: December 22, 2004Date of Patent: February 15, 2011Assignee: Japan Science and Technology AgencyInventor: Suguru Noda
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Patent number: 7879657Abstract: An insulating film layer is formed between a channel region of an MOS element formed in a monocrystal silicon layer of an SOS substrate in which the monocrystal silicon layer is laminated on a sapphire substrate, and the sapphire substrate, thereby to bring a stress state of the monocrystal silicon layer on the insulating film layer into a tensile stress state.Type: GrantFiled: June 20, 2005Date of Patent: February 1, 2011Assignee: Oki Semiconductor Co., Ltd.Inventor: Hidetsugu Uchida
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Patent number: 7875116Abstract: A method in which SSDs are reliably reduced while reducing void defects other than the SSDs on a wafer surface, which is essential for an annealed wafer, and ensuring that BMDs serving as gettering source in a bulk are generated, in order to stabilize the quality of the annealed wafer. Considering that annealing a silicon wafer leads to an increase of density (quantity) of deposits associated with oxygen and nitrogen and forming a core of the SSDs, SSDs are decreased by reducing the density (quantity) of the deposits associated with oxygen and nitrogen by controlling three parameters of oxygen concentration, nitrogen concentration and cooling concentration during the process of pulling and growing the silicon single crystal 6 before annealing. Alternatively, SSD is reduced by polishing after annealing.Type: GrantFiled: February 14, 2006Date of Patent: January 25, 2011Assignee: Sumco Techxiv CorporationInventors: Shinya Sadohara, Ryota Suewaka, Shiro Yoshino, Kozo Nakamura, Yutaka Shiraishi, Syunji Nonaka
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Publication number: 20100330753Abstract: Integrated circuit devices are provided including a first single-crystalline layer and an insulating layer pattern on the first single-crystalline layer. The insulating layer pattern has an opening therein that partially exposes the first single-crystalline layer. A seed layer is in the opening. A second single-crystalline layer is on the insulating layer pattern and the seed layer. The second single-crystalline layer has a crystalline structure substantially the same as that of the seed layer. A transcription-preventing pattern is on the second single-crystalline layer and a third single-crystalline layer on the transcription-preventing pattern and the second single-crystalline layer. The transcription-preventing pattern is configured to limit transcription of defective portions in the second single-crystalline layer into the third single-crystalline layer.Type: ApplicationFiled: September 10, 2010Publication date: December 30, 2010Inventors: Pil-Kyu Kang, Yong-Hoon Son, Si-Young Choi, Jong-Wook Lee, Byeong-Chan Lee, InSoo Jung
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Patent number: 7837790Abstract: Methods and apparatus for formation and treatment of epitaxial layers containing silicon and carbon are disclosed. Treatment of the epitaxial layer converts interstitial carbon to substitutional carbon. Specific embodiments pertain to the formation and treatment of epitaxial layers in semiconductor devices, for example, Metal Oxide Semiconductor Field Effect Transistor (MOSFET) devices. In specific embodiments, the treatment of the epitaxial layer involves annealing for short periods of time, for example, by laser annealing, millisecond annealing, rapid thermal annealing, and spike annealing in a environment containing nitrogen.Type: GrantFiled: December 1, 2006Date of Patent: November 23, 2010Assignee: Applied Materials, Inc.Inventors: Yihwan Kim, Arkadii V. Samoilov
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Patent number: 7828893Abstract: A silicon wafer having no epitaxially deposited layer or layer produced by joining to the silicon wafer, with a nitrogen concentration of 1·1013-8·1014 atoms/cm3, an oxygen concentration of 5.2·1017-7.5·1017 atoms/cm3, a central thickness BMD density of 3·108-2·1010 cm?3, a cumulative length of linear slippages ?3 cm and a cumulative area of areal slippage regions ?7 cm2, the front surface having <45 nitrogen-induced defects of >0.13 ?m LSE in the DNN channel, a layer at least 5 ?m thick, in which ?1·104 COPs/cm3 with a size of ?0.09 ?m occur, and a BMD-free layer ?5 ?m thick. Such wafers may be produced by heat treating the silicon wafer, resting on a substrate holder, a specific substrate holder used depending on the wafer doping. For each holder, maximum heating rates are selected to avoid formation of slippages.Type: GrantFiled: March 22, 2006Date of Patent: November 9, 2010Assignee: Siltronic AGInventors: Timo Mueller, Wilfried von Ammon, Erich Daub, Peter Krottenthaler, Klaus Messmann, Friedrich Passek, Reinhold Wahlich, Arnold Kuehhorn, Johannes Studener
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Patent number: 7828894Abstract: A crystallization method, includes: forming an amorphous silicon layer on a substrate; forming a first crystallization region by irradiating the amorphous silicon layer with a laser beam having a ramp shaped cross sectional profile that decreases in a scanning direction; and performing a second crystallization by moving a predetermined length in a scanning direction so as to be partially overlapped with the first crystallization region formed by the first crystallization.Type: GrantFiled: November 2, 2005Date of Patent: November 9, 2010Assignee: LG Display Co., Ltd.Inventor: JaeSung You
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Patent number: 7799158Abstract: A method for producing a crystallographically-oriented ceramic includes the steps of forming a first sheet with a thickness of 10 ?m or less containing a first inorganic material in which grain growth occurs at a first temperature or higher and a second sheet containing a second inorganic material in which grain growth occurs at a second temperature higher than the first temperature, laminating one or more each of the first and second sheets to form a laminated body, firing the laminated body at a temperature equal to or higher than the first temperature and lower than the second temperature to cause grain growth in the first inorganic material, and then firing the laminated body at a temperature equal to or higher than the second temperature to cause grain growth in the second inorganic material in the direction of a crystal plane of the first inorganic material.Type: GrantFiled: January 14, 2008Date of Patent: September 21, 2010Assignee: NGK Insulators, Ltd.Inventors: Shohei Yokoyama, Nobuyuki Kobayashi, Tsutomu Nanataki
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Patent number: 7790636Abstract: A method for configuring J electromagnetic radiation sources (J?2) to simultaneously irradiate a substrate. Each source has a different function of wavelength and angular distribution of emitted radiation. The substrate includes a base layer and I stacks (I?2) thereon. Pj denotes a same source-specific normally incident energy flux on each stack from source j. For simultaneous exposure of the I stacks to radiation from the J sources, Pj is computed such that an error E being a function of |W1?S1|, |W2?S2, . . . , |WI?SI| is about minimized with respect to Pj=1, . . . , J). Wi and Si respectively denote an actual and target energy flux transmitted into the substrate via stack i (i=1, . . . , I). The stacks are exposed to the radiation from the sources characterized by the computed Pj (j=1, . . . , J).Type: GrantFiled: June 29, 2006Date of Patent: September 7, 2010Assignee: International Business Machines CorporationInventors: Brent Alan Anderson, Edward Joseph Nowak
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Patent number: 7785659Abstract: A method of manufacturing an orientation film which method is suitable for manufacturing an orientation film containing a ceramic at low cost. The method includes the steps of: (a) forming a ceramic film on a seed substrate in which crystal orientation is controlled at least on a surface thereof by using an aerosol deposition method of injecting powder toward a substrate and depositing the powder on the substrate; and (b) heat-treating the ceramic film formed at step (a) to form an orientation film in which crystal grains contained in the ceramic film is oriented.Type: GrantFiled: March 20, 2006Date of Patent: August 31, 2010Assignee: FUJIFILM CorporationInventor: Yasukazu Nihei
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Patent number: 7776151Abstract: A crystallization method which generates a crystallized semiconductor film by irradiating at least one of a polycrystal semiconductor film and an amorphous semiconductor film with light beams having a light intensity distribution with an inverse peak pattern that a light intensity is increased toward the periphery from an inverse peak at which the light intensity is minimum, wherein a light intensity value ? (standardized value) in the inverse peak when a maximum value of the light intensity in the light intensity distribution with the inverse peak pattern is standardized as 1 is set to 0.2?value ??0.8.Type: GrantFiled: October 3, 2007Date of Patent: August 17, 2010Assignee: Advanced LCD Technologies Development Center Co., Ltd.Inventors: Yukio Taniguchi, Masakiyo Matsumura
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Patent number: 7758695Abstract: One embodiment of the present invention provides a method for fabricating a high-quality metal substrate. During operation, the method involves cleaning a polished single-crystal substrate. A metal structure of a predetermined thickness is then formed on a polished surface of the single-crystal substrate. The method further involves removing the single-crystal substrate from the metal structure without damaging the metal structure to obtain the high-quality metal substrate, wherein one surface of the metal substrate is a high-quality metal surface which preserves the smoothness and flatness of the polished surface of the single-crystal substrate.Type: GrantFiled: March 2, 2007Date of Patent: July 20, 2010Assignee: Lattice Power (Jiangxi) CorporationInventors: Chuanbing Xiong, Wenqing Fang, Li Wang, Guping Wang, Fengyi Jiang
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Publication number: 20100173127Abstract: The present invention provides a method for providing a crystalline germanium layer on a crystalline base substrate having a crystalline surface. The method comprises cleaning the base substrate for removing contaminants and/or native oxides from the surface, providing an amorphous germanium layer on the surface of the base substrate while exposing to the base substrate to a hydrogen source such as e.g. a hydrogen plasma, a H2 flux or hydrogen originating from dissociation of GeH4 and/or to a non-reactive gas source such as N2, He, Ne, Ar, Kr, Xe, Rn or mixtures thereof, and crystallising the amorphous germanium layer by annealing the base substrate so as to provide a crystalline germanium layer.Type: ApplicationFiled: July 18, 2008Publication date: July 8, 2010Applicant: IMECInventors: Ruben Lieten, Stefan Degroote
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Patent number: 7749323Abstract: A single crystal for a scintillator that is a specific single crystal of a cerium-activated orthosilicate compound that comprises 0.00005 to 0.1 wt. %, based on the entire weight of the single crystal, of at least one element selected from a group consisting of elements belonging to Group 13 of the periodic table.Type: GrantFiled: May 30, 2007Date of Patent: July 6, 2010Assignee: Hitachi Chemical Company, Ltd.Inventors: Naoaki Shimura, Yasushi Kurata, Tatsuya Usui, Kazuhisa Kurashige
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Patent number: RE43450Abstract: An object of the present invention is to provide a technology of reducing a nickel element in the silicon film which is crystallized by using nickel. An extremely small amount of nickel is introduced into an amorphous silicon film which is formed on the glass substrate. Then this amorphous silicon film is crystallized by heating. At this time, the nickel element remains in the crystallized silicon film. Then an amorphous silicon film is formed on the surface of the silicon film crystallized with the action of nickel. Then the amorphous silicon film is further heat treated. By carrying out this heat treatment, the nickel element is dispersed from the crystallized silicon film into the amorphous silicon film with the result that the nickel density in the crystallized silicon film is lowered.Type: GrantFiled: October 6, 2003Date of Patent: June 5, 2012Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Hisashi Ohtani, Akiharu Miyanaga, Satoshi Teramoto