Of Amorphous Precursor Patents (Class 117/8)
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Patent number: 6265250Abstract: A method for making a ULSI MOSFET using silicon on insulator (SOI) principles includes masking regions of an amorphous silicon film on a substrate and exposing intended active regions. Laser energy is directed against the intended active regions to anneal these regions without annealing the masked regions, thereby increasing production throughput and decreasing defect density.Type: GrantFiled: September 23, 1999Date of Patent: July 24, 2001Assignee: Advanced Micro Devices, Inc.Inventor: Bin Yu
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Patent number: 6255146Abstract: According to a method of manufacturing a thin film transistor (TFT), amorphous silicon is formed by ion-implanting either silicon or nitrogen into a region of polysilicon while a region located at the sidewall of a gate electrode is selectively left using the stepped portion of the gate electrode. Then, a heat treatment is applied to convert the amorphous silicon into polysilicon with the remaining polysilicon as a seed crystal. As a result, polysilicon having crystal grains of great grain size can be formed in uniform. Thus, the electric characteristics of a TFT can be improved with no difference in the electric characteristics between each TFT.Type: GrantFiled: October 31, 2000Date of Patent: July 3, 2001Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Satoshi Shimizu, Shuichi Ueno, Shigenobu Maeda, Takashi Ipposhi
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Patent number: 6251183Abstract: The invention provides a process for depositing an epitaxial layer on a crystalline substrate, comprising the steps of providing a chamber having an element capable of heating, introducing the substrate into the chamber, heating the element at a temperature sufficient to decompose a source gas, passing the source gas in contact with the element; and forming an epitaxial layer on the substrate.Type: GrantFiled: May 21, 1999Date of Patent: June 26, 2001Assignee: Midwest Research InstituteInventors: Eugene Iwancizko, Kim M. Jones, Richard S. Crandall, Brent P. Nelson, Archie Harvin Mahan
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Patent number: 6241817Abstract: A method for crystallizing an amorphous layer into a polycrystalline layer. The method uses a substrate under the amorphous layer and a nickel film on the amorphous layer, which are subjected to a heat treatment. The nickel film is formed by a coating step that uses a nickel-containing solution. Alternatively, a nickel and gold, or a nickel and palladium, solution can be used. The method eliminates contamination with metal in the polycrystalline silicon layer and reduces its growth temperature.Type: GrantFiled: May 22, 1998Date of Patent: June 5, 2001Assignees: LG Electronics Inc.Inventors: Jin Jang, Soo-Young Yoon, Jae-Young Oh
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Publication number: 20010000733Abstract: Provided is a method of manufacturing a nitride system III-V compound layer which improves the quality and facilitates the manufacturing process and a method of manufacturing a substrate employing the method of manufacturing a nitride system III-V compound layer. A first growth layer is grown on a growth base at a growth rate, in a vertical direction to the growth surface, higher than 10 &mgr;m/h. Subsequently, a second growth layer is grown at a growth rate, in a vertical direction to the growth surface, lower than 10 &mgr;m/h. The first growth layer grown at the higher growth rate has a rough surface. However, the second growth layer is grown at the lower growth rate than that used for growing the first growth layer, so that depressions of the surface of the first growth layer are filled and thus the surface of the second growth layer is flattened. Further, growth takes place laterally so as to fill the depressions of the surface of the first growth layer.Type: ApplicationFiled: December 5, 2000Publication date: May 3, 2001Applicant: Sony CorporationInventor: Satoshi Tomioka
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Patent number: 6217647Abstract: To produce monocrystalline layers of conducting or semiconducting materials on porous monocrystalline layers of the same material in a reproducible and time-saving manner, a method is provided which involves applying an amorphous layer of the same material to the porous material and converting the amorphous layer to a monocrystalline layer by tempering.Type: GrantFiled: January 21, 1999Date of Patent: April 17, 2001Assignee: Robert Bosch GmbHInventors: Franz Laermer, Wilhelm Frey
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Patent number: 6207574Abstract: A dynamic random access memory (DRAM) cell storage node and a fabricating method thereof are provided. A storage contact plug 118 is formed in a first insulating layer 104 on a semiconductor substrate. A second insulating layer 110, a material layer 112, and a third insulating layer 114 are sequentially formed on the first insulating layer. The material layer prevents etchant of the third insulating layer from attacking the second insulating layer. The third insulating layer, the material layer, and the second insulating layer are sequentially etched to form an opening exposing the storage contact plug and a portion of the surface of the first insulating layer. The opening is filled with a conductive layer to form a storage node 116. The third insulating layer is etched until the top surface of the material layer is exposed, and the material layer is etched until the top surface of the second insulating layer is exposed.Type: GrantFiled: July 13, 1999Date of Patent: March 27, 2001Assignee: Samsung Electronics Co., Ltd.Inventor: Kang-Yoon Lee
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Patent number: 6204156Abstract: A process to fabricate a thin film transistor using an intrinsic polycrystalline silicon film, by a method of: preparing a semiconductor assembly; forming an insulation layer on a substrate; forming a first amorphous silicon layer on said insulation layer; forming silicon nucleation sites on said first amorphous silicon layer; converting said first amorphous silicon layer into hemispherical grained silicon, said hemispherical grained silicon being formed about said silicon nucleation sites; forming a second amorphous silicon layer covering said hemispherical grained silicon; annealing said second amorphous silicon layer to convert said second amorphous silicon layer into a grained silicon film, said grained silicon film being formed about said hemispherical grained silicon and having a dimension of approximately 0.1 microns to 0.Type: GrantFiled: September 2, 1999Date of Patent: March 20, 2001Assignee: Micron Technology, Inc.Inventor: Er-Xuan Ping
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Patent number: 6187088Abstract: A pulse laser beam having a rectangular irradiation region is irradiated on the same point in a non-single crystal semiconductor film multiple times. The pulse laser beam has an energy profile in a longitudinal direction in the beam irradiation region as follows: (a) there are the first region having an energy density of Ea or higher and the second regions on both sides of the first region having an energy density of less than Ea, and (b) an energy density slope has an absolute value of 20 to 300 J/cm3 in a boundary region extending to 1 &mgr;m from the boundary line between the first and the second regions.Type: GrantFiled: July 15, 1999Date of Patent: February 13, 2001Assignee: NEC CorporationInventor: Hiroshi Okumura
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Patent number: 6176922Abstract: A method is presented for crystallizing a thin film on a substrate by generating a beam of pulsed optical energy, countouring the intensity profile of the beam, and illuminating the thin film with the beam to crystallize the thin film into a single crystal lattice structure.Type: GrantFiled: October 6, 1999Date of Patent: January 23, 2001Assignee: The United States of America as represented by the Secretary of the NavyInventors: Monti E. Aklufi, Stephen D. Russell
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Patent number: 6174754Abstract: A method for fabricating a transistor device on a semiconductor substrate, comprising the following steps. A semiconductor substrate having a silicon surface with an overlying insulating dielectric layer is provided. The insulating dielectric layer is patterned to define hole/channel regions having predetermined widths. An amorphous silicon layer is formed having a predetermined thickness over the dielectric layer and the hole/channel regions, filling the hole/channel regions. Heating (grain growth) the amorphous silicon layer to form a planar silicon layer, comprising at least a portion of epitaxial-silicon, having a predetermined thickness, over the dielectric layer and through the hole/channel regions, filling the hole/channel regions. The planar silicon layer is patterned to expose the hole/channel regions and define transistor regions. Trenches are formed in the silicon surface adjacent the transistor regions.Type: GrantFiled: March 17, 2000Date of Patent: January 16, 2001Assignee: Taiwan Semiconductor Manufacturing CompanyInventors: Jin-Yuan Lee, Mong-Song Liang, Boon-Khim Liew
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Patent number: 6162667Abstract: In a fabrication of a semiconductor device, an amorphous semiconductor film is first formed on a substrate having an insulating surface. Then, a minute amount of catalyst elements for accelerating crystallization of the amorphous semiconductor film is supplied to at least a portion of a surface of the amorphous semiconductor film. A heat treatment is further conducted so that the supplied catalyst elements are diffused into the amorphous semiconductor film. Thus, the catalyst elements are introduced uniformly into the amorphous semiconductor film in a very minute amount or at a low concentration, resulting in polycrystallization of at least a portion of the amorphous semiconductor film. Utilizing the thus obtained crystalline semiconductor film on the substrate surface as an active region, a semiconductor device such as a TFT is fabricated.Type: GrantFiled: March 23, 1995Date of Patent: December 19, 2000Assignee: Sharp Kabushiki KaishaInventors: Takashi Funai, Naoki Makita, Yoshitaka Yamamoto, Tadayoshi Miyamoto, Takamasa Kousai, Masashi Maekawa
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Patent number: 6153166Abstract: According to the present invention, a complex (M) which is formed by stacking a polycrystalline .beta.-SiC plate 2 on the surface of a single crystal .alpha.-SiC base material 1 in a close contact state via a polished face or grown in a layer-like manner by the thermal CVD method is heat-treated in a temperature range of 1,850 to 2,400.degree. C., whereby polycrystals of the polycrystalline cubic .beta.-Sic plate are transformed into a single crystal, and the single crystal oriented in the same direction as the crystal axis of the single crystal .alpha.-SiC base material is grown. As a result, large single crystal SiC of high quality which is free from micropipe defects, lattice defects, generation of grain boundaries due to intrusion of impurities, and the like can be produced easily and efficiently.Type: GrantFiled: February 3, 1999Date of Patent: November 28, 2000Assignee: Nippon Pillar Packing Co., Ltd.Inventor: Kichiya Tanino
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Patent number: 6143366Abstract: A process is disclosed for reducing the crystallization temperature of amorphous or partially crystallized ceramic films by providing a higher pressure under which the crystallization of the amorphous or partially crystallized ceramic films can be significantly enhanced. The present invention not only improves quality, performance and reliability of the ceramic films, but also reduces the cost for production. By lowering the crystallization temperature, the cost for thermal energy consumed during the crystallization process is greatly reduced. In addition, the interaction or interdiffusion occurring between films and substrates is significantly suppressed or essentially prevented, avoiding the off-stoichiometry and malfunction of thin films, which usually occur in the conventional high-temperature crystallization processes. The process of present invention also decreases the grain size of formed films, thus reducing the roughness of films and producing relatively smooth, good quality films.Type: GrantFiled: December 24, 1998Date of Patent: November 7, 2000Inventor: Chung Hsin Lu
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Patent number: 6110770Abstract: A process for fabricating a semiconductor by crystallizing a silicon film in a substantially amorphous state by annealing it at a temperature not higher than the crystallization temperature of amorphous silicon, and it comprises forming selectively, on the surface or under an amorphous silicon film, a coating, particles, clusters, and the like containing nickel, iron, cobalt, platinum or palladium either as a pure metal or a compound thereof such as a silicide, a salt, and the like, shaped into island-like portions, linear portions, stripes, or dots; and then annealing the resulting structure at a temperature lower than the crystallization temperature of an amorphous silicon by 20 to 150.degree. C.Type: GrantFiled: January 13, 1999Date of Patent: August 29, 2000Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hongyong Zhang, Hideki Uochi, Toru Takayama, Shunpei Yamazaki, Yasuhiko Takemura
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Patent number: 6093243Abstract: A single crystal and a polycrystal having an excellent crystal quality and providing a highly reliable semiconductor device are formed by solid phase growth at low temperatures. An amorphous thin film is deposited on a substrate such that an average inter-atomic distance of main constituent element of the amorphous thin film is 1.02 times or more of an average inter-atomic distance of the elements in single crystal, and crystallization energy is applied to the amorphous thin film to perform solid phase growth to thereby form a single crystal.Type: GrantFiled: October 28, 1997Date of Patent: July 25, 2000Assignee: Kabushiki Kaisha ToshibaInventors: Takako Okada, Shigeru Kambayashi, Moto Yabuki, Shinji Onga, Yoshitaka Tsunashima, Yuuichi Mikata, Haruo Okano
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Patent number: 6071764Abstract: After a pattern is transferred on silicon film crystallized by annealing, the silicon film is annealed by radiation of intense rays for a short time. Especially, in the crystallizing process by annealing, an element which promotes crystallization such as nickel is doped therein. The area not crystallized by annealing is also crystallized by radiation of intense rays and a condensed silicon film is formed.After a metal element which promotes crystallization is doped, annealing by light for a short time is performed by radiating intense rays onto the silicon film crystallized by annealing in an atmosphere containing halide. After the surface of the silicon film is oxidized by heating or by radiating intense rays in a halogenated atmosphere and an oxide film is formed on the silicon film, the oxide film is then etched. As a result, nickel in the silicon film is removed.Type: GrantFiled: June 28, 1995Date of Patent: June 6, 2000Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hongyong Zhang, Hideto Ohnuma, Yasuhiko Takemura
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Patent number: 6057213Abstract: Methods of forming polycrystalline semiconductor layers include the steps of forming a first polycrystalline semiconductor layer on a first amorphous semiconductor layer. The first polycrystalline semiconductor layer is then converted to a second amorphous semiconductor layer. At least a portion of the second amorphous semiconductor layer is then converted to a second polycrystalline semiconductor layer. In particular, relatively large size crystal grains may be produced in a semiconductor layer by converting the second amorphous semiconductor layer and at least a portion of the first amorphous semiconductor layer to a second polycrystalline semiconductor layer.Type: GrantFiled: February 19, 1998Date of Patent: May 2, 2000Assignee: Samsung Electronics Co.Inventor: Joo-hyung Lee
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Patent number: 6048394Abstract: A method is disclosed for forming a single crystal relaxor based material, including the following steps: providing a seed single crystal plate, providing a first and second polycrystalline structure, bonding the top surface of the seed crystal plate to the outer surface of the first polycrystalline structure, bonding the bottom surface of the seed crystal plate to the outer surface of the second polycrystalline structure, and annealing the bonded structure.Type: GrantFiled: August 14, 1998Date of Patent: April 11, 2000Assignee: Competitive Technologies of PA, Inc.Inventors: Martin P. Harmer, Helen M. Chan, Ho-Yong Lee, Adam M. Scotch, Tao Li, Frank Meschke, Ajmal Khan
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Patent number: 5993538Abstract: In order to form a single-crystalline thin film on a polycrystalline substrate using plasma CVD, a downwardly directed mainly neutral Ne atom current is formed by an ECR ion generator (2). A reaction gas such as silane gas which is supplied from a reaction gas inlet pipe (13) is sprayed onto an SiO.sub.2 substrate (11) by an action of the Ne atom current, so that an amorphous Si thin film is grown on the substrate (11) by a plasma CVD reaction. At the same time, a part of the Ne atom current having high directivity is directly incident upon the substrate (11), while another part thereof is incident upon the substrate (11) after its course is bent by a reflector (12). The reflector (12) is so set that all directions of the parts of the Ne atom current which are incident upon the substrate (11) are perpendicular to densest planes of single-crystalline Si.Type: GrantFiled: February 13, 1996Date of Patent: November 30, 1999Assignee: Mega Chips CorporationInventors: Toshifumi Asakawa, Masahiro Shindo, Toshikazu Yoshimizu, Sumiyoshi Ueyama
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Patent number: 5985704Abstract: A method for forming a silicon island used for forming a TFT or thin film diode comprises the step of pattering a silicon film with a photoresist mask. In order to prevent the contamination of the semiconductor film due to the photoresist material, a protective film such as silicon oxide is interposed between the semiconductor film and the photoresist film. Also, the protective film is preferably formed by thermal annealing or light annealing in an oxidizing atmosphere.Type: GrantFiled: December 7, 1995Date of Patent: November 16, 1999Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hiroki Adachi, Akira Takenouchi, Yasuhiko Takemura
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Patent number: 5972105Abstract: Thin-film transistors (TFTs) having characteristics comparable to those of a single-crystal silicon wafer are provided. A buffer film made from silicon oxide is formed on a first amorphous silicon film. A nickel acetate solution containing a metal element such as nickel for promoting crystallization of silicon is applied to the first amorphous silicon film. The laminate is heat-treated to form a nickel silicide layer. The nickel silicide layer is then patterned. A second amorphous silicon film is formed and heat-treated to grow crystals. Thus, monodomain regions which can be regarded as single crystals are formed. Active layers of TFTs are formed from these monodomain regions.Type: GrantFiled: September 14, 1995Date of Patent: October 26, 1999Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Naoto Kusumoto, Satoshi Teramoto
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Patent number: 5956581Abstract: A method of manufacturing a semiconductor device, comprises the steps of: forming an amorphous silicon film on a substrate having an insulating surface; processing said amorphous silicon film by plasma of a gas that mainly contains hydrogen or helium; and giving an energy to said amorphous silicon film.Type: GrantFiled: March 15, 1996Date of Patent: September 21, 1999Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Satoshi Teramoto, Naoto Kusumoto, Hideto Ohnuma
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Patent number: 5930608Abstract: A semiconductor device which is excellent in reliability and electrical characteristics. The semiconductor device is formed on an insulating substrate. A channel region is formed between a source and a drain by the voltage applied to a gate electrode. The channel region, the source, and the drain are fabricated from a semiconductor having a large mobility. The other regions including the portion located under the channel region are fabricated from a semiconductor having a small mobility.Type: GrantFiled: July 17, 1996Date of Patent: July 27, 1999Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Yasuhiko Takemura
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Patent number: 5891241Abstract: Hydrogenated amorphous carbon mainly composed of sp.sup.3 structure is prepared by adding hydrogen to carbon or decomposing hydrogenated carbon gas, and then rapidly cooling the mixed or decomposed gas on a substrate. The hydrogenated amorphous carbon is irradiated with X rays to excite electrons on the 1s shells of carbon atoms. The carbon atoms are rendered to a state excited with 2.sup.+ ion due to Auger effect caused by the exciation, so as to form atomic vacancies and interlattice atomic couples. The hydrogenated amorphous carbon is then annealed, and carbon atoms are rearranged to rotated triangular pattern. Thus, diamond good of crystallinity useful as a high-temperature semiconductor device, ultraviolet laser diode or protective film can be synthesized at a relatively low temperature and a low pressure. The process is applicable for the growth of a diamond single crystal thin film on a single crystal substrate such as amorphous carbon, silicon, or a Group III-V or II-VI compound semiconductor.Type: GrantFiled: June 28, 1996Date of Patent: April 6, 1999Assignee: Research Development Corporation of JapanInventor: Hiroshi Yoshida
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Patent number: 5882400Abstract: The invention concerns a method of producing a surface layer structure by doping a matrix with metal ions. The aim of the invention is to provide a method of this kind in which the depth distribution of the metal ions in the substrate can be regulated, thus optimumizing the doping without incurring any of the disadvantages inherent in the prior art methods. This is achieved by first depositing matrix material on a suitable substrate by laser ablation in an atmosphere of oxygen, thus forming a on surface of the substrate a first layer a matrix material. Dopant is then deposited on the surface of the first layer, followed by more matrix material. The result is a uniform doping of the deposited matrix at a defined depth in the surface layer structure.Type: GrantFiled: May 10, 1996Date of Patent: March 16, 1999Assignee: Forschungszentrum Julich GmbHInventors: Stefanie Bauer, Martin Fleuster, Willi Zander, Jurgen Schubert, Christoph Buchal
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Patent number: 5879977Abstract: A process for fabricating a semiconductor by crystallizing a silicon film in a substantially amorphous state by annealing it at a temperature not higher than the crystallization temperature of amorphous silicon, and it comprises forming selectively, on the surface or under an amorphous silicon film, a coating, particles, clusters, and the like containing nickel, iron, cobalt, platinum or palladium either as a pure metal or a compound thereof such as a silicide, a salt, and the like, shaped into island-like portions, linear portions, stripes, or dots; and then annealing the resulting structure at a temperature lower than the crystallization temperature of an amorphous silicon by 20.degree. to 150.degree. C.Type: GrantFiled: April 23, 1996Date of Patent: March 9, 1999Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hongyong Zhang, Hideki Uochi, Toru Takayama, Shunpei Yamazaki, Yasuhiko Takemura
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Patent number: 5879447Abstract: A single crystal and a polycrystal having an excellent crystal quality and providing a highly reliable semiconductor device are formed by solid phase growth at low temperatures. An amorphous thin film is deposited on a substrate such that an average inter-atomic distance of main constituent element of the amorphous thin film is 1.02 times or more of an average inter-atomic distance of the elements in single crystal, and crystallization energy is applied to the amorphous thin film to perform solid phase growth to thereby form a single crystal.Type: GrantFiled: June 7, 1995Date of Patent: March 9, 1999Assignee: Kabushiki Kaisha ToshibaInventors: Takako Okada, Shigeru Kambayashi, Moto Yabuki, Shinji Onga, Yoshitaka Tsunashima, Yuuichi Mikata, Haruo Okano
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Patent number: 5858823Abstract: In a monolithic active matrix circuit formed on a substrate, the active regions of at least a part of the thin film transistors (TFTs) constituting the peripheral circuit for driving the matrix region are added with a metal element for promoting the crystallization of silicon at a concentration of 1.times.10.sup.16 to 5.times.1019 cm.sup.-3, no metal element is added to the active region of the TFTs for the matrix region. The channel forming regions of at least a part of the TFTs constituting the peripheral circuit and the channel forming regions of the TFTs for the matrix region are formed by a silicon semiconductor thin film having a monodomain structure.Type: GrantFiled: December 18, 1996Date of Patent: January 12, 1999Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Satoshi Teramoto
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Patent number: 5851862Abstract: A film having a high thermal conductivity material such as aluminum nitride is formed on a substrate, and then a silicon film is formed. When a laser light or an intense light corresponding to the laser light is irradiated to the silicon film, since the aluminum nitride film absorbs heat, a portion of the silicon film near the aluminum nitride film is solidified immediately. However, since a solidifying speed is slow in another portion of the silicon film, crystallization progresses from the portion near the aluminum nitride film. When a substrate temperature is 400.degree. C. or higher at laser irradiation, since a solidifying speed is decreased, a crystallinity of the silicon film is increased. Also, when the substrate is thin, the crystallinity of the silicon film is increased.Type: GrantFiled: April 18, 1997Date of Patent: December 22, 1998Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hisashi Ohtani, Yasuhiko Takemura, Akiharu Miyanaga, Shunpei Yamazaki
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Patent number: 5843811Abstract: A method of forming a crystalline thin film from an amorphous semiconductor thin film such as amorphous silicon, by providing a generally planar nucleation inducing member, such as a crystalline silicon wafer, having a number of micro-scale surface contact points and with a hardness equal to or greater than the hardness of the amorphous semiconductor thin film, contacting under pressure the surface contact points of the nucleation inducing member with the exposed surface of the amorphous thin film to form an assembly, annealing the assembly at between 300 to 700 degrees C. for 1 to 24 hours to crystallize the amorphous thin film, and removing the nucleation inducing member.Type: GrantFiled: September 9, 1996Date of Patent: December 1, 1998Assignee: University of FloridaInventors: Rajiv K. Singh, Rolf E. Hummel, Soon-Moon Jung
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Patent number: 5843225Abstract: A process for fabricating a semiconductor at a lower crystallization temperature and yet at a shorter period of time, which comprises forming an insulator coating on a substrate; exposing said insulator coating to a plasma; forming an amorphous silicon film on said insulator coating after its exposure to said plasma; and heat treating said silicon film in the temperature range of from 400.degree. to 650.degree. C. or at a temperature not higher than the glass transition temperature of the substrate. The nucleation sites are controlled by selectively exposing the amorphous silicon film to a plasma or by selectively applying a substance containing elements having a catalytic effect thereto. A process for fabricating a thin film transistor using the same is also disclosed.Type: GrantFiled: June 7, 1995Date of Patent: December 1, 1998Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Toru Takayama, Yasuhiko Takemura, Hongyong Zhang, Shunpei Yamazaki
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Patent number: 5837053Abstract: A single crystal material is prepared by forming a layer of an amorphous substance over a surface of a substrate of a single crystal having the same chemical composition as that of the amorphous substance, the resulting composite material is heated to epitaxially grow the amorphous layer into a single crystal layer. A composite material for producing such a single crystal material is also disclosed which includes a substrate of a single crystal, and a layer of an amorphous substance having the same chemical composition as that of the substrate, the layer having such a thickness that the layer as a whole can epitaxially grow to make a single crystal layer.Type: GrantFiled: November 28, 1995Date of Patent: November 17, 1998Assignee: International Superconductivity Technology CenterInventors: Furen Wang, Tadataka Morishita
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Patent number: 5817548Abstract: A method for crystallizing a portion of a semiconductor thin film while forming a semiconductor device comprises providing a transparent substrate supporting a metallic gate electrode and an amorphous semiconductor thin film which are separated from each other by a gate insulating film, heating the gate electrode by subjecting it to light rays, and applying a laser beam to the amorphous semiconductor thin film so that the portion of the semiconductor thin film adjacent the metallic gate electrode is heated by both the laser beam and the heat of the gate electrode to cause a crystallization of a portion of the amorphous thin film and then processing the remaining amorphous portions of the thin film to form the transistor structure.Type: GrantFiled: November 8, 1996Date of Patent: October 6, 1998Assignee: Sony CorporationInventors: Takashi Noguchi, Yasushi Shimogaichi
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Patent number: 5803965Abstract: A method and system for manufacturing a semiconductor device having a semiconductor layer using a pulsed laser includes the steps of generating a laser beam using a solid laser source, generating a multi-harmonic wave from the laser beam using a multi-harmonic oscillator, filtering the multi-harmonic wave, and irradiating the filtered wave onto the semiconductor layer.Type: GrantFiled: August 13, 1996Date of Patent: September 8, 1998Assignee: LG Electronics, Inc.Inventor: Jung Kee Yoon
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Patent number: 5773309Abstract: A method for fabricating amorphous silicon thin film transistors (TFTs) with a polycrystalline silicon surface channel region for enhanced forward current drive. The method is particularly adapted for producing top-gate silicon TFTs which have the advantages of both amorphous and polycrystalline silicon TFTs, but without problem of leakage current of polycrystalline silicon TFTs. This is accomplished by selectively crystallizing a selected region of the amorphous silicon, using a pulsed excimer laser, to create a thin polycrystalline silicon layer at the silicon/gate-insulator surface. The thus created polysilicon layer has an increased mobility compared to the amorphous silicon during forward device operation so that increased drive currents are achieved. In reverse operation the polysilicon layer is relatively thin compared to the amorphous silicon, so that the transistor exhibits the low leakage currents inherent to amorphous silicon.Type: GrantFiled: August 7, 1995Date of Patent: June 30, 1998Assignee: The Regents of the University of CaliforniaInventor: Kurt H. Weiner
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Patent number: 5766989Abstract: A method for forming a polycrystalline semiconductor thin film according to the present invention includes the steps of: forming a semiconductor thin film partially containing microcrystals serving as crystal nuclei for polycrystallization on an insulating substrate; and polycrystallizing the semiconductor thin film by laser annealing.Type: GrantFiled: December 27, 1995Date of Patent: June 16, 1998Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Shigeki Maegawa, Mamoru Furuta, Hiroshi Tsutsu, Tetsuya Kawamura, Yutaka Miyata
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Patent number: 5759262Abstract: A method of forming HSG is disclosed, in which a layer of starting material is formed on a wafer, the layer of starting material is seeded with a species and the seeded layer is annealed. The seeding and annealing steps can be performed under different conditions and can be varied independently of each other.Type: GrantFiled: April 2, 1997Date of Patent: June 2, 1998Assignee: Micron Technology, Inc.Inventors: Ronald A. Weimer, Randhir P. S. Thakur, Avishai Kepten, Michael Sendler
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Patent number: 5756364Abstract: It is intended to provide a technique of separately forming thin-film transistors disposed in a peripheral circuit area and those disposed in a pixel area in accordance with characteristics required therefor in a manufacturing process of semiconductor devices to constitute a liquid crystal display device. In an annealing step by laser light illumination, laser light is selectively applied to a semiconductor thin-film by partially masking it. For example, to illuminate the peripheral circuit area and the pixel area with laser light under different conditions in manufacture of an active matrix liquid crystal display device, laser light is applied at necessary illumination energy densities by using a mask. In this manner, a crystalline silicon film having a necessary degree of crystallinity in a selective manner can be obtained.Type: GrantFiled: November 22, 1995Date of Patent: May 26, 1998Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Koichiro Tanaka, Naoaki Yamaguchi
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Patent number: 5753542Abstract: A semiconductor material and a method for forming the same, said semiconductor material having produced by a process comprising melting a noncrystal semiconductor film containing therein carbon, nitrogen, and oxygen each at a concentration of 5.times.10.sup.19 atoms.cm.sup.-3 or lower, preferably 1.times.10.sup.19 atoms.cm.sup.-3 or lower, by irradiating a laser beam or a high intensity light equivalent to a laser beam to said noncrystal semiconductor film, and then recrystallizing the thus molten amorphous silicon film. The present invention provides thin film semiconductors having high mobility at an excellent reproducibility, said semiconductor materials being useful for fabricating thin film semiconductor devices such as thin film transistors improved in device characteristics.Type: GrantFiled: March 1, 1995Date of Patent: May 19, 1998Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Hongyong Zhang, Naoto Kusumoto, Yasuhiko Takemura
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Patent number: 5739043Abstract: A method for producing a substrate for forming a polysilicon thin film by forming an amorphous silicon film of a thickness not more than 200 .ANG., irradiating excimer laser light onto the amorphous silicon film to crystallize silicon particles contained in the amorphous silicon film; and irradiating the amorphous silicon film with hydrogen radicals to etch the amorphous silicon film.Type: GrantFiled: February 12, 1996Date of Patent: April 14, 1998Assignee: Kanegafuchi Chemical Industry Co., Ltd.Inventor: Kenji Yamamoto
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Patent number: 5735949Abstract: A buried amorphous layer on a crystalline substrate with a monocrystalline surface layer, which is transformed into a mixed-crystal or chemical compound, avoids the formation of lattice defects at the interface even where the lattice parameters of the substrate and the monocrystalline layer are not matched.Type: GrantFiled: September 13, 1991Date of Patent: April 7, 1998Assignee: Forschungszentrum Julich GmbHInventors: Siegfried Mantl, Bernd Hollander, Rainer Butz
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Patent number: 5712191Abstract: In producing a thin film transistor, after an amorphous silicon film is formed on a substrate, a nickel silicide layer is formed by spin coating with a solution (nickel acetate solution) containing nickel as the metal element which accelerates (promotes) the crystallization of silicon and by heat treating. The nickel silicide layer is selectively patterned to form island-like nickel silicide layer. The amorphous silicon film is patterned. A laser light is irradiated while moving the laser, so that crystal growth occurs from the region in which the nickel silicide layer is formed and a region equivalent to a single crystal (a monodomain region) is obtained.Type: GrantFiled: September 8, 1995Date of Patent: January 27, 1998Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Setsuo Nakajima, Shunpei Yamazaki, Naoto Kusumoto, Satoshi Teramoto
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Patent number: 5693138Abstract: According to this invention, a magnetooptical element represented by (Cd.sub.1-X-Y Mn.sub.X Hg.sub.Y).sub.1 Te.sub.1 (0<X<1, 0<Y<1) comprises, so as to be used in a range around each of wavelength bands of 0.98 .mu.m, 1.017 .mu.m, 1.047 .mu.m, and 1.064 .mu.m, a single crystal having a composition contained in an area defined in a quasi ternary-element phase diagram of MnTe-HgTe-CdTe by four points a, b, c, and d of:Mn.sub.0.5 Hg.sub.0.5 Te,Mn.sub.0.6 Hg.sub.0.4 Te,Cd.sub.0.83 Mn.sub.0.13 Hg.sub.0.04 Te,andCd.sub.0.83 Mn.sub.0.05 Hg.sub.0.12 Te,the single crystal having a thickness not smaller than 300 .mu.m and containing substantially no twin crystal and no segregation in composition.Type: GrantFiled: August 17, 1995Date of Patent: December 2, 1997Assignee: Tokin CorporationInventor: Koichi Onodera
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Patent number: 5639698Abstract: Method of fabricating semiconductor devices such as thin-film transistors by annealing a substantially amorphous silicon film at a temperature either lower than normal crystallization temperature of amorphous silicon or lower than the glass transition point of the substrate so as to crystallize the silicon film. Islands, stripes, lines, or dots of nickel, iron, cobalt, or platinum, silicide, acetate, or nitrate of nickel, iron, cobalt, or platinum, film containing various salts, particles, or clusters containing at least one of nickel, iron, cobalt, and platinum are used as starting materials for crystallization. These materials are formed on or under the amorphous silicon film.Type: GrantFiled: February 15, 1994Date of Patent: June 17, 1997Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Yasuhiko Takemura, Hongyong Zhang, Toru Takayama, Hideki Uochi
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Patent number: 5627086Abstract: A thin-film semiconductor crystal is formed by depositing a thin film of amorphous silicon on a substrate, introducing ions selectively into a predetermined region of the thin film of amorphous silicon, and growing a single semiconductor crystal in the thin film of amorphous silicon by way of solid-phase crystal growth. A semiconductor device which employs the thin-film semiconductor crystal has a channel in the region where the ions are selectively introduced.Type: GrantFiled: May 11, 1995Date of Patent: May 6, 1997Assignee: Sony CorporationInventor: Takashi Noguchi
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Patent number: 5624851Abstract: A semiconductor circuit and a process for fabricating the same, said process comprising forming in contact with an amorphous silicon film, a substance containing a catalytic element; crystallizing selected portions of the amorphous silicon film by annealing said film at a temperature lower than the ordinary crystallization temperature of an amorphous silicon film; and then crystallizing the rest of the portions by irradiating thereto laser beam or an intense light having an intensity equivalent thereto. A process similar to the one above, wherein, the catalytic element is incorporated directly into the amorphous silicon film instead of bringing a substance containing the same into contact with the amorphous silicon film.Type: GrantFiled: March 8, 1994Date of Patent: April 29, 1997Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Toru Takayama, Hongyong Zhang, Yasuhiko Takemura
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Patent number: 5612251Abstract: In a manufacturing method and device for a polycrystalline silicon, the manufacturing method forms amorphous silicon on the substrate, and an adiabatic layer between substrate and amorphous silicon if needed. The amorphous silicon is preliminarily heated and melted, and is evenly supplied with heat when the amorphous silicon is re-crystallized, to thereby slow down the re-crystallization. Also, a manufacturing device has first and second light sources for supplying an optical energy to a-Si formed on substrate. A uniformed and large sized grain can be formed, and specifically, cost reduction is possible since the general glass substrate can be used.Type: GrantFiled: September 15, 1995Date of Patent: March 18, 1997Assignee: Samsung Electronics Co., Ltd.Inventor: Jae-won Lee
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Patent number: 5593495Abstract: In a method for manufacturing a thin film of metal-oxide dielectric, a precursor solution in a sol state is synthesized in a first step. This precursor solution is composed of component elements of materials of the composite metal-oxide dielectric to be manufactured. In a second step, this precursor solution is made a thin film by spin coating. In a third step, this thin film in the sol state is dried to convert it into a thin film of dry gel. Thereafter, in a fourth step, the thin film of dry gel is subjected to a heat treatment for thermally decomposing and removing organic substances in the dry gel thin film and simultaneously crystallizing this gel state thin film.Type: GrantFiled: May 5, 1995Date of Patent: January 14, 1997Assignee: Sharp Kabushiki KaishaInventors: Yoshiyuki Masuda, Ryusuke Kita, Hisako Arai, Noboru Ohtani, Masayoshi Koba
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Patent number: 5591668Abstract: A laser annealing method for a semiconductor thin film for irradiating the semiconductor thin film with a laser beam having a section whose outline includes a straight-line portion, so as to change the crystallinity of the semiconductor thin film is provided, wherein the semiconductor thin film is overlap-irradiated with the laser beam while the laser beam is shifted in a direction different from a direction along the straight-line portion. A thin film semiconductor device fabricated by use of the laser annealing method is also provided.Type: GrantFiled: March 13, 1995Date of Patent: January 7, 1997Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Shigeki Maegawa, Tetsuya Kawamura, Mamoru Furuta, Yutaka Miyata