Abstract: Exemplary substrate processing systems may include a chamber body defining a transfer region. The systems may include a first lid plate seated on the chamber body along a first surface of the first lid plate. The first lid plate may define a plurality of apertures through the first lid plate. The systems may include a plurality of lid stacks equal to a number of apertures of the plurality of apertures. The plurality of lid stacks may at least partially define a plurality of processing regions vertically offset from the transfer region. The systems may include a second lid plate coupled with the plurality of lid stacks. The plurality of lid stacks may be positioned between the first lid plate and the second lid plate. A component of each lid stack of the plurality of lid stacks may be coupled with the second lid plate.

Abstract: Methods for manufacturing semiconductor structures are provided. The method for manufacturing the semiconductor structure includes forming a fin structure protruding from a substrate and forming a source/drain structure over the fin structure. The method for manufacturing a semiconductor structure further includes forming a metallic layer over the source/drain structure and forming an oxide film on a sidewall of the source/drain structure. In addition, the oxide film and the metallic layer are both in direct contact with the source/drain structure.

Abstract: There is provision of an etching method including a step of preparing a substrate over which a boron film or a boron-containing film is formed, a step of supplying a process gas containing chlorine gas, fluorine-containing gas, and hydrogen-containing gas, and a step of etching the boron film or the boron-containing film via a mask using a plasma formed from the process gas.

Abstract: Disclosed herein are systems and methods for treating the surface of a microelectronic substrate, and in particular, relate to an apparatus and method for scanning the microelectronic substrate through a cryogenic fluid mixture used to treat an exposed surface of the microelectronic substrate. The fluid mixture may be expanded through a nozzle to form an aerosol spray or gas cluster jet (GCJ) spray and may impinge the microelectronic substrate and remove particles from the microelectronic substrate's surface. In one embodiment, a two-stage gas nozzle may be used to expand a fluid mixture with a liquid phase concentration of greater than 10% by weight.

Abstract: A method of removing particles of a substrate processing apparatus includes a pressure increasing process, a circulating process, and a particle removing process. In the pressure increasing process, a pressure in a processing space is increased by supplying a cleaned fluid from a first supply line to the processing space in a state where a second on-off valve and a third on-off valve are closed. In the circulating process, a processing fluid is supplied from a second supply line to the processing space and discharged from a discharge line by opening the second on-off valve and the third on-off valve after the pressure increasing process. In the particle removing process, a flow of the cleaned fluid is generated against the pressure of the processing space in the second supply line by opening and closing the second on-off valve during the pressure increasing process.

Abstract: According to the present disclosure, there is provided a water-repellent protective film-forming liquid chemical capable of achieving an improved water repellency imparting effect. The water-repellent protective film-forming liquid chemical according to the present disclosure contains the following compositions: (I) an aminosilane composition of the following general formula [1]; (II) a silicon compound of the following general formula [2]; and (III) an aprotic solvent, wherein the amount of the component (I) contained is 0.02 to 0.5 mass % based on the total amount of the components (I) to (III).

Abstract: Described herein are architectures, platforms and methods for acquiring optical emission spectra from an optical emission spectroscopy system by flowing a dry cleaning gas into a plasma processing chamber of the plasma processing system and igniting a plasma in the plasma processing chamber to initiate the waferless dry cleaning process.

Abstract: An etching method includes preparing a compound; and etching an etching target in an environment in which the compound is present. The etching of the etching target includes: etching the etching target in an environment in which hydrogen (H) and fluorine (F) are present when the etching target contains silicon nitride (SiN); and etching the etching target in an environment in which nitrogen (N), hydrogen (H) and fluorine (F) are present when the etching target contains silicon (Si). The compound contains an element that forms an anion of an acid stronger than hydrogen fluoride (HF) or contains an element that forms a cation of a base stronger than ammonia (NH3).

Abstract: A method for cleaning debris and contamination from an etching apparatus is provided. The etching apparatus includes a process chamber, a source of radio frequency power, an electrostatic chuck within the process chamber, a chuck electrode, and a source of DC power connected to the chuck electrode. The method of cleaning includes placing a substrate on a surface of the electrostatic chuck, applying a plasma to the substrate, thereby creating a positively charged surface on the surface of the substrate, applying a negative voltage or a radio frequency pulse to the electrode chuck, thereby making debris particles and/or contaminants from the surface of the electrostatic chuck negatively charged and causing them to attach to the positively charged surface of the substrate, and removing the substrate from the etching apparatus thereby removing the debris particles and/or contaminants from the etching apparatus.

Abstract: The present invention relates to a plating hanger device having a shock-absorbing structure and, more specifically, to a plating hanger device having a shock-absorbing structure, the device allowing a hanger to be transferred at a uniform speed and reducing noise and shock, which are generated during transferring, so as to enable a uniform plated layer to be formed on a substrate. According to the plating hanger device having the shock-absorbing structure, of the present invention, an elastic spring is pressed by the load of the plating hanger device and a jig, and sequentially, the elastic spring presses a connection shaft and the connection shaft presses a transfer housing so as to improve adhesion between the transfer housing and a driving gear, thereby enabling transferring at uniform speed, and reducing the noise and shock generated during transferring by means of the elastic spring.

Abstract: Methods, systems, and apparatus for generating hydrogen radicals for processing a workpiece, such as a semiconductor workpiece, are provided. In one example implementation, a method can include generating one or more species in a plasma chamber from an inert gas by inducing a plasma in the inert gas using a plasma source; mixing hydrogen gas with the one or more species to generate one or more hydrogen radicals; and exposing the workpiece in a processing chamber to the one or more hydrogen radicals.

Abstract: An etching method includes providing a plasma of a first treatment gas to an etching-object to form a deposition layer on the etching-object, the first treatment gas including a fluorocarbon gas and an inert gas, and the etching-object including a first region including silicon oxide and a second region including silicon nitride, providing a plasma of an inert gas to the etching-object having the deposition layer thereon to activate an etching reaction of the silicon oxide, wherein a negative direct current voltage is applied to an opposing part that is spaced apart from the etching-object so as to face an etching surface of the etching-object, the opposing part including silicon, and subsequently, providing a plasma of a second treatment gas to remove an etching reaction product, the second treatment gas including an inert gas and an oxygen-containing gas.

Abstract: A treatment liquid for a semiconductor device is a treatment liquid including water, an organic solvent, and two or more nitrogen-containing aromatic heterocyclic compounds.

Abstract: To provide a composition for rinsing or cleaning a surface to which ceria particles are attached and a surface treatment method for removing ceria particles from the surface using the same. The composition according to the present invention contains an anionic surfactant, an organic amine compound, and a protic organic acid molecule and has a pH of less than 6.

Abstract: A method for manufacturing a power diode including the following steps is provided. (a) A semi-finished product of the power diode is provided. The semi-finished product of the power diode includes a first electrode, a second electrode, a semiconductor chip, and an adhesive material. The semiconductor chip is located between the first electrode and the second electrode. The adhesive material is located on the first electrode and surrounds the semiconductor chip. (b) The semi-finished product of the power diode is placed into a processing chamber. (c) Pressure in the processing chamber is adjusted to a first predetermined pressure and the first predetermined pressure is maintained for a predetermined time. (d) Pressure in the processing chamber is adjusted to a second predetermined pressure. Step (c) to Step (d) are performed at least twice to form the power diode. (e) The power diode is removed from the processing chamber.

Abstract: A device and method of spreading plasma which allows for plasma etching over a larger range of process chamber pressures. A plasma source, such as a linear inductive plasma source, may be choked to alter back pressure within the plasma source. The plasma may then be spread around a deflecting disc which spreads the plasma under a dome which then allows for very even plasma etch rates across the surface of a substrate. The apparatus may include a linear inductive plasma source above a plasma spreading portion which spreads plasma across a horizontally configured wafer or other substrate. The substrate support may include heating elements adapted to enhance the etching.

Abstract: A mask cleaning apparatus and method of using the same includes a preheating zone preheating a mask, a first ultraviolet cleaning zone irradiating the mask with a first ultraviolet laser beam at a first irradiation angle, a first cooling zone cooling the mask irradiated with the first ultraviolet laser beam, a second ultraviolet cleaning zone irradiating the mask with a second ultraviolet laser beam at a second irradiation angle, a second cooling zone cooling the mask irradiated with the second ultraviolet laser beam, an infrared cleaning zone irradiating the mask with an infrared laser beam at a third irradiation angle, and a peeling zone spraying air onto the mask irradiated with the infrared laser beam.

Abstract: A semiconductor device is manufactured using a cleaning process. The cleaning process utilizes a semiconductor manufacturing tool that has a wet cleaning section and a plasma cleaning section. The semiconductor device is placed within a wet cleaning chamber within the wet cleaning section, where a wet cleaning process is performed. Once completed, and without breaking atmosphere, the semiconductor device is removed from the wet cleaning section and placed within a plasma cleaning chamber within the plasma cleaning section. A plasma clean is then performed.

Abstract: A method for forming a forming a silicon germanium tin (SiGeSn) layer is disclosed. The method may include, providing a substrate within a reaction chamber, exposing the substrate to a pre-deposition precursor pulse, which comprises tin tetrachloride (SnCl4), exposing the substrate to a deposition precursor gas mixture comprising a hydrogenated silicon source, germane (GeH4), and tin tetrachloride (SnCl4), and depositing the silicon germanium tin (SiGeSn) layer over a surface of the substrate. Semiconductor device structures including a silicon germanium tin (SiGeSn) layer formed by the methods of the disclosure are also provided.

Abstract: A treatment liquid is a treatment liquid for a semiconductor device containing an oxidizing agent, a corrosion inhibitor, water, and Fe, in which the content ratio of the Fe to the oxidizing agent is 10?10 to 10?4 in terms of mass ratio.

Abstract: A plasma etching apparatus includes an upper electrode and a lower electrode, between which plasma of a process gas is generated to perform plasma etching on a wafer W. The apparatus further comprises a cooling ring disposed around the wafer, a correction ring disposed around the cooling ring, and a variable DC power supply directly connected to the correction ring, the DC voltage being preset to provide the correction ring with a negative bias, relative to ground potential, for attracting ions in the plasma and to increase temperature of the correction ring to compensate for a decrease in temperature of a space near the edge of the target substrate due to the cooling ring.

Abstract: An apparatus includes an upper electrode and a lower electrode for supporting a wafer disposed opposite each other within a process chamber. A first RF power supply configured to apply a first RF power having a relatively higher frequency, and a second RF power supply configured to apply a second RF power having a relatively lower frequency is connected to the lower electrode. A variable DC power supply is connected to the upper electrode. A process gas is supplied into the process chamber to generate plasma of the process gas so as to perform plasma etching.

Abstract: Embodiments of the disclosure generally relate to a method for dry stripping a boron carbide layer deposited on a semiconductor substrate. In one embodiment, the method includes loading the substrate with the boron carbide layer into a pressure vessel, exposing the substrate to a processing gas comprising an oxidizer at a pressure between about 500 Torr and 60 bar, heating the pressure vessel to a temperature greater than a condensation point of the processing gas and removing one or more products of a reaction between the processing gas and the boron carbide layer from the pressure vessel.

Abstract: Embodiments of the invention generally relate to methods of dry stripping boron-carbon films. In one embodiment, alternating plasmas of hydrogen and oxygen are used to remove a boron-carbon film. In another embodiment, co-flowed oxygen and hydrogen plasma is used to remove a boron-carbon containing film. A nitrous oxide plasma may be used in addition to or as an alternative to either of the above oxygen plasmas. In another embodiment, a plasma generated from water vapor is used to remove a boron-carbon film. The boron-carbon removal processes may also include an optional polymer removal process prior to removal of the boron-carbon films. The polymer removal process includes exposing the boron-carbon film to NF3 to remove from the surface of the boron-carbon film any carbon-based polymers generated during a substrate etching process.

Abstract: The disclosure discloses a method for roughening a surface of a metal layer, a thin film transistor, and a method for fabricating the same. The method for roughening the surface of a metal layer includes: forming a first photo-resist layer on the surface of the metal layer, and processing the first photo-resist layer at high temperature; and stripping the first photo-resist layer to roughen the surface of the metal layer.

Abstract: The present disclosure relates, in exemplary embodiments, to processes for preparing omniphobic coatings on a substrate. The disclosure further relates to substrates comprising an omniphobic coating comprising a fluoride ion encapsulated F-POSS.

Abstract: A method is provided of forming a superconductor interconnect structure. The method comprises forming a dielectric layer overlying a substrate, forming an interconnect opening in the dielectric layer, and moving the substrate to a deposition chamber. The method further comprises performing a cleaning process on the top surface of the dielectric layer and in the interconnect opening while in the deposition chamber, and depositing a superconducting metal in the interconnect opening while in the deposition chamber to form a superconducting element in the superconductor interconnect structure.

Abstract: Methods of etching include cycles of low temperature etching of a material layer disposed on a substrate, with at least one of the cycles being followed by activation of unreacted etchant deposits during an inert gas plasma treatment. In some embodiments, a method includes: positioning a substrate in a processing chamber; generating, in a first etching cycle, a plasma from a gas mixture within the processing chamber to form a processing gas including an etchant; exposing, to the etchant, a portion of a material layer disposed on a substrate maintained at a first temperature; generating an inert gas plasma within the processing chamber; generating, in a second etching cycle, a plasma from a gas mixture within the processing chamber to form a processing gas including an etchant; and heating the substrate to a second temperature to sublimate a byproduct of reaction between the etchant and the material layer.

Abstract: Embodiments of the invention generally relate to methods of removing and/or cleaning a substrate surface having refractory metal portions disposed thereon using water vapor plasma treatment. In one embodiment, a method for cleaning a surface of a substrate includes positioning a substrate in a processing chamber, the substrate having a refractory metal disposed thereon, forming a process gas comprising water vapor, maintaining a process pressure in the processing chamber above about 0.5 Torr, forming a plasma in the process gas to form an activated water vapor and exposing the refractory metal to the activated water vapor.

Abstract: Embodiments of the present disclosure provide methods for conditioning a plasma processing chamber to maintain a reliable and predicable processing conditions while performing a oxide removal process on a substrate. In one embodiment, a method for conditioning a plasma processing chamber includes supplying a first gas mixture including an inert gas into a processing chamber a first period of time in absent of a substrate, supplying a second gas mixture including an inert gas, a hydrogen containing gas and a halogen containing gas for a second period of time in absent of the substrate, and supplying a third gas mixture including an inert gas and a hydrogen containing gas for a third period of time in absent of the substrate in the processing chamber.

Abstract: Embodiments of the disclosure include methods for in-situ chamber cleaning a plasma processing chamber utilized for photomask plasma fabrication process. In one embodiment, a method for in-situ chamber cleaning after a plasma process includes supplying a cleaning gas mixture including at least an oxygen containing gas and a hydrogen containing gas into the plasma processing chamber, controlling the processing pressure at less than 2 millitorr, applying a RF source power to the processing chamber to form a plasma from the cleaning gas mixture, and cleaning the processing chamber in the presence of the plasma.

Abstract: The present invention relates to a stripper composition for removing photoresists which comprises: a chained amine compound having a weight average molecular weight of more than 95 g/mol; a chained amine compound having a weight average molecular weight of not more than 90 g/mol; a cyclic amine compound; an amide-based compound in which a linear or branched alkyl group having 1-5 carbon atoms is mono- or di-substituted with nitrogen; and a polar organic solvent, wherein the weight ratio of the chained amine compound having a weight average molecular weight of more than 95 g/mol to the chained amine compound having the weight average molecular weight of not more than 90 g/mol is 1:1 to 1:10, and a method for stripping a photoresist using the same.

Abstract: Techniques herein provide a chamber and substrate cleaning solution for etching and removing byproducts between separate etching steps. Such techniques include using a cleaning step based on fluorine chemistry, which is executed in between separate etch steps or divided etch steps. Such a technique can be executed in situ for improved efficiency. Other benefits include increasing etching depth/aspect ratios, and preventing post-etching defects including physical contact with neighboring gates, etc. Techniques herein are especially beneficial when applied to relatively small feature openings.

Abstract: Techniques are disclosed for methods of post-treating an etch stop or a passivation layer in a thin film transistor to increase the stability behavior of the thin film transistor.

Abstract: The invention provides a fabricating method of a FinFET, comprising: providing a substrate having fin structures; depositing an dielectric layer on the substrate filling between the fin structures; forming recesses to reveal a portion of the fin structure by removing a portion of the dielectric layer; performing a cleaning process on using a cleaning solution selected from one of a first solution, consisting of dHF and H2O2, and a second solution, consisting of dHF and DIO3; forming a gate structure across on the fin structures; and forming a source/drain structure on the substrate at two lateral sides of the gate structure. The present invention also provides a fabricating method of a FinFET having an improved cleaning step using a cleaning solution having one of a third solution, consisting of dHF and DIO3, and a fourth solution, consisting of NH4OH and DIO3 before formation of the source/drain structure.

Abstract: An apparatus may include an electrostatic filter having a plurality of electrodes; a voltage supply assembly coupled to the plurality of electrodes; a cleaning ion source disposed between the electrostatic filter and a substrate position, the cleaning ion source generating a plasma during a cleaning mode, wherein a dose of ions exit the cleaning ion source; and a controller having a first component to generate a control signal for controlling the voltage supply assembly, wherein a negative voltage is applied to at least one of the plurality of electrodes when the plasma is generated.

Abstract: Back end of line via formation for semiconductor devices and methods of fabricating the semiconductor devices. One method includes, for instance: obtaining a wafer with a substrate and at least one contact in the substrate; depositing at least one lithography stack over the substrate; performing lithography to pattern at least one via opening; depositing a block co-polymer coating over the wafer into the at least one via opening; performing an ashing to remove excess block co-polymer material and form block co-polymer caps; and performing a thermal bake to separate the block co-polymer caps into a first material and a second material. An intermediate semiconductor device is also disclosed.

Abstract: A method of cleaning an interior of a process chamber by supplying a cleaning gas into the process chamber after a process of forming a thin film on a substrate in the process chamber is performed, including alternately repeating changing a pressure in the process chamber from a first pressure range to a second pressure range, and changing the pressure in the process chamber from the second pressure range to the first pressure range. In this method, when the pressure in the process chamber is changed to the first pressure range, the pressure in the process chamber is changed to the first pressure range without being maintained at the second pressure range, and when the pressure in the process chamber is changed to the second pressure range, the pressure in the process chamber is changed to the second pressure range without being maintained at the first pressure range.

Abstract: There is provided a bottom gate channel etched thin film transistor that can suppress initial Vth depletion and a Vth shift. A thin film transistor is formed, including a gate electrode interconnection disposed on a substrate, a gate insulating film, an oxide semiconductor layer to be a channel layer, a stacked film of a source electrode interconnection and a first hard mask layer, a stacked film of a drain electrode interconnection and a second hard mask layer, and a protective insulating film.

Abstract: A method for operating a substrate processing chamber includes after performing a process using a fluorine-based gas in the substrate processing chamber: a) during a first predetermined period, supplying a gas mixture to the substrate processing chamber including one or more gases selected from a group consisting of molecular oxygen, molecular nitrogen, nitric oxide and nitrous oxide and supplying RF power to strike plasma in the substrate processing chamber; b) during a second predetermined period after the first predetermined period, supplying molecular hydrogen gas and RF power to the substrate processing chamber; c) repeating a) and b) one or more times; d) purging the substrate processing chamber with molecular nitrogen gas; e) increasing chamber pressure; f) evacuating the substrate processing chamber; and g) repeating d), e) and f) one or more times.

Abstract: A method for selectively etching silicon oxide is provided. A surface reaction phase is provided comprising flowing a surface reaction gas comprising hydrogen, nitrogen and fluorine containing components to form silicon oxide into a compound comprising silicon, hydrogen, nitrogen, and fluorine, forming the surface reaction gas into a plasma, and stopping the flow of the surface reaction gas. The surface is wet treated to remove the compound.

Abstract: A method for manufacturing a semiconductor device including a MOS transistor comprising forming a gate electrode on a first insulating film formed on a substrate, performing ion implantation into the substrate and forming a diffusion region, and forming a second insulating film on the substrate, in that order. The performing ion implantation comprises forming a first resist pattern, performing the ion implantation using the first resist pattern as a mask and removing the first resist pattern, including removing, by asking, a part of the first resist pattern hardened by the ion implantation and then removing the remaining part. In forming the gate electrode, a gate electrode material layer is patterned and a protective film is formed.

Abstract: An etching method using plasma includes generating plasma by supplying process gases to at least one remote plasma source (RPS) and applying power to the at least one RPS, and etching an etching object by supplying water (H2O) and the plasma to a process chamber.

Abstract: In a method of manufacturing a semiconductor device using high-NA ArF liquid immersion exposure of a photoresist, a layer arrangement is provided capable of increasing reflection of a reference beam in an oblique incidence autofocus optical system, thereby enhancing autofocus and making it possible to reduce variation in the diameter of a contact hole.

Abstract: Methods for processing a substrate are provided herein. In some embodiments, method of processing a substrate includes: heating a substrate disposed within a processing volume of a substrate processing chamber to a temperature of up to about 400 degrees Celsius, wherein the substrate comprises a first surface, an opposing second surface, and an opening formed in the first surface and extending towards the opposing second surface, and wherein the second surface comprises a conductive material disposed in the second surface and aligned with the opening; and exposing the substrate to a process gas comprising about 80 to about 100 wt % of an alcohol to reduce a contaminated surface of the conductive material.

Abstract: An oxidizing aqueous cleaning composition and process for cleaning post-plasma etch residue and/or hardmask material from a microelectronic device having said residue thereon. The oxidizing aqueous cleaning composition includes at least one oxidizing agent, at least one oxidizing agent stabilizer comprising an amine species selected from the group consisting of primary amines, secondary amines, tertiary amines and amine-N-oxides, optionally at least one co-solvent, optionally at least one metal-chelating agent, optionally at least one buffering species, and water. The composition achieves highly efficacious cleaning of the residue material from the microelectronic device while simultaneously not damaging the interlevel dielectric and metal interconnect material also present thereon.

Abstract: Methods of selectively etching tungsten relative to silicon-containing films (e.g. silicon oxide, silicon carbon nitride and (poly)silicon) as well as tungsten oxide are described. The methods include a remote plasma etch formed from a fluorine-containing precursor and/or hydrogen (H2). Plasma effluents from the remote plasma are flowed into a substrate processing region where the plasma effluents react with the tungsten. The plasma effluents react with exposed surfaces and selectively remove tungsten while very slowly removing other exposed materials. Sequential and simultaneous methods are included to remove thin tungsten oxide which may, for example, result from exposure to the atmosphere.

Abstract: Methods are described for forming “air gaps” between adjacent copper lines on patterned substrates. The common name “air gap” will be used interchangeably the more technically accurate “gas pocket” and both reflect a variety of pressures and elemental ratios. The gas pockets may be one or more pores within dielectric material located between copper lines. Adjacent copper lines may be bordered by a lining layer and air gaps may extend from one lining layer on one copper line to the lining layer of an adjacent copper line. The gas pockets can have a dielectric constant approaching one, favorably reducing interconnect capacitance compared with typical low-K dielectric materials.

Abstract: In forming a top electrode for a magnetoresistive device, photoresist used in patterning the electrode is stripped using a non-reactive stripping process. Such a non-reactive stripping process uses water vapor or some other non-oxidizing gas that also passivates exposed portions the magnetoresistive device. In such magnetoresistive devices, a non-reactive spacer layer is included that helps prevent diffusion between layers in the magnetoresistive device, where the non-reactive nature of the spacer layer prevents sidewall roughness that can interfere with accurate formation of the lower portions of the magnetoresistive device.

Abstract: A method of determining focal planes during a photolithographic exposure of a wafer surface is provided. The method may include receiving data corresponding to a surface topography of the wafer surface and determining, based on the received data corresponding to the surface topography, a plurality of regions having substantially different topographies. Reticle design data is received for exposure on the wafer surface, whereby, from the received reticle design data, reticle design data subsets that are each allocated to a corresponding one of the determined plurality of regions are generated. A best fit focal plane is then generated for each of the determined plurality of regions.