Semiconductor Cleaning Patents (Class 134/1.2)
  • Patent number: 10546727
    Abstract: A plasma etching apparatus includes an upper electrode and a lower electrode, between which plasma of a process gas is generated to perform plasma etching on a wafer W. The apparatus further comprises a cooling ring disposed around the wafer, a correction ring disposed around the cooling ring, and a variable DC power supply directly connected to the correction ring, the DC voltage being preset to provide the correction ring with a negative bias, relative to ground potential, for attracting ions in the plasma and to increase temperature of the correction ring to compensate for a decrease in temperature of a space near the edge of the target substrate due to the cooling ring.
    Type: Grant
    Filed: September 7, 2016
    Date of Patent: January 28, 2020
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Akira Koshiishi, Masaru Sugimoto, Kunihiko Hinata, Noriyuki Kobayashi, Chishio Koshimizu, Ryuji Ohtani, Kazuo Kibi, Masashi Saito, Naoki Matsumoto, Yoshinobu Ohya, Manabu Iwata, Daisuke Yano, Yohei Yamazawa, Hidetoshi Hanaoka, Toshihiro Hayami, Hiroki Yamazaki, Manabu Sato
  • Patent number: 10529539
    Abstract: An apparatus includes an upper electrode and a lower electrode for supporting a wafer disposed opposite each other within a process chamber. A first RF power supply configured to apply a first RF power having a relatively higher frequency, and a second RF power supply configured to apply a second RF power having a relatively lower frequency is connected to the lower electrode. A variable DC power supply is connected to the upper electrode. A process gas is supplied into the process chamber to generate plasma of the process gas so as to perform plasma etching.
    Type: Grant
    Filed: October 11, 2016
    Date of Patent: January 7, 2020
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Akira Koshiishi, Masaru Sugimoto, Kunihiko Hinata, Noriyuki Kobayashi, Chishio Koshimizu, Ryuji Ohtani, Kazuo Kibi, Masashi Saito, Naoki Matsumoto, Manabu Iwata, Daisuke Yano, Yohei Yamazawa, Hidetoshi Hanaoka, Toshihiro Hayami, Hiroki Yamazaki, Manabu Sato
  • Patent number: 10529585
    Abstract: Embodiments of the disclosure generally relate to a method for dry stripping a boron carbide layer deposited on a semiconductor substrate. In one embodiment, the method includes loading the substrate with the boron carbide layer into a pressure vessel, exposing the substrate to a processing gas comprising an oxidizer at a pressure between about 500 Torr and 60 bar, heating the pressure vessel to a temperature greater than a condensation point of the processing gas and removing one or more products of a reaction between the processing gas and the boron carbide layer from the pressure vessel.
    Type: Grant
    Filed: June 1, 2018
    Date of Patent: January 7, 2020
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Pramit Manna, Shishi Jiang, Abhijit Basu Mallick, Kurtis Leschkies
  • Patent number: 10510518
    Abstract: Embodiments of the invention generally relate to methods of dry stripping boron-carbon films. In one embodiment, alternating plasmas of hydrogen and oxygen are used to remove a boron-carbon film. In another embodiment, co-flowed oxygen and hydrogen plasma is used to remove a boron-carbon containing film. A nitrous oxide plasma may be used in addition to or as an alternative to either of the above oxygen plasmas. In another embodiment, a plasma generated from water vapor is used to remove a boron-carbon film. The boron-carbon removal processes may also include an optional polymer removal process prior to removal of the boron-carbon films. The polymer removal process includes exposing the boron-carbon film to NF3 to remove from the surface of the boron-carbon film any carbon-based polymers generated during a substrate etching process.
    Type: Grant
    Filed: November 6, 2015
    Date of Patent: December 17, 2019
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Kwangduk Douglas Lee, Sudha Rathi, Ramprakash Sankarakrishnan, Martin Jay Seamons, Irfan Jamil, Bok Hoen Kim
  • Patent number: 10483129
    Abstract: The disclosure discloses a method for roughening a surface of a metal layer, a thin film transistor, and a method for fabricating the same. The method for roughening the surface of a metal layer includes: forming a first photo-resist layer on the surface of the metal layer, and processing the first photo-resist layer at high temperature; and stripping the first photo-resist layer to roughen the surface of the metal layer.
    Type: Grant
    Filed: September 27, 2017
    Date of Patent: November 19, 2019
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Jing Feng, Seung Jin Choi, Fangzhen Zhang, Wusheng Li, Zhijun Lv, Ce Ning, Jiushi Wang
  • Patent number: 10450469
    Abstract: The present disclosure relates, in exemplary embodiments, to processes for preparing omniphobic coatings on a substrate. The disclosure further relates to substrates comprising an omniphobic coating comprising a fluoride ion encapsulated F-POSS.
    Type: Grant
    Filed: June 9, 2016
    Date of Patent: October 22, 2019
    Assignee: NBD NANOTECHNOLOGIES, INC.
    Inventor: Bong June Zhang
  • Patent number: 10276504
    Abstract: A method is provided of forming a superconductor interconnect structure. The method comprises forming a dielectric layer overlying a substrate, forming an interconnect opening in the dielectric layer, and moving the substrate to a deposition chamber. The method further comprises performing a cleaning process on the top surface of the dielectric layer and in the interconnect opening while in the deposition chamber, and depositing a superconducting metal in the interconnect opening while in the deposition chamber to form a superconducting element in the superconductor interconnect structure.
    Type: Grant
    Filed: May 17, 2017
    Date of Patent: April 30, 2019
    Assignee: NORTHROP GRUMMAN SYSTEMS CORPORATION
    Inventors: Vivien Luu, Christopher F. Kirby, Brian Wagner, Michael Rennie
  • Patent number: 10256076
    Abstract: Methods of etching include cycles of low temperature etching of a material layer disposed on a substrate, with at least one of the cycles being followed by activation of unreacted etchant deposits during an inert gas plasma treatment. In some embodiments, a method includes: positioning a substrate in a processing chamber; generating, in a first etching cycle, a plasma from a gas mixture within the processing chamber to form a processing gas including an etchant; exposing, to the etchant, a portion of a material layer disposed on a substrate maintained at a first temperature; generating an inert gas plasma within the processing chamber; generating, in a second etching cycle, a plasma from a gas mixture within the processing chamber to form a processing gas including an etchant; and heating the substrate to a second temperature to sublimate a byproduct of reaction between the etchant and the material layer.
    Type: Grant
    Filed: December 30, 2015
    Date of Patent: April 9, 2019
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Shi Wei Toh, Avgerinos V. Gelatos, Vikash Banthia
  • Patent number: 10217627
    Abstract: Embodiments of the invention generally relate to methods of removing and/or cleaning a substrate surface having refractory metal portions disposed thereon using water vapor plasma treatment. In one embodiment, a method for cleaning a surface of a substrate includes positioning a substrate in a processing chamber, the substrate having a refractory metal disposed thereon, forming a process gas comprising water vapor, maintaining a process pressure in the processing chamber above about 0.5 Torr, forming a plasma in the process gas to form an activated water vapor and exposing the refractory metal to the activated water vapor.
    Type: Grant
    Filed: October 3, 2013
    Date of Patent: February 26, 2019
    Assignee: Applied Materials, Inc.
    Inventors: Danny Chien Lu, Yi Zhou, Changhun Lee
  • Patent number: 10177017
    Abstract: Embodiments of the present disclosure provide methods for conditioning a plasma processing chamber to maintain a reliable and predicable processing conditions while performing a oxide removal process on a substrate. In one embodiment, a method for conditioning a plasma processing chamber includes supplying a first gas mixture including an inert gas into a processing chamber a first period of time in absent of a substrate, supplying a second gas mixture including an inert gas, a hydrogen containing gas and a halogen containing gas for a second period of time in absent of the substrate, and supplying a third gas mixture including an inert gas and a hydrogen containing gas for a third period of time in absent of the substrate in the processing chamber.
    Type: Grant
    Filed: July 5, 2017
    Date of Patent: January 8, 2019
    Assignee: Applied Materials, Inc.
    Inventor: Chun Yan
  • Patent number: 10115572
    Abstract: Embodiments of the disclosure include methods for in-situ chamber cleaning a plasma processing chamber utilized for photomask plasma fabrication process. In one embodiment, a method for in-situ chamber cleaning after a plasma process includes supplying a cleaning gas mixture including at least an oxygen containing gas and a hydrogen containing gas into the plasma processing chamber, controlling the processing pressure at less than 2 millitorr, applying a RF source power to the processing chamber to form a plasma from the cleaning gas mixture, and cleaning the processing chamber in the presence of the plasma.
    Type: Grant
    Filed: January 26, 2016
    Date of Patent: October 30, 2018
    Assignee: Applied Materials, Inc.
    Inventors: Banqiu Wu, Xiaoyi Chen, David Knick
  • Patent number: 9983481
    Abstract: The present invention relates to a stripper composition for removing photoresists which comprises: a chained amine compound having a weight average molecular weight of more than 95 g/mol; a chained amine compound having a weight average molecular weight of not more than 90 g/mol; a cyclic amine compound; an amide-based compound in which a linear or branched alkyl group having 1-5 carbon atoms is mono- or di-substituted with nitrogen; and a polar organic solvent, wherein the weight ratio of the chained amine compound having a weight average molecular weight of more than 95 g/mol to the chained amine compound having the weight average molecular weight of not more than 90 g/mol is 1:1 to 1:10, and a method for stripping a photoresist using the same.
    Type: Grant
    Filed: August 18, 2015
    Date of Patent: May 29, 2018
    Assignee: LG CHEM, LTD.
    Inventors: Tae Moon Park, Dae Chul Jung, Dong Hoon Lee, Woo Ram Lee, Hyun Jun Lee, Ju Young Kim
  • Patent number: 9966312
    Abstract: Techniques herein provide a chamber and substrate cleaning solution for etching and removing byproducts between separate etching steps. Such techniques include using a cleaning step based on fluorine chemistry, which is executed in between separate etch steps or divided etch steps. Such a technique can be executed in situ for improved efficiency. Other benefits include increasing etching depth/aspect ratios, and preventing post-etching defects including physical contact with neighboring gates, etc. Techniques herein are especially beneficial when applied to relatively small feature openings.
    Type: Grant
    Filed: August 22, 2016
    Date of Patent: May 8, 2018
    Assignee: Tokyo Electron Limited
    Inventors: Sergey Voronin, Alok Ranjan
  • Patent number: 9887277
    Abstract: Techniques are disclosed for methods of post-treating an etch stop or a passivation layer in a thin film transistor to increase the stability behavior of the thin film transistor.
    Type: Grant
    Filed: January 19, 2016
    Date of Patent: February 6, 2018
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Soo Young Choi, Beom Soo Park, Yi Cui, Tae Kyung Won, Dong-kil Yim
  • Patent number: 9793105
    Abstract: The invention provides a fabricating method of a FinFET, comprising: providing a substrate having fin structures; depositing an dielectric layer on the substrate filling between the fin structures; forming recesses to reveal a portion of the fin structure by removing a portion of the dielectric layer; performing a cleaning process on using a cleaning solution selected from one of a first solution, consisting of dHF and H2O2, and a second solution, consisting of dHF and DIO3; forming a gate structure across on the fin structures; and forming a source/drain structure on the substrate at two lateral sides of the gate structure. The present invention also provides a fabricating method of a FinFET having an improved cleaning step using a cleaning solution having one of a third solution, consisting of dHF and DIO3, and a fourth solution, consisting of NH4OH and DIO3 before formation of the source/drain structure.
    Type: Grant
    Filed: August 2, 2016
    Date of Patent: October 17, 2017
    Assignee: UNITED MICROELECTRONICS CORPORATION
    Inventors: Chun-Wei Yu, Hsu Ting, Chueh-Yang Liu, Yu-Ren Wang, Kuang-Hsiu Chen, Yi-Liang Ye
  • Patent number: 9761410
    Abstract: An apparatus may include an electrostatic filter having a plurality of electrodes; a voltage supply assembly coupled to the plurality of electrodes; a cleaning ion source disposed between the electrostatic filter and a substrate position, the cleaning ion source generating a plasma during a cleaning mode, wherein a dose of ions exit the cleaning ion source; and a controller having a first component to generate a control signal for controlling the voltage supply assembly, wherein a negative voltage is applied to at least one of the plurality of electrodes when the plasma is generated.
    Type: Grant
    Filed: February 1, 2016
    Date of Patent: September 12, 2017
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Alexandre Likhanskii, Jay T. Scheuer, William Davis Lee
  • Patent number: 9691654
    Abstract: Back end of line via formation for semiconductor devices and methods of fabricating the semiconductor devices. One method includes, for instance: obtaining a wafer with a substrate and at least one contact in the substrate; depositing at least one lithography stack over the substrate; performing lithography to pattern at least one via opening; depositing a block co-polymer coating over the wafer into the at least one via opening; performing an ashing to remove excess block co-polymer material and form block co-polymer caps; and performing a thermal bake to separate the block co-polymer caps into a first material and a second material. An intermediate semiconductor device is also disclosed.
    Type: Grant
    Filed: December 22, 2015
    Date of Patent: June 27, 2017
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Sunil Kumar Singh, Sohan Singh Mehta, Ravi Prakash Srivastava
  • Patent number: 9653326
    Abstract: A method of cleaning an interior of a process chamber by supplying a cleaning gas into the process chamber after a process of forming a thin film on a substrate in the process chamber is performed, including alternately repeating changing a pressure in the process chamber from a first pressure range to a second pressure range, and changing the pressure in the process chamber from the second pressure range to the first pressure range. In this method, when the pressure in the process chamber is changed to the first pressure range, the pressure in the process chamber is changed to the first pressure range without being maintained at the second pressure range, and when the pressure in the process chamber is changed to the second pressure range, the pressure in the process chamber is changed to the second pressure range without being maintained at the first pressure range.
    Type: Grant
    Filed: September 18, 2013
    Date of Patent: May 16, 2017
    Assignee: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Takaaki Noda, Masatoshi Takada
  • Patent number: 9620526
    Abstract: There is provided a bottom gate channel etched thin film transistor that can suppress initial Vth depletion and a Vth shift. A thin film transistor is formed, including a gate electrode interconnection disposed on a substrate, a gate insulating film, an oxide semiconductor layer to be a channel layer, a stacked film of a source electrode interconnection and a first hard mask layer, a stacked film of a drain electrode interconnection and a second hard mask layer, and a protective insulating film.
    Type: Grant
    Filed: February 4, 2016
    Date of Patent: April 11, 2017
    Assignee: Japan Display Inc.
    Inventors: Isao Suzumura, Norihiro Uemura, Hidekazu Miyake, Yohei Yamaguchi
  • Patent number: 9601319
    Abstract: A method for operating a substrate processing chamber includes after performing a process using a fluorine-based gas in the substrate processing chamber: a) during a first predetermined period, supplying a gas mixture to the substrate processing chamber including one or more gases selected from a group consisting of molecular oxygen, molecular nitrogen, nitric oxide and nitrous oxide and supplying RF power to strike plasma in the substrate processing chamber; b) during a second predetermined period after the first predetermined period, supplying molecular hydrogen gas and RF power to the substrate processing chamber; c) repeating a) and b) one or more times; d) purging the substrate processing chamber with molecular nitrogen gas; e) increasing chamber pressure; f) evacuating the substrate processing chamber; and g) repeating d), e) and f) one or more times.
    Type: Grant
    Filed: January 7, 2016
    Date of Patent: March 21, 2017
    Assignee: LAM RESEARCH CORPORATION
    Inventors: Andrew Stratton Bravo, Joydeep Guha, Amit Pharkya
  • Patent number: 9595452
    Abstract: A method for selectively etching silicon oxide is provided. A surface reaction phase is provided comprising flowing a surface reaction gas comprising hydrogen, nitrogen and fluorine containing components to form silicon oxide into a compound comprising silicon, hydrogen, nitrogen, and fluorine, forming the surface reaction gas into a plasma, and stopping the flow of the surface reaction gas. The surface is wet treated to remove the compound.
    Type: Grant
    Filed: May 27, 2015
    Date of Patent: March 14, 2017
    Assignee: Lam Research Corporation
    Inventors: Chih-Hsun Hsu, Meihua Shen, Thorsten Lill
  • Patent number: 9570362
    Abstract: A method for manufacturing a semiconductor device including a MOS transistor comprising forming a gate electrode on a first insulating film formed on a substrate, performing ion implantation into the substrate and forming a diffusion region, and forming a second insulating film on the substrate, in that order. The performing ion implantation comprises forming a first resist pattern, performing the ion implantation using the first resist pattern as a mask and removing the first resist pattern, including removing, by asking, a part of the first resist pattern hardened by the ion implantation and then removing the remaining part. In forming the gate electrode, a gate electrode material layer is patterned and a protective film is formed.
    Type: Grant
    Filed: April 30, 2015
    Date of Patent: February 14, 2017
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Hideaki Ishino
  • Patent number: 9520301
    Abstract: An etching method using plasma includes generating plasma by supplying process gases to at least one remote plasma source (RPS) and applying power to the at least one RPS, and etching an etching object by supplying water (H2O) and the plasma to a process chamber.
    Type: Grant
    Filed: August 6, 2015
    Date of Patent: December 13, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Go-jun Kim, Vladimir Volynets, Sang-jin An, Hee-jeon Yang, Sang-heon Lee, Sung-keun Cho, Xinglong Chen, In-ho Choi
  • Patent number: 9502282
    Abstract: In a method of manufacturing a semiconductor device using high-NA ArF liquid immersion exposure of a photoresist, a layer arrangement is provided capable of increasing reflection of a reference beam in an oblique incidence autofocus optical system, thereby enhancing autofocus and making it possible to reduce variation in the diameter of a contact hole.
    Type: Grant
    Filed: December 30, 2014
    Date of Patent: November 22, 2016
    Assignee: Renesas Electronics Corporation
    Inventors: Takuya Hagiwara, Tatsunori Murata, Masahiro Tadokoro
  • Patent number: 9460959
    Abstract: Methods for processing a substrate are provided herein. In some embodiments, method of processing a substrate includes: heating a substrate disposed within a processing volume of a substrate processing chamber to a temperature of up to about 400 degrees Celsius, wherein the substrate comprises a first surface, an opposing second surface, and an opening formed in the first surface and extending towards the opposing second surface, and wherein the second surface comprises a conductive material disposed in the second surface and aligned with the opening; and exposing the substrate to a process gas comprising about 80 to about 100 wt % of an alcohol to reduce a contaminated surface of the conductive material.
    Type: Grant
    Filed: December 3, 2015
    Date of Patent: October 4, 2016
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Xiangjin Xie, Feng Q. Liu, Daping Yao, Alexander Jansen, Joung Joo Lee, Adolph Miller Allen, Xianmin Tang, Mei Chang
  • Patent number: 9443713
    Abstract: An oxidizing aqueous cleaning composition and process for cleaning post-plasma etch residue and/or hardmask material from a microelectronic device having said residue thereon. The oxidizing aqueous cleaning composition includes at least one oxidizing agent, at least one oxidizing agent stabilizer comprising an amine species selected from the group consisting of primary amines, secondary amines, tertiary amines and amine-N-oxides, optionally at least one co-solvent, optionally at least one metal-chelating agent, optionally at least one buffering species, and water. The composition achieves highly efficacious cleaning of the residue material from the microelectronic device while simultaneously not damaging the interlevel dielectric and metal interconnect material also present thereon.
    Type: Grant
    Filed: July 1, 2014
    Date of Patent: September 13, 2016
    Assignee: ADVANCED TECHNOLOGY MATERIALS, INC.
    Inventors: David W. Minsek, Michael B. Korzenski, Martha M. Rajaratnam
  • Patent number: 9412608
    Abstract: Methods of selectively etching tungsten relative to silicon-containing films (e.g. silicon oxide, silicon carbon nitride and (poly)silicon) as well as tungsten oxide are described. The methods include a remote plasma etch formed from a fluorine-containing precursor and/or hydrogen (H2). Plasma effluents from the remote plasma are flowed into a substrate processing region where the plasma effluents react with the tungsten. The plasma effluents react with exposed surfaces and selectively remove tungsten while very slowly removing other exposed materials. Sequential and simultaneous methods are included to remove thin tungsten oxide which may, for example, result from exposure to the atmosphere.
    Type: Grant
    Filed: February 9, 2015
    Date of Patent: August 9, 2016
    Assignee: Applied Materials, Inc.
    Inventors: Xikun Wang, Ching-Mei Hsu, Nitin K. Ingle, Zihui Li, Anchuan Wang
  • Patent number: 9396989
    Abstract: Methods are described for forming “air gaps” between adjacent copper lines on patterned substrates. The common name “air gap” will be used interchangeably the more technically accurate “gas pocket” and both reflect a variety of pressures and elemental ratios. The gas pockets may be one or more pores within dielectric material located between copper lines. Adjacent copper lines may be bordered by a lining layer and air gaps may extend from one lining layer on one copper line to the lining layer of an adjacent copper line. The gas pockets can have a dielectric constant approaching one, favorably reducing interconnect capacitance compared with typical low-K dielectric materials.
    Type: Grant
    Filed: January 27, 2014
    Date of Patent: July 19, 2016
    Assignee: Applied Materials, Inc.
    Inventors: Vinod R. Purayath, Nitin K. Ingle
  • Patent number: 9343661
    Abstract: In forming a top electrode for a magnetoresistive device, photoresist used in patterning the electrode is stripped using a non-reactive stripping process. Such a non-reactive stripping process uses water vapor or some other non-oxidizing gas that also passivates exposed portions the magnetoresistive device. In such magnetoresistive devices, a non-reactive spacer layer is included that helps prevent diffusion between layers in the magnetoresistive device, where the non-reactive nature of the spacer layer prevents sidewall roughness that can interfere with accurate formation of the lower portions of the magnetoresistive device.
    Type: Grant
    Filed: June 4, 2014
    Date of Patent: May 17, 2016
    Assignee: Everspin Technologies, Inc.
    Inventors: Sarin A. Deshpande, Kerry Joseph Nagel, Sanjeev Aggarwal, Chaitanya Mudivarthi
  • Patent number: 9058457
    Abstract: A method of determining focal planes during a photolithographic exposure of a wafer surface is provided. The method may include receiving data corresponding to a surface topography of the wafer surface and determining, based on the received data corresponding to the surface topography, a plurality of regions having substantially different topographies. Reticle design data is received for exposure on the wafer surface, whereby, from the received reticle design data, reticle design data subsets that are each allocated to a corresponding one of the determined plurality of regions are generated. A best fit focal plane is then generated for each of the determined plurality of regions.
    Type: Grant
    Filed: November 19, 2013
    Date of Patent: June 16, 2015
    Assignee: International Business Machines Corporation
    Inventors: Stephen E. Greco, Ian P. Stobert, Rasit O. Topaloglu
  • Publication number: 20150144155
    Abstract: A method for removing photoresist, an oxidation layer, or both from a semiconductor substrate is disclosed. The method includes placing a substrate in a processing chamber, the processing chamber separate from a plasma chamber for generating a non-oxidizing plasma to be used in treating the substrate; generating a first non-oxidizing plasma from a first reactant gas and a first carrier gas in the plasma chamber, wherein the first non-oxidizing plasma comprises from about 10% to about 40% of the first reactant gas, wherein the first reactant gas has a flow rate of from about 100 standard cubic centimeters per minute to about 15,000 standard cubic centimeters per minute, and wherein the first carrier gas has a flow rate of from about 500 standard cubic centimeters per minute to about 20,000 standard cubic centimeters per minute; and treating the substrate by exposing the substrate to the first non-oxidizing plasma in the processing chamber.
    Type: Application
    Filed: July 16, 2013
    Publication date: May 28, 2015
    Inventors: Li Diao, Robert George Elliston, David Gilbert, Chan-Yun Lee, James Paris, HaiAu PhanVu, Tom Tillery, Vijay Matthew Vaniapura
  • Patent number: 9029267
    Abstract: A method for controlling thermal cycling of a faraday shield in a plasma process chamber is provided. The method includes: performing a first plasma processing operation on a first wafer in the plasma process chamber; terminating the first plasma processing operation; performing a first wafer transfer operation to transfer the first wafer out of the chamber; and, during the first wafer transfer operation, applying power to a TCP coil under a plasma limiting condition.
    Type: Grant
    Filed: May 16, 2013
    Date of Patent: May 12, 2015
    Assignee: Lam Research Corporation
    Inventors: Sanket Sant, Raphael Casaes
  • Publication number: 20150107618
    Abstract: A gas comprising oxygen is supplied to a plasma source. A plasma jet comprising oxygen plasma particles is generated from the gas. A contaminant is removed from the component using the oxygen plasma particles.
    Type: Application
    Filed: October 21, 2013
    Publication date: April 23, 2015
    Applicant: Applied Materials, Inc.
    Inventors: Jennifer Y. Sun, Vahid Firouzdor, Tom K. Cho, Ying Zhang
  • Patent number: 9005367
    Abstract: A liquid composition comprising (A) at least one polar organic solvent, selected from the group consisting of solvents exhibiting in the presence of from 0.06 to 4% by weight of dissolved tetramethylammonium hydroxide (B), the weight percentage being based on the complete weight of the respective test solution (AB), a constant removal rate at 50° C. for a 30 nm thick polymeric barrier anti-reflective layer containing deep UV absorbing chromophoric groups, (B) at least one quaternary ammonium hydroxide, and (C) at least one aromatic amine containing at least one primary amino group, a method for its preparation and a method for manufacturing electrical devices, employing the liquid composition as a resist stripping composition and its use for removing negative-tone and positive-tone photoresists and post etch residues in the manufacture of 3D Stacked Integrated Circuits and 3D Wafer Level Packagings by way of patterning Through Silicon Vias and/or by plating and bumping.
    Type: Grant
    Filed: April 20, 2010
    Date of Patent: April 14, 2015
    Assignee: BASF SE
    Inventor: Andreas Klipp
  • Patent number: 8999068
    Abstract: Provided is a chamber cleaning method capable of efficiently removing a CF-based shoulder deposit containing Si and Al deposited on an outer periphery of an ESC. A mixed gas of an O2 gas and a F containing gas is supplied toward an outer periphery 24a of an ESC 24 at a pressure ranging from about 400 mTorr to about 800 mTorr; plasma generated from the mixed gas is irradiated onto the outer periphery 24a of the ESC 24; an O2 single gas as a mask gas is supplied to the top surface of ESC 24 except the outer periphery 24a; and the shoulder deposit 50 adhered to the outer periphery 24a is decomposed and removed while preventing the top surface of ESC 24 except the outer periphery 24a from being exposed to a F radical.
    Type: Grant
    Filed: September 1, 2010
    Date of Patent: April 7, 2015
    Assignee: Tokyo Electron Limited
    Inventors: Masanobu Honda, Hidetoshi Hanaoka, Taichi Hirano, Takanori Mimura, Manabu Iwata, Taketoshi Okajo
  • Patent number: 8992689
    Abstract: Methods for removing halogen-containing residues from a substrate are provided. By combining the heat-up and plasma abatement steps, the manufacturing throughput can be improved. Further, by appropriately controlling the pressure in the abatement chamber, the removal efficiency can be improved as well.
    Type: Grant
    Filed: February 29, 2012
    Date of Patent: March 31, 2015
    Assignee: Applied Materials, Inc.
    Inventors: Adauto Diaz, Andrew Nguyen, Benjamin Schwarz, Eu Jin Lim, Jared Ahmad Lee, James P. Cruse, Li Zhang, Scott M. Williams, Xiaoliang Zhuang, Zhuang Li
  • Publication number: 20150075558
    Abstract: A method of polishing a surface of an object disposed within a gas chamber is provided. The method includes filling the gas chamber with a discharging medium to a predefined pressure, applying a voltage between an electrode and the surface, calibrating a height of the electrode relative to the surface so as to establish electrical breakdown threshold criteria, and scanning the electrode with respect to the surface so as to sequentially position the electrode over a plurality of locations on the surface, each location characterized by a surface error. When a respective location in the plurality of locations has a surface error that meets the electrical breakdown threshold criteria, electrical breakdown occurs, whereby the electrical breakdown results in a discharging pulse that polishes the surface.
    Type: Application
    Filed: December 3, 2013
    Publication date: March 19, 2015
    Inventor: Kangmin Hsia
  • Patent number: 8957564
    Abstract: Megasonic cleaning systems and methods of fabricating and using the same are provided. In one embodiment, the system comprises a plurality of Micro-Electromechanical System (MEMS) transducers, each transducer including a movable membrane with a membrane electrode coupled to a first potential disposed above and spaced apart from an upper surface of a die including a cavity electrode coupled to a second potential, the membrane including multiple layers including a polysilicon layer between a top silicon nitride layer and a bottom silicon nitride layer, and the membrane electrode includes the polysilicon layer; a chuck on which a target workpiece is positioned; and a fluid to couple sonic energy from the plurality of MEMS transducers to the target workpiece. Other embodiments are also provided.
    Type: Grant
    Filed: June 29, 2011
    Date of Patent: February 17, 2015
    Assignee: Silicon Light Machines Corporation
    Inventors: Toshio Hiroe, Zarem Harold, Alexander Payne, James Hunter
  • Patent number: 8957006
    Abstract: A chemical solution for use in cleaning a patterned substrate includes water, from approximate 0.01 to 99.98 percent by weight; hydrogen peroxide, from 0 to 30 percent by weight; a pH buffering agent, from approximate 0.01 to 50 percent by weight; a metal chelating agent, from approximate 0 to 10 percent by weight; and a compound for lowering a surface tension of the combination of water, hydrogen peroxide, pH buffering agent, and metal chelating agent. Examples of the compound include an organic solvent, from approximate 0 to 95 percent by weight, or a non-ionic surfactant agent, from approximate 0 to 2 percent by weight.
    Type: Grant
    Filed: March 11, 2013
    Date of Patent: February 17, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Yuan Ting, Jeng-Shiou Chen
  • Patent number: 8945412
    Abstract: A substrate cleaning apparatus is capable of cleaning an entire periphery of a substrate end portion at a time by simple control without polishing the end portion and without generating plasma. The substrate cleaning apparatus has a mounting table 204 on which a wafer W is placed, a heating unit 210 for heating a wafer end portion, ultraviolet application unit 220 for applying ultraviolet to the wafer end portion, and a gas flow forming unit 230 for forming a gas flow on the surface of the wafer end portion. The heating unit, the ultraviolet application unit, and the gas flow forming unit are disposed near the wafer end portion so as to surround the wafer.
    Type: Grant
    Filed: July 26, 2012
    Date of Patent: February 3, 2015
    Assignee: Tokyo Electron Limited
    Inventors: Shigeru Kawamura, Teruyuki Hayashi
  • Publication number: 20150031189
    Abstract: Embodiments of mechanisms for cleaning a surface of a semiconductor wafer for a hybrid bonding are provided. The method for cleaning a surface of a semiconductor wafer for a hybrid bonding includes providing a semiconductor wafer, and the semiconductor wafer has a conductive pad embedded in an insulating layer. The method also includes performing a plasma process to a surface of the semiconductor wafer, and metal oxide is formed on a surface of the conductive structure. The method further includes performing a cleaning process using a cleaning solution to perform a reduction reaction with the metal oxide, such that metal-hydrogen bonds are formed on the surface of the conductive structure. The method further includes transferring the semiconductor wafer to a bonding chamber under vacuum for hybrid bonding. Embodiments of mechanisms for a hybrid bonding and a integrated system are also provided.
    Type: Application
    Filed: July 24, 2013
    Publication date: January 29, 2015
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Sheng-Chau Chen, Chih-Hui Huang, Yeur-Luen Tu, Cheng-Ta Wu, Chia-Shiung Tsai, Xiao-Meng Chen
  • Patent number: 8940098
    Abstract: A plasma etch processing chamber configured to clean a bevel edge of a substrate is provided. The chamber includes a bottom edge electrode and a top edge electrode defined over the bottom edge electrode. The top edge electrode and the bottom edge electrode are configured to generate a cleaning plasma to clean the bevel edge of the substrate. The chamber includes a gas feed defined through a top surface of the processing chamber. The gas feed introduces a processing gas for striking the cleaning plasma at a location in the processing chamber that is between an axis of the substrate and the top edge electrode. A pump out port is defined through the top surface of the chamber and the pump out port located along a center axis of the substrate. A method for cleaning a bevel edge of a substrate is also provided.
    Type: Grant
    Filed: July 2, 2013
    Date of Patent: January 27, 2015
    Assignee: Lam Research Corporation
    Inventors: Greg Sexton, Andrew D. Bailey, III, Alan Schoepp
  • Publication number: 20150020848
    Abstract: A lower electrode plate receives radiofrequency power. A first upper plate is positioned parallel to and spaced apart from the lower electrode plate. A grounded second upper plate is positioned next to the first upper plate. A dielectric support provides support of a workpiece within a region between the lower electrode plate and the first upper plate. A purge gas is supplied at a central location of the first upper plate. A process gas is supplied to a periphery of the first upper plate. The dielectric support positions the workpiece proximate and parallel to the first upper plate, such that the purge gas flows over a top surface of the workpiece so as to prevent the process gas from flowing over the top surface of the workpiece, and so as to cause the process gas to flow around a peripheral edge of the workpiece and below the workpiece.
    Type: Application
    Filed: September 19, 2013
    Publication date: January 22, 2015
    Applicant: LAM RESEARCH CORPORATION
    Inventors: Keechan Kim, Jack Chen, Yunsang Kim, Kenneth George Delfin
  • Patent number: 8932406
    Abstract: The molecular etcher carbonyl fluoride (COF2) or any of its variants, are provided for, according to the present invention, to increase the efficiency of etching and/or cleaning and/or removal of materials such as the unwanted film and/or deposits on the chamber walls and other components in a process chamber or substrate (collectively referred to herein as “materials”). The methods of the present invention involve igniting and sustaining a plasma, whether it is a remote or in-situ plasma, by stepwise addition of additives, such as but not limited to, a saturated, unsaturated or partially unsaturated perfluorocarbon compound (PFC) having the general formula (CyFz) and/or an oxide of carbon (COx) to a nitrogen trifluoride (NF3) plasma into a chemical deposition chamber (CVD) chamber, thereby generating COF2. The NF3 may be excited in a plasma inside the CVD chamber or in a remote plasma region upstream from the CVD chamber.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: January 13, 2015
    Assignee: Matheson Tri-Gas, Inc.
    Inventors: Glenn Mitchell, Ramkumar Subramanian, Carrie L. Wyse, Robert Torres, Jr.
  • Patent number: 8911558
    Abstract: A post-W CMP cleaning solution consists of carboxylic acid and deionized water. The carboxylic acid may be selected from the group consisting of (1) monocarboxylic acids; (2) dicarboxylic acids; (3) tricarboxylic acids; (4) polycarboxylic acids; (5) hydroxycarboxylic acids; (6) salts of the above-described carboxylic acids; and (7) any combination thereof. The post-W CMP cleaning solution can work well without adding any other chemical additives such as surfactants, corrosion inhibitors, pH adjusting agents or chelating agents.
    Type: Grant
    Filed: March 23, 2011
    Date of Patent: December 16, 2014
    Assignee: Nanya Technology Corp.
    Inventors: Hongqi Li, Anurag Jindal, Jin Lu
  • Patent number: 8906164
    Abstract: Methods for stabilizing a ceramic contact surface of an electrostatic chuck, wherein the electrostatic chuck can be disposed within a reaction chamber of a semiconductor wafer processing assembly including a radio frequency source and a coolant gas supply are described herein. The method may include: clamping electrostatically a conditioning wafer to the ceramic contact surface of the electrostatic chuck; and cycling an output power of the radio frequency source and an output pressure of the coolant gas supply for multiple hot/cold cycles. Each of the hot/cold cycles includes a hot abrasion state and a cold abrasion state. At the hot abrasion state, the output power of the radio frequency source is relatively high and the output pressure of the coolant gas supply is relatively low to yield a relatively hot conditioning wafer.
    Type: Grant
    Filed: August 5, 2010
    Date of Patent: December 9, 2014
    Assignee: Lam Research Corporation
    Inventors: Chris Kimball, Tom Stevenson, Peter Muraoka
  • Patent number: 8900371
    Abstract: The present invention provides a cleaning agent for a substrate and a cleaning method thereof, which can effectively remove fine particles (particles) present on a surface of substrate or impurities derived from various kinds of metals (metallic impurities), without causing roughness surface of a substrate, in particular, a semiconductor substrate, and without causing corrosion or oxidation of metal wirings, in particular, copper wirings, provided on a surface of substrate, and can further remove at the same time a carbon defect present on a surface of substrate, without removing a metal corrosion inhibitor—Cu film, in particular, a Cu-BTA film.
    Type: Grant
    Filed: September 14, 2011
    Date of Patent: December 2, 2014
    Assignee: Wako Pure Chemical Industries, Ltd.
    Inventors: Hironori Mizuta, Masahiko Kakizawa, Ichiro Hayashida
  • Patent number: 8883699
    Abstract: Disclosed herein is a resist stripping composition, which has an excellent ability of stripping a residual resist remaining after dry or wet etching at the tune of forming patterns in a process of manufacturing a flat panel display substrate.
    Type: Grant
    Filed: October 24, 2012
    Date of Patent: November 11, 2014
    Assignee: Dongwoo Fine-Chem Co., Ltd.
    Inventors: Jeong-Hyun Kim, Kyung-Jun Ko, Sung-Sik Kim, Yu-Jin Lee
  • Patent number: 8859432
    Abstract: Bare aluminum baffles are adapted for resist stripping chambers and include an outer aluminum oxide layer, which can be a native aluminum oxide layer or a layer formed by chemically treating a new or used bare aluminum baffle to form a thin outer aluminum oxide layer.
    Type: Grant
    Filed: October 31, 2012
    Date of Patent: October 14, 2014
    Assignee: Lam Research Corporation
    Inventors: Fred D. Egley, Michael S. Kang, Anthony L. Chen, Jack Kuo, Hong Shih, Duane Outka, Bruno Morel
  • Publication number: 20140295665
    Abstract: Native oxides and associated residue are removed from surfaces of a substrate by sequentially performing two plasma cleaning processes on the substrate in a single processing chamber. The first plasma cleaning process removes native oxide formed on a substrate surface by generating a cleaning plasma from a mixture of ammonia (NH3) and nitrogen trifluoride (NF3) gases, condensing products of the cleaning plasma on the native oxide to form a thin film that contains ammonium hexafluorosilicate ((NH4)2SiF6), and subliming the thin film off of the substrate surface. The second plasma cleaning process removes remaining residues of the thin film by generating a second cleaning plasma from nitrogen trifluoride gas. Products of the second cleaning plasma react with a few angstroms of the bare silicon present on the surface, forming silicon tetrafluoride (SiF4) and lifting off residues of the thin film.
    Type: Application
    Filed: June 12, 2014
    Publication date: October 2, 2014
    Inventors: Bo ZHENG, Arvind SUNDARRAJAN, Xinyu FU