Molybdenum Containing Patents (Class 148/334)
  • Patent number: 4799972
    Abstract: A high-strength high-Cr ferritic, heat-resistant steel exhibiting improved high-temperature, long-term creep strength and a process for producing the same are disclosed. The steel consists essentially of, by weight %:C: not more than 0.2%,Si: not more than 1.0%,Mn: 0.1-1.5%,P: not more than 0.03%,S: not more than 0.03%,Ni: not more than 1.0%,Cr: 5.0-15%,Mo: 0.02-3.0%,W: not more than 4.0%,sol. Al: 0.005-0.04%,N: not more than 0.07%,at least one of V: 0.01-0.4% and Nb: 0.01-0.3%,B: 0-0.02%,at least one of Ca, Ti, Zr, Y, La, and Ce: 0-0.2%, andthe balance Fe and incidental impurities, the A.sub.cl point defined by Formula (1) below being 820.degree. or higher.A.sub.cl (.degree.C.)=765-500 C-450N+30Si-25 Mn+25 Mo+15W+11Cr+50V+30Nb-30Ni+30 sol. Al (weight %).
    Type: Grant
    Filed: October 10, 1986
    Date of Patent: January 24, 1989
    Assignees: Sumitomo Metal Industries, Ltd., Mitsubishi Jukogyo Kabushiki Kaisha
    Inventors: Fujimitsu Masuyama, Takashi Daikoku, Hisao Haneda, Kunihiko Yoshikawa, Hiroshi Teranishi, Atsuro Iseda
  • Patent number: 4793872
    Abstract: A component of semiconductor material deposited by epitaxial growth on a substrate having a predetermined and different lattice parameter consists of an alternate succession of layers of a first type and layers of a second type deposited on the substrate. The lattice parameter of the first type of layers is substantially matched with the lattice parameter of the substrate. In the case of the second type of layers, the lattice parameter is matched and even equal to that of the first type of layers. A component having a lattice parameter equal to that of the second type of layers is formed on the last layer of the second type. Moreover, the energy gaps of the two types of layers are different.
    Type: Grant
    Filed: March 4, 1987
    Date of Patent: December 27, 1988
    Assignee: Thomson-CSF
    Inventors: Paul L. Meunier, Manijeh Razeghi
  • Patent number: 4789421
    Abstract: A GaAs growth crystal comprises a Si substrate, an intermediate layer formed on the substrate and a GaAs layer grown on the intermediate layer. The intermediate layer includes constituent GaP/GaAsP and GaAsP/GaAs superlattice layers and additionally AlP and AlGaP thin films.
    Type: Grant
    Filed: September 27, 1985
    Date of Patent: December 6, 1988
    Assignee: Daidotokushuko Kabushikikaisha
    Inventors: Masayoshi Umeno, Shiro Sakai, Tetsuo Soga
  • Patent number: 4784704
    Abstract: A high strength weldable seamless tube of low alloy steel containing 0.24 to 0.28 percent carbon, 1.30 to 1.50 percent manganese, 0.15 to 0.35 percent silicon, not more than 0.01 percent sulphur, not more than 0.03 percent phosphorous, not more than 0.20 percent copper, 0.13 to 0.20 percent chromium, 0.15 to 0.60 percent molybdenum, 0.007 to 0.05 percent of aluminum, not more than 0.02 percent nitrogen, 0.02 to 0.04 percent titanium, 0.0007 to 0.0025 percent boron, 0.02 to 0.10 percent niobium, and the balance iron. The tube is preferably heated to an austenization temperature of about 1,670.degree. F. and simultaneously internally and externally quenched by a special process that provides for high internal cooling rates followed by tempering at about 1,050.degree. F.
    Type: Grant
    Filed: January 12, 1987
    Date of Patent: November 15, 1988
    Inventor: Robert B. Manton
  • Patent number: 4769214
    Abstract: An ultrahigh carbon steel having a composition of carbon in an amount of from about 0.8 weight percent up to the maximum solubility limit of carbon in austenite, aluminum in an amount of from about 0.5 to about 10 weight percent, an effective amount of a stabilizing element acting to stabilize iron carbide against graphitization, and the balance iron. Preferably, the aluminum is present in an amount of from about 0.5 to about 6.4 weight percent and the stabilizing element is chromium. The steel has excellent ductility and is readily hot, warm and cold worked without cracking. It is particularly useful in superplastic forming operations, and may be processed to a suitable microstructure by any technique which reduces its grain size to about 10 microns or less, and preferably to about 1 micron. Such a very fine grain size is readily acheived with the steel, and the aluminum and stabilizing additions act to retain the fine grain size during superplastic processing.
    Type: Grant
    Filed: September 19, 1985
    Date of Patent: September 6, 1988
    Assignee: SPTek
    Inventors: Oleg D. Sherby, Dong W. Kum, Toshimasa Oyama, Jeffrey Wadsworth
  • Patent number: 4767475
    Abstract: A wear resistance rail which comprises 0.50 to 0.85 wt. % of C, 0.10 to 1.0 wt. % of Si, 0.50 to 1.50 wt. % of Mn, less than 0.035 wt. % of P, less than 0.035 wt. % of S, less than 0.050 wt. % of Al, and the balance of iron and impurities. The web has a high toughness tempered bainite structure, tempered martensite structure or a tempered mixed structure of bainite and martensite and the head rail has high wear resistance which prevents unstable destructive cracks from propagating. The rail can further contain one or more of 0.05 to 1.50 wt. % of Cr, 0.05 to 0.20 wt. % of Mo, 0.03 to 0.10 wt. % of V, 0.10 to 1.00 wt. % of Ni, and 0.005 to 0.050 wt. % of Nb.
    Type: Grant
    Filed: October 15, 1986
    Date of Patent: August 30, 1988
    Assignee: Nippon Kokan Kabushiki Kaisha
    Inventors: Kozo Fukuda, Tsunemi Wada, Shinichi Nagahashi, Yoshio Saito, Masahiro Ueda, Minoru Tanaka
  • Patent number: 4762577
    Abstract: Forgings fabricated from 9 Chromium - 1 Molybdenum, modified alloys are subjected to tempering at a temperature less than the ASTM specified minimum tempering temperature in the range from about 1275.degree. F. to about 1300.degree. F. for a period of time in the range of from about 5 to about 20 hours to cause the forging to have a room temperature yield strength in the range from about 85 to about 100 ksi. Such room temperature yield strengths permit the use of the alloy in the fabrication of high-pressure steam turbine rotors. Forgings fabricated from such alloys possess excellent high-temperature properties and the same are also weldable to facilitate repair of rotors fabricated therefrom and to facilitate the fabrication of the rotor in the first instance by forming the rotor from smaller sections which may be welded together and subsequently tempered at a temperature in the range from about 1275.degree. F. to about 1300.degree. F.
    Type: Grant
    Filed: January 30, 1987
    Date of Patent: August 9, 1988
    Assignee: Westinghouse Electric Corp.
    Inventor: Robert E. Clark
  • Patent number: 4741880
    Abstract: A continuously cast steel consisting of0.32 to 1.0% carbon0.20 to 3.0% manganese,up to 2.0% silicon,max. 0.05% phosphorus,max. 0.05% sulphur,0.002 to 0.008% nitrogen,0.015 to 0.08% zirconium,0.010 to 0.10% aluminium,up to 3.5% chromium,up to 3.5% nickel andup to 0.5% molybdenumrest iron and unavoidable impurities, wherein the zirconium: nitrogen ratio being 7:1 to 10:1 and the austenite grain size being ASTM 6 or a smaller grain size number.
    Type: Grant
    Filed: February 12, 1987
    Date of Patent: May 3, 1988
    Assignee: Thyssen Stahl AG
    Inventors: Cestmir Lang, Lutz Meyer
  • Patent number: 4740255
    Abstract: A high strength electric furnace, vacuum degassed and weldable seamless tube of low alloy steel containing 0.22 to 0.28% carbon, 1.20 to 1.4% manganese, not more than 0.035% phosphorus, not more than 0.02 sulphur, 0.15 to 0.35% silicon, 0.20 to 0.30% chromium, not more than 0.05% nickel, 0.15 to 0.60% molybdenum, 0.02 to 0.04% titanium, 0.0007 to 0.0025% boron, 0.007 to 0.050% aluminum and the balance iron. Where the pipe has a wall thickness of 11/8 inch or less the percentage molybdenum is preferably 0.15 to 0.20% whereas if the wall thickness is 1.18 inches or greater the preferred molybdenum content is 0.40 to 0.60%. The pipe is preferably heated to an austenization temperature of about 1,550.degree. F. followed by simultaneous internal and external quenching and tempering at a temperature of about 1140.degree. F.
    Type: Grant
    Filed: March 17, 1986
    Date of Patent: April 26, 1988
    Inventor: Robert B. Manton
  • Patent number: 4721600
    Abstract: A superplastic hot working method for a duplex-phase, nitrogen-containing ferrous alloy and stainless steel, and a superplastic duplex-phase ferrous alloy are disclosed. The ferrous alloy comprises: at least one of Si and Mn in an amount of not less than 0.5% and not less than 1.7%, respectively; and N: at least 0.01% in solid solution, wherein Si eq and Mn eq which are defined as:Si eq=Si+(2/3)(Cr+Mo), and Mn eq=Mn+2 Ni+60 C+50 N,satisfy the formula:(5/6)(Si eq)-15/2.ltoreq.Mn eq.ltoreq.(11/5)(Si eq)-77/5,and its superplastic hot working is carried out by deforming the alloy heated to 700.degree.-1200.degree. C. at a strain rate of 1.times.10.sup.-6 S.sup.-1 to 1.times.10.sup.0 S.sup.-1. In another aspect, superplastic hot working of a duplex-phase stainless steel comprising Cr: 10.0-35.0%, Ni: 2.0-18.0%, Mo: 0-6.0%, and N: 0.005-0.3% and having the values of Si eq and Mn eq as above is carried out by deforming the steel at a strain rate of from 1.times.10.sup.-6 S.sup.-1 to 1.times.10.sup.1 S.sup.
    Type: Grant
    Filed: March 27, 1986
    Date of Patent: January 26, 1988
    Assignee: Sumitomo Metal Industries, Ltd.
    Inventors: Yasuhiro Maehara, Yoshio Tarutani
  • Patent number: 4720309
    Abstract: This absorbant is of the type formed by superlattice constituted by a stack of films of two different semiconductor materials having gaps of different heights. Thus, a potential well is produced in each film corresponding to the semiconductor with the smallest gap and a potential barrier in each film corresponding to the semiconductor with the largest gap. This saturatable absorbant is characterized in that the films corresponding to the semiconductor with the smallest gap have a thickness, which can assume two values, one small and the other large.Application in optics to the production of mode locking lasers and all optical logic gates.
    Type: Grant
    Filed: July 9, 1986
    Date of Patent: January 19, 1988
    Inventors: Benoit Deveaud, Andre Chomette, Andre Regreny
  • Patent number: 4666532
    Abstract: Semiconductor substrate materials, such as silicon, useful in the manufacture of electronic devices, such as integrated circuits, having a 0.05 to 2.0 micron thick layer of polysilicon on the backside to improve gettering capabilities of defects, contaminants and impurities away from the active device region of the substrate are provided with a 10 to 40 micron deep region from the surface having reduced oxygen concentration. The oxygen denuding is accomplished by heating the substrate material at a temperature of 1050.degree. to 1250.degree. C. first in the presence of oxygen to break up oxygen nuclei, secondly in the presence of oxygen and halogen to permit stacking fault retrogrowth and oxygen outdiffusion, and thirdly in the presence of oxygen, nitrogen and/or argon.
    Type: Grant
    Filed: May 4, 1984
    Date of Patent: May 19, 1987
    Assignee: Monsanto Company
    Inventors: Harold W. Korb, Claudia P. Reed, Roger W. Shaw
  • Patent number: 4664726
    Abstract: A steel alloy for use as a material for storage tubes adapted to receive pressed objects of metal powder, which can store hydrogen and release the same, is of the composition comprised of 0.14 to 0.18 weight percent of carbon material 0.15 to 0.3 weight percent of silicon, maximum 0.025 weight percent of phosphorus, maximum 0.025 weight percent of sulfur, from 1.9 to 2.1 weight percent of chrome, from 0.45 to 0.60 weight percent of molybdenum, at least 0.015 to 0.030 weight percent of aluminum, and iron.
    Type: Grant
    Filed: November 25, 1985
    Date of Patent: May 12, 1987
    Assignee: Benteler-Werke Aktiengesellschaft
    Inventors: Gert Vaubel, Rolf Rathert
  • Patent number: 4640722
    Abstract: A ferritic alloy steel having good formability, cyclic oxidation resistance and creep strength at elevated temperatures above 1000.degree. F. and particularly above about 1500.degree. F. (816.degree. C.) after a final anneal at 1850.degree. to 2050.degree. F. (1010.degree. to 1120.degree. C.), comprising 0.05% maximum carbon, about 2% maximum manganese, greater than 1.0% to 2.25% silicon, less than 0.5% aluminum, with silicon being at least 3 times the aluminum content, about 6% to about 25% chromium, up to about 5% molybdenum, with the sum of chromium and molybdenum being at least 8%, 0.05% maximum nitrogen, at least one of titanium, zirconium and tantalum, with said titanium, zirconium and tantalum being present in an amount at least equal to the stoichiometric equivalent of the present carbon plus the percent nitrogen, at least 0.1% uncombined columbium, and balance essentially iron.
    Type: Grant
    Filed: February 25, 1985
    Date of Patent: February 3, 1987
    Assignee: Armco Inc.
    Inventor: Mark D. Gorman
  • Patent number: 4588451
    Abstract: Expitaxial composite comprising thin films of a Group III-V compound semiconductor such as gallium arsenide (GaAs) or gallium aluminum arsenide (GaAlAs) on single crystal silicon substrates are disclosed. Also disclosed is a process for manufacturing, by chemical deposition from the vapor phase, epitaxial composites as above described, and to semiconductor devices based on such epitaxial composites. The composites have particular utility for use in making light sensitive solid state solar cells.
    Type: Grant
    Filed: April 27, 1984
    Date of Patent: May 13, 1986
    Assignee: Advanced Energy Fund Limited Partnership
    Inventor: Stanley M. Vernon
  • Patent number: 4551394
    Abstract: Localized epitaxial growth of GaAs from a silicon monocrystalline substrate to provide a three-dimensional Si-GaAs structure and method. The silicon has an insulating layer deposited thereover and a window is opened through the layer to expose a small area of the underlying silicon from which silicon is epitaxially grown until the window is nearly full whereupon a thin buffer layer such as germanium is epitaxially grown over the epi-silicon to fill the window. Al.sub.x Ga.sub.1-x As (where x.gtoreq.0) is then locally epitaxially grown from the buffer layer and it grows laterally as well as vertically to cover the surrounding insulating layer surface and provide a site for high frequency electronics.
    Type: Grant
    Filed: November 26, 1984
    Date of Patent: November 5, 1985
    Assignee: Honeywell Inc.
    Inventors: Regis J. Betsch, Michael S. Liu, Obert N. Tufte
  • Patent number: 4549912
    Abstract: In the electromigration process, liquid metal inclusions are migrated into or through bodies of semiconductor material by an electrical potential gradient driving force. The method of this invention provides anode and cathode connections generally useful in the practice of electromigration and connections which are especially useful in circumventing the adverse effects of several types of rectifying junctions encountered in the practice of electromigration.
    Type: Grant
    Filed: December 13, 1982
    Date of Patent: October 29, 1985
    Assignee: General Electric Company
    Inventor: Thomas R. Anthony
  • Patent number: 4523964
    Abstract: The invention relates to a process for producing silicon diaphragm pressure transducers, and to pressure transducers so produced, which will operate in high temperature applications above 150.degree. C. by properly insulating the strain gauges from the diaphragm. This is achieved by utilizing two properly oriented silicon wafers which are joined together by a two-step diffusion technique, which includes the diffusion bonding of one boron doped wafer surface into the other wafer surface previously oxide coated, at greatly reduced pressures and temperatures than heretofore used. This simultaneous diffusion takes place because of prior contouring or the forming of relief channels into one of the bonded surfaces, and because only one joined surface is oxide coated, thus reducing process times substantially. That is, there is a continuous diffusion of boron into the boron oxide coated surface resulting in a boron rich layer of great uniformity.
    Type: Grant
    Filed: March 30, 1983
    Date of Patent: June 18, 1985
    Assignee: Becton, Dickinson and Company
    Inventors: L. Bruce Wilner, Herbert V. Wong
  • Patent number: 4442449
    Abstract: An interconnect structure for use in integrated circuits comprises a germanium-silicon binary alloy. Such an alloy is deposited on the semiconductor wafer from the co-deposition of germanium and silicon using chemical vapor deposition techniques of a type commonly used in the semiconductor industry. The resulting alloy can be oxidized, selectively removed and doped with selected impurities to provide a conductive lead pattern of a desired shape on the surface of a wafer.
    Type: Grant
    Filed: March 16, 1981
    Date of Patent: April 10, 1984
    Assignee: Fairchild Camera and Instrument Corp.
    Inventors: William I. Lehrer, Bruce E. Deal
  • Patent number: 4290825
    Abstract: A process for manufacturing gallium arsenide devices in which regions of high resistivity are created in the gallium arsenide by subjecting the regions to bombardment by protons and then by deuterons, and devices so made.
    Type: Grant
    Filed: February 13, 1979
    Date of Patent: September 22, 1981
    Assignee: United Kingdom Atomic Energy Authority
    Inventors: Geoffrey Dearnaley, Kenneth Steeples, Ian J. Saunders
  • Patent number: 4282045
    Abstract: A variable temperature method for the preparation of single and multiple epitaxial layers of single-phase (e.g., face-centered cubic), ternary lead chalcogenide alloys (e.g., lead cadmium sulfide, [Pb.sub.1-w Cd.sub.w ].sub.a [S].sub.1-a wherein w varies between zero and fifteen hundredths, inclusive, and a=0.500.+-.0.003), deposited upon substrates of barium fluoride, BaF.sub.2, maintained in near thermodynamic equilibrium with concurrently sublimated lead alloy and chalcogenide sources. During preparation, the temperature of the substrate is varied, thereby providing an epilayer with graded composition and predetermined electrical and optical properties along the direction of growth. This growth technique can be used to produce infrared lenses, narrowband detectors, and double heterojunction lasers.
    Type: Grant
    Filed: April 25, 1980
    Date of Patent: August 4, 1981
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventors: James D. Jensen, Richard B. Schoolar
  • Patent number: 4252576
    Abstract: An epitaxial wafer of GaAs.sub.1-x P.sub.x has been doped with nitrogen and used for the production of light emitting diode (LED). The carrier concentration of the conventional GaAs.sub.1-x P.sub.x was from 3.times.10.sup.16 to 2.times.10.sup.17 /cm.sup.3.According to the present invention, the carrier concentration is reduced lower than the conventional concentration and the luminance of LED is increased approximately two or three times the conventional luminance.
    Type: Grant
    Filed: July 6, 1979
    Date of Patent: February 24, 1981
    Assignee: Mitsubishi Monsanto Chemical Co.
    Inventors: Shinichi Hasegawa, Hisanori Fujita
  • Patent number: 4207122
    Abstract: In (Sb.sub.0.1 As.sub.0.9) light emissive diodes and lasers are grown on Ga Sb substrates to give lattice matching. Ga Sb has higher band gap, high refractive index therefore gives electrical, but not optical, confinement required for laser action. Both confinement types provided by sandwiching active layer between layers of (Al.sub.0.6 Ga.sub.0.4) Sb. In (Sb.sub.0.1 As.sub.0.9) emits at approximately 4 .mu.m, but emission can be shifted by increasing the proportion of In Sb and restoring the lattice match by the addition of another compound semiconductor e.g. Ga As for longer wavelength emission or In P or Al As for shorter wavelength emission.
    Type: Grant
    Filed: December 1, 1978
    Date of Patent: June 10, 1980
    Assignee: International Standard Electric Corporation
    Inventor: Colin H. L. Goodman
  • Patent number: 4074305
    Abstract: Electrical contact between a conducting substrate, e.g., graphite, and a polycrystalline semiconductor layer of, for example p-type indium phosphide in a semiconductor device is made through a p-type GaAs intermediary layer. The GaAs layer is deposited on the conducting substrate by conventional methods such as chemical vapor deposition. The indium phosphide layer can then be deposited on the GaAs by similar techniques. The specific resistance and blocking voltage of such an interface is typically below 2 .OMEGA.-cm.sup.2 and 50 millivolts respectively. The efficiency of a p-InP/nCdS solar cell containing the improved electrical contact is measurably increased.
    Type: Grant
    Filed: November 16, 1976
    Date of Patent: February 14, 1978
    Assignee: Bell Telephone Laboratories, Incorporated
    Inventors: Wilbur D. Johnston, Jr., Joseph L. Shay
  • Patent number: 3951698
    Abstract: A photon sensing device utilizing a III-V negative electron affinity photthode grown on a window substrate support which simultaneously serves as a support and growth surface for the epitaxial growth of suitable cathode layers as well as the input window for the device.
    Type: Grant
    Filed: November 25, 1974
    Date of Patent: April 20, 1976
    Assignee: The United States of America as represented by the Secretary of the Army
    Inventors: Herbert L. Wilson, William A. Gutierrez