Abstract: A method for forming an electrical connection structure part according to the present invention includes a step of covering, with an alloy body, a connection part between a first conductor part and a second conductor part, so as to form the electrical connection structure part. The first conductor part contains aluminum. The second conductor part has a surface covered with an ingredient containing nickel. The alloy body contains tin, silver, and nickel. The method further includes steps of: connecting the first conductor part and the second conductor part to each other to form the connection part; melting the alloy body; and dipping at least the connection part into the molten alloy body.

Abstract: An ultrathin power semiconductor package with high thermal dissipation performance and its preparation method are disclosed. The package includes a lead frame unit with a staggered structure including an upper section and a lower section. A thin layer is attached on the surface of the lead frame unit having a plurality of contact holes on the upper section and at least one opening on the lower section. A semiconductor chip is attached on the opening on the lower section of the lead frame unit and then a plurality of metal bumps are deposited, where one metal bump is formed on each contact hole on the upper section and on each of the electrodes on the top surface of the semiconductor chip.

Abstract: Disclosed is a soldering structure for mounting at least one connector on a flexible circuit board. The connector includes SMD pins and solder-dipping pins. The flexible circuit board has a connector mounting section having a component surface on which SMD soldering zones and solder-dipping pin holes are formed. A reinforcement plate is coupled to a reinforcement bonding surface of the flexible circuit board. The reinforcement plate has through holes corresponding to the solder-dipping pin holes of the flexible circuit board. The SMD pins of the connector are respectively soldered to the SMD soldering zones of the flexible circuit board, and the solder-dipping pins of the connector are respectively inserted through the solder-dipping pin holes of the flexible circuit board and the through holes of the reinforcement plate to the soldering surface of the reinforcement plate to be soldered with a solder material.

Abstract: An LED multi-chip bonding die (1) comprises a packaging enclosure, a plurality of LED chips and a packaging cover, wherein the chips are arranged in one line from top to bottom on the emitting platform. Large area electrodes are equipped on the packaging enclosure and the packaging cover is made of transparent silicone gel so that the bonding die can emit larger light energy and higher luminance via the packaging cover while the heat produced by the chips can be quickly dissipated by the electrodes. A light strip (20) equipped with the bonding die comprises a plurality of bonding die sections and circuit board (2) and each bonding die section (1) comprises four LED multi-chip bonding dies (1) and a current-limiting resistor in series circuit. Each series circuit is connected in parallel and circuit board (2) is printed circuit board which can provide a optimal heat-dissipating structure for chips of bonding die.

Abstract: A first substantially annular conductive material has a first central opening, the first central opening is sufficient to substantially surround a fastener and maintain an electrical connection between the printed circuit board and the chassis. A second substantially annular conductive material is concentric with the first conductive material and the second conductive material hays a second central opening which is sufficient to substantially surround the fastener and maintain the electric connection between the printed circuit board and the chassis. A substantially annular impedance material is between and adjacent to the first conductive material and the second conductive material, the impedance material is sufficient to attenuate the electromagnetic interference from the system.

Abstract: A semiconductor device manufacturing method includes: a first-process for placing, on a first-substrate on which traces and first-electrodes are formed, each of the first-electrodes being connected to one of traces, a second-substrate in which through-holes corresponding to the first-electrodes and relay-members are disposed, each of the relay-members being formed of solder, penetrating through one of the through-holes, and projecting from both ends of the one of the through-holes, so that the first-electrodes are aligned with the through-holes in a plan view; a second-process for melting the relay-members so that the relay-members are connected to the first-electrodes, after the first-process; and a third-process for placing a semiconductor substrate on which a second-electrodes corresponding to the first-electrodes are formed on a side opposite to the first-substrate across the second-substrate, after the second-process, to connect the first-electrodes and the second-electrodes to each other via the relay-m

Abstract: Provided is a circuit board having a tie bar buried therein. The circuit board includes a dielectric stack, at least a first tie bar, at least a first gold finger and at least a first microvia. The dielectric stack includes a first dielectric layer and a second dielectric layer. The first dielectric layer is located on the second dielectric layer. The dielectric stack includes a wireline region and a gold finger region. The first tie bar is buried in the gold finger region between the first dielectric layer and the second dielectric layer. The at least a first gold finger is located in the gold finger region on the first dielectric layer. The first microvia is located in the gold finger region in the first dielectric layer, and electrically connects the first gold finger to the first tie bar.

Abstract: In accordance with embodiments of the present disclosure, a circuit board may include a first trace formed in a first layer of the circuit board, a second trace formed in a second layer of the circuit board, a via, and a termination pad. The via may be configured to electrically couple the first trace to the second trace, the via comprising a via stub corresponding to a first portion of a length of the via not within a second portion of the via between a first location in which the first trace is electrically coupled to the via and a second location in which the second trace is electrically coupled to the via. The termination pad may be formed at an end of the via stub opposite at least one of the first location and the second location.

Abstract: A battery pack configured to prevent excess solder material from flowing down onto a protective circuit module (PCM) is disclosed. According to some aspects, the battery pack includes at least one battery cell, a protective circuit module (PCM) electrically connected to the battery cell, and a conductive tab configured to electrically connect the battery cell to the PCM. A tapered through hole is formed in the PCM so that the conductive tab is inserted into and fixed to the through hole.

Abstract: Even in an electronic device where electrodes are coupled electrically using a solder, sections to which electrodes of an electronic component are coupled are switched by a method other than changing circuits of the electronic component or changing circuits of a wiring substrate. The electronic device includes: a wiring substrate having two or more first electrodes over one surface thereof; and an electronic component having, over one surface thereof, two or more second electrodes arranged corresponding to the two or more first electrodes, respectively. At least one of the first electrodes is a specific electrode divided into two or more divided portions, and the divided portions are coupled to different wirings, respectively. Further, at least one of the divided portions is coupled to a corresponding second electrode through a solder.

Abstract: A multi layer interconnecting substrate has at least two spaced apart metal layers with a conductive pad on each one of the metal layers. Two different types of insulating layers are placed between the metal layers. The placement is such that one of the two different types of insulating layers is placed between the conductive pads and the other type of insulating layer is placed between the two spaced apart metal layers.

Abstract: A combined printed wiring board includes a multilayer printed wiring board, and a wiring film fixed to a surface of the multilayer printed wiring board and including a first wiring structure formed to connect multiple semiconductor elements and a second wiring structure formed to connect the multilayer printed wiring board and each of the semiconductor elements.

Abstract: Printed circuits may be electrically and mechanically connected to each other using connections such as solder connections. A first printed circuit such as a rigid printed circuit board may have solder pads and other metal traces. A second printed circuit such as a flexible printed circuit may have openings. Solder connections may be formed in the openings to attach metal traces in the flexible printed circuit to the solder pads on the rigid printed circuit board. A ring of adhesive may surround the solder connections. The flexible printed circuit may be attached to the rigid printed circuit board using the ring of adhesive. An insulating tape may cover the solder connections. A conductive shielding layer with a conductive layer and a layer of conductive adhesive may overlap the solder joints. The conductive adhesive may connect the shielding layer to the metal traces on the rigid printed circuit board.

Abstract: An electronic device includes a wiring board including a first electrode and a second electrode, a semiconductor device mounted on the wiring board and including a first terminal and a second terminal, an interposer provided between the wiring board and the semiconductor device, the interposer including a conductive pad and a sheet supporting the conductive pad, the conductive pad having a first surface on a side of the wiring board and a second surface on a side of the semiconductor device, a first solder connecting the first electrode positioned outside of an area in which the interposer is disposed with the first terminal positioned outside of the area, a second solder connecting the second electrode positioned inside of the area with the first surface of the conductive pad, and a third solder connecting the second terminal positioned inside of the area with the second surface of the conductive pad.

Abstract: An electronic module with EMI protection is disclosed. The electronic module comprises a component (1) with contact terminals (2) and conducting lines (4) in a first wiring layer (3). There is also a dielectric (5) between the component (1) and the first wiring layer (3) such that the component (1) is embedded in the dielectric (5). Contact elements (6) provide electrical connection between at least some of the contact terminals (2) and at least some of the conducting lines (4). The electronic module also comprises a second wiring layer (7) inside the dielectric (5). The second wiring layer (7) comprises a conducting pattern (8) that is at least partly located between the component (1) and the first wiring layer (3) and provides EMI protection between the component (1) and the conducting lines (4).

Abstract: A chip board package structure includes a circuit board part, a chip board part and a solder used to solder the circuit board part and the chip board part. A chip on the chip board part is connected to an electrical circuit by wiring or soldering. A surface treatment metal layer includes at least nickel, palladium and gold formed on part of the surface of the circuit layer on the chip board. A copper-tin intermetallic compound is formed on joints of the second solder and the surface treatment metal layer, and the other part of the circuit layer is directly connected to the solder to form the copper-tin intermetallic compound. In addition to the lower package cost, with the shape feature of the copper-tin intermetallic compound, it is possible to increase the contact area with the solder, thereby improving the reliability of the soldering process and the yield.

Abstract: There is provided a circuit board to which a solder ball composed of a lead (Pb)-free solder is to be connected, a semiconductor device including an electrode and a solder ball composed of a lead (Pb)-free solder disposed on the electrode, and a method of manufacturing the semiconductor device, in which mounting reliability can be improved by enhancing the bonding strength (adhesion strength) between the solder ball composed of a lead (Pb)-free solder and the electrode.

Abstract: A semiconductor package includes a package substrate including a first wiring embedded in the package substrate, a second wiring embedded in the package substrate, the second wiring electrically insulated from the first wiring, and a capacitor embedded in the package substrate, the capacitor including a first electrode electrically connected to the first wiring and a second electrode electrically connected to the second wiring. At least a first semiconductor chip is disposed on the package substrate. A plurality of connection terminals are disposed between the package substrate and the first semiconductor chip and contact the package substrate, and form at least a first group of at least two connection terminals formed continuously adjacent to each other and electrically connected to the first wiring, and at least a second group of at least two connection terminals formed continuously adjacent to each other and electrically connected to the second wiring.

Abstract: Disclosed herein is a printed circuit board capable of increasing reliability by decreasing stress between an insulating layer and solder balls. The printed circuit board includes: an insulating layer part including circuit patterns and connecting lands having solder balls seated thereon and including a plurality of insulating layers; a plurality of connecting pads and non-connecting pads formed at the insulating layer part; and a plurality of reinforcing vias formed in the non-connecting pads and reinforcing a close adhesion state between the insulating layer part and the non-connecting pads.

Abstract: A method for electrically interconnecting two substrates, each having a corresponding set of preformed electrical contacts, the substrates comprising an electronic circuit, and the resulting module, is provided. A liquid curable adhesive is provided over the set of contacts of a first substrate, and the set of electrical contacts of the second substrate is aligned with the set of electrical contacts of the first substrate. The sets of electrical contacts of the first and second substrate are compressed to displace the liquid curable adhesive from the inter-contact region, and provide electrical communication between the respective sets of electrical contacts. The liquid curable adhesive is then cured to form a solid matrix which maintains a relative compression between the respective sets of electrical contacts. One embodiment of the module comprises a high-speed superconducting circuit which operates at cryogenic temperatures.

Abstract: A printed wiring board including a connection part that is connected to a projecting portion of an external member by soldering, the connection part including a first hole in which the projecting portion is inserted, a main land to which the projecting portion is soldered, a metallic pattern that is drawn from the main land, and a sub-land that is connected to the main land through the metallic pattern, wherein the main land is constructed with a metallic film configured to cover a peripheral region of the first hole in at least a front face of the printed wiring board including the front face and a back face, the front face to which the soldering is performed and the back face on a side opposite to the front face, and the metallic film is not formed on a sidewall forming the first hole, and where the sub-land is constructed with a metallic film configured to cover a sidewall formed by a second hole piercing the printed wiring board and a peripheral region of the second hole in both the front face and the bac

Abstract: An assembler receives a circuit board. The circuit board includes at least a first node and a second node that are adjacent but electrically isolated from each other. There is a gap between the first node and the second node. The first node is electrically isolated from other components on the circuit board. The second node is electrically coupled to circuitry residing on the circuit board. The assembler initiates positioning of a conductive lead of a battery in a vicinity of the first node. The gap between the first node and second node initially prevents the live conductive lead from being in electrical contact with the second node. Eventually, the assembler bridges the gap to provide an electrical connection between at least the conductive lead and the second node to electrically couple the conductive lead to the second node and thus the circuitry residing on the circuit board.

Abstract: An object of the present invention is to propose a functional element built-in substrate which enables an electrode terminal of a functional element to be well connected to the back surface on the side opposite to the electrode terminal of the functional element, and which can be miniaturized.

Abstract: The present invention relates to circuit boards and, more specifically, a process for providing electrical connections with reduced via capacitance on circuit boards. In one embodiment, the present invention provides a method for providing an electrical connection between traces disposed on different layers of a circuit board, the method comprising forming in the board a via hole that extends between the different layers and interconnects a pair of electrically conductive traces disposed on the different layers. An inner sidewall of the via hole includes electrically conductive material thereon. The method further comprises removing a first portion of the conductive material from the inner sidewall by removing a first portion of the inner sidewall. A remaining portion of the conductive material on a remaining portion of the inner sidewall interconnects the pair of traces and has a corresponding width that is substantially similar to a width of each trace.

Abstract: In at least one embodiment, a circuit board assembly that includes a printed circuit board is provided. The printed circuit board includes a top surface and a bottom surface for supporting at least one through-hole electrical component. The printed circuit board defines at least one component hole extending from the top surface to the bottom surface for receiving the at least one through-hole electrical component. The at least one component hole includes a first section having a first diameter and a second section having a second diameter. The first diameter is different from the second diameter. Each of the first and the second sections are configured to receive solder paste for forming a solder joint with the at least one through-hole electrical component.

Abstract: A board unit includes a board that has a through hole penetrating the board from a first side of the board to a second side of the board and having a conductive inner wall surface a first electronic component that has a first connection pin to be press-fitted in the through hole from the first side of the board, and a conductive member that is disposed in the through hole to connect the inner wall surface of the through hole to the first connection pin.

Abstract: A bonding pad structure is disclosed, which is composed of two bonding pad units that are symmetrically disposed with respect to an axial line. Each bonding pad units is further composed of at least two bonding pads, i.e. each bonding pad unit is composed of at least one first bonding pad and at least one second bonding pad. In an embodiment, the first bonding pad is arranged next to the axial line and the second bonding pad is arranged at a side of the corresponding first bonding pad away from the axial line while enabling the first bonding pad and the corresponding second bonding pad to be interconnected to each other by a first neck portion. Thereby, a plurality of solder areas of different sizes can be formed by the interconnecting of the at least two bonding pad units that can be used for soldering electronic components of different sizes.

Abstract: This relates to systems and methods for providing one or more vias through a module of an electrical system. For example, in some embodiments, the module can include one or more passive elements and/or active of the electrical system around which a packaging has been plastic molded. The module can be stacked under another component of the electrical system. Vias can then be provided that extend through the module. The vias can include, for example, electrically conductive pathways. In this manner, the vias can provide electrical pathways for coupling the component stacked on top of the module to other entities of an electronic device including the electrical system. For example, the component can be coupled to other entities such as other components, other modules, printed circuit boards, other electrical systems, or to any other suitable entity.

Abstract: A printed circuit board solder mounting method of solder-jointing a first-land formed on a first-printed-circuit-board and a second-land formed on a second-printed-circuit-board together, includes: filling a solder-filling-hole with cream solder, the solder-filling-hole provided so as to be open in a planar region of the first-land; arranging a solder-drawing-hole so that the solder-drawing-hole and the solder-filling-hole face each other, the solder-drawing-hole being formed so as to be open in a planar region of the second region, having a center position to be superposed on a center position of the solder-filling-hole, and having a solder wettability higher than a solder wettability of the solder-filling-hole; melting the cream solder in the solder-filling-hole by reflow heating and causing at least part of the cream solder to ascend to the solder-drawing-hole facing the solder-filling-hole; and jointing the first-land and the second-land together by solidifying the cream solder interposed between the firs

Abstract: A method of producing a chip embedded substrate is disclosed. This method comprises a first step of mounting a semiconductor chip on a first substrate on which a first wiring is formed; and a second step of joining the first substrate with a second substrate on which a second wiring is formed. In the second step, the semiconductor chip is encapsulated between the first substrate and the second substrate and electrical connection is made between the first wiring and the second wiring so as to form multilayered wirings connected to the semiconductor chip.

Abstract: Improved Molded Laser Package (MLP) Packages which include a relief path for pressure and reduces the risk of shorting adjacent solder balls are provided. The MLP packages may include a gutter integrally connected to one or more through mold vias allowing a path to relieve pressure created when moisture gets entrapped in through mold vias, during the manufacturing process, while also reducing the risk of solder shorts between adjacent solder balls located in the through mold vias. Additionally, MLP packages which include gutters integrally connected to one or more through mold vias may enable tighter bump pitch and thinner packages. As a result, process margins and risks associated with surface mount technology (SMT) may be improved and provide more flexibility on inventory staging.

Abstract: A plurality of openings are formed in a resin insulation layer on a top surface side of a wiring laminate portion, and a plurality of openings are formed in a resin insulation layer on a bottom surface side thereof. A plurality of connection terminals are disposed to correspond to the openings. Peripheral portions of terminal outer surfaces of the connection terminals are covered by the resin insulation layer on the top surface side, and peripheral portions of terminal outer surfaces of the connection terminals are covered by the resin insulation layer on the bottom surface side. Each of the second-main-surface-side connection terminals has a concave portion at the center of the terminal outer surface, and the deepest portion of the concave portion is located on the interior side in relation to the peripheral portion of the terminal outer surface.

Abstract: Example multi-layer printed circuit boards (‘PCBs’) are described as well as methods of making and using such PCBs that include layers of laminate; at least one via hole traversing the layers of laminate, and a via conductor contained within the via hole, the via conductor comprising a used portion and an unused portion, the via conductor comprising copper coated with a metal having a conductivity lower than the conductivity of copper.

Abstract: According to one embodiment, an electronic device is provided with: an electronic substrate on which electronic components are provided; a screw including a screw head portion and a threaded portion, and configured to be engaged to the electronic substrate; a conducting member provided between the screw head portion and the electronic substrate and configured to electrically connect the screw head portion and the electronic substrate; and an electrical wiring line provided between the screw head portion and the electronic substrate and configured so as not to be electrically connected to the screw head portion.

Abstract: A wiring substrate includes an inorganic substrate including a substrate body formed of an inorganic material, a wiring pattern formed on the substrate body, and an external connection terminal being electrically connected to the wiring pattern, an organic substrate that is formed below the inorganic substrate, the organic substrate including an insulating layer and a wiring layer formed on the insulating layer, and a bonding layer interposed between the inorganic substrate and the organic substrate, the bonding layer including a stress buffer layer and a penetration wiring that penetrates the stress buffer layer. A thermal expansion coefficient of the stress buffer layer is greater than a thermal expansion coefficient of the inorganic substrate and less than a thermal expansion coefficient of the organic substrate. The wiring pattern and the wiring layer are electrically connected by way of the penetration wiring.

Abstract: A wiring board has a first resin insulation layer, a first conductive pattern formed on the first resin insulation layer, a second resin insulation layer formed on the first conductive pattern and having an opening portion exposing at least a portion of the first conductive pattern, a second conductive pattern formed on the second resin insulation layer, and a via conductor formed in the opening portion of the second resin insulation layer and electrically connecting the first conductive pattern and the second conductive pattern. The via conductor has a side surface extending between the first conductive pattern and the second conductive pattern and a bent portion where an inclination of the side surface of the via conductor changes in a depth direction of the via conductor.

Abstract: An electronic device comprises a functional stack (10) and a cover (50) coupled thereto by an insulating adhesive layer (30). The functional stack (10) comprises a first transparent and electrically conductive layer (22), a second electrically conductive layer (24) and a functional structure (26), comprising at least one layer, sandwiched between said first and second conductive layer. The cover (50) includes a substrate (52) and at least a first conductive structure (66, 68) that is arranged in a first plane between the adhesive layer (28) and the substrate (52). First and second transverse electrical conductors (32, 34) transverse to the first plane (61) electrically interconnect the first and the second electrically conductive layer (22, 24) with the first and the second conductive structure (66, 68) in the first plane (61).

Abstract: A circuit board includes a circuit board plate, a conductive ring, a solder mask and at least one insulating pad. The circuit board plate includes a surface and a conductive through hole passing through the surface and the circuit board plate, wherein the conductive through hole have a conductive layer disposed on a wall thereof. The conductive ring on the surface surrounds an opening of the conductive through hole on the surface and electrically connects to the conductive layer. The solder mask is disposed on the surface. The conductive ring is exposed outside of the solder mask. The insulating pad has a thickness. The first surface of the insulating pad is adapted to contact the solder mask or the surface and sited at periphery of the conductive ring. The second surface of the insulating pad is adapted for spacing a distance between a solder coating tool and the solder mask.

Abstract: Provided are structures for connecting trace lines of printed circuit boards and optical transceiver modules with the same. The module may include an optical transmitter/receiver part, a signal processing unit, a flexible PCB, and a rigid PCB. The flexible PCB may include a first signal line, and the rigid PCB may include a second signal line. The flexible PCB and the rigid PCB may be overlapped with each other. The first signal line and the second signal line may not be overlapped with each other and be electrically connected to each other by a junction soldering structure. It is possible to transmit high quality and high frequency signals through the first and second signal lines.

Abstract: An embedded structure of circuit board is provided. The embedded structure includes a substrate, a first patterned conductive layer disposed on the substrate and selectively exposing the substrate, a first dielectric layer covering the first patterned conductive layer and the substrate, a pad opening disposed in the first dielectric layer, and a via disposed in the pad opening and exposing the first patterned conductive layer, wherein the outer surface of the first dielectric layer has a substantially even surface.

Abstract: Disclosed is a printed circuit board, which includes an insulating member having a circuit pattern embedded in one surface thereof, a bump pad formed in the insulating member so as to be connected to the circuit pattern and protruding from an outer surface of the insulating member, a build-up layer formed on one surface of the insulating member and including a build-up insulating layer and a circuit layer formed in the build-up insulating layer and having a via connected to the circuit pattern, and a solder resist layer formed on the build-up layer. A method of fabricating the printed circuit board is also provided. The printed circuit board is fabricated using a build-up process and the outermost circuit layer thereof is formed to have an embedded structure using an imprinting process, thus minimizing the separation of the circuit layer and reducing the lead time and the fabrication cost.

Abstract: First and second terminals project from a circuit board and lie adjacent to each other with an interspace formed between the first and second terminals. An electronic apparatus further includes a projecting member projecting along a neighboring terminal which is one of the first and second terminals at such a position that the neighboring terminal is located between the projecting member and the interspace. The projecting member is located at an adjacent position adjacent to the neighboring terminal, to attract molten solder from the interspace toward the projecting member during soldering to join the first and second terminals to the circuit board.

Abstract: A component can include a substrate having a first surface and a second surface remote therefrom, an opening extending in a direction between the first and second surfaces, and a conductive via extending within the opening. The substrate can have a CTE less than 10 ppm/° C. The conductive via can include a plurality of base particles each including a first region of a first metal substantially covered by a layer of a second metal different from the first metal. The base particles can be metallurgically joined together and the second metal layers of the particles can be at least partially diffused into the first regions. The conductive via can include voids interspersed between the joined base particles. The voids can occupy 10% or more of a volume of the conductive via.

Abstract: An exemplary multilayer printed circuit board includes a first circuit substrate, a third circuit substrate, a second circuit substrate between the first and third circuit substrates, a first anisotropically conductive adhesive layer between the first and second circuit substrates, and a second anisotropically conductive adhesive layer between the second and third circuit substrates. The first circuit substrate includes a first conductive terminal and a first through hole. The second circuit substrate includes a second conductive terminal and two through holes (i.e. second and third through holes). The third circuit substrate includes a third conductive terminal and a fourth through hole. The first anisotropically conductive adhesive layer fills the first and third through holes to electrically connect the first and second conductive terminals. The second anisotropically conductive adhesive layer fills the second and fourth through holes to electrically connect the second and third conductive terminals.

Abstract: A printed circuit board and a design method thereof are disclosed. The design method includes: wiring signal lines on an area basis at inner layers adjacent to outer surface layers; arranging the outer surface layers with no wiring or few wirings and interconnecting the outer surface layers by way of through vias, so that the outer surface layers function as a primary ground; and setting parameters of a line width and a layer height to control a target impedance value. The printed circuit board includes outer surface layers and two inner layers therebetween. The inner layers adjacent to the outer surface layers are used for arranging signal lines on an area basis; and the outer surface layers are arranged with no wiring or few wirings and are interconnected as a primary ground through vias. The invention also discloses a mainboard of a terminal product using the printed circuit board.

Abstract: A method for making an electronic device includes forming an interconnect layer stack on a rigid wafer substrate having a plurality of patterned electrical conductor layers, a dielectric layer between adjacent patterned electrical conductor layers, and at least one solder pad on an uppermost patterned electrical conductor layer. An LCP solder mask having at least one aperture therein alignable with the at least one solder pad is formed. The LCP solder mask and interconnect layer stack are aligned and laminated together. Solder is positioned in the at least one aperture. At least one circuit component is attached to the at least one solder pad using the solder.

Abstract: The present invention relates to a circuit board. The circuit board includes: a first path is routed on a first layer of the circuit board for transferring a first signal; a second path is routed on a second layer of the circuit board for transferring a second signal; a third path is routed on third layer of the circuit board; a first via is coupled to the first and third paths, and the first via is removed when the second signal is transferred by the second path; a second via is coupled to the second and third paths, and the second via is removed when the first signal is transferred by the first path.

Abstract: The present invention provides a printed circuit board including: a circuit pattern formed on a first insulating layer; a via pad disposed on the first insulating layer by being spaced apart from the circuit pattern, formed on a lower surface, where a via hole is formed, to have a cross section larger than that of the via hole, and having concavo-convex patterns; a second insulating layer formed on the via pad where the via hole is not formed and on the circuit pattern; and a copper foil layer formed on the second insulating layer and the via hole, and a method of manufacturing the same.

Abstract: A device-embedded flexible printed circuit board (FPCB) and a method of manufacturing the device-embedded FPCB are provided. The device-embedded FPCB includes: a first conductive layer; a first insulating layer which is disposed on the first conductive layer and includes at least one bump hole and at least one groove; a first plating layer which is formed in the at least one groove of the first insulating layer; and a device which includes at least one bump which is inserted into the at least one bump hole to be connected to the first conductive layer.

Abstract: The present disclosure relates to assessing coverage of a connection joint, such as a solder joint, between a device and a printed circuit board (PCB). In accordance with various embodiments, a PCB includes a conductive thermal pad adapted to be electrically and mechanically connected to an exposed pad of a component by an intervening connection joint to establish a thermal path to dissipate thermal energy from the component. An isolated test via that extends through the conductive thermal pad in non-contacting relation thereto, the test via adapted to mechanically and electrically contact said intervening connection joint. A coverage characteristic of the intervening connection joint can be determined in relation to application of an electrical signal to the test via.