With Solder Patents (Class 174/263)
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Patent number: 8134078Abstract: A plurality of first output terminals is provided along one side of a circuit element, and a plurality of input terminals and a plurality of second output terminals are provided adjacently along the other opposite side thereof. Leads include a first output lead extending from the first output terminal to an output connection electrode, and a second output lead extending from the second output terminal to the output connection electrode. The second output lead is extended from the other side of the circuit element to one side of the circuit element through a surface of a flexible wiring cable opposite the circuit element and further extended in parallel with the first output lead and connected to the output connection electrode.Type: GrantFiled: February 26, 2008Date of Patent: March 13, 2012Assignee: Brother Kogyo Kabushiki KaishaInventor: Tomoyuki Kubo
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Patent number: 8134083Abstract: A circuit carrier having a metal support layer, at least some portions of which are covered by a dielectric layer, the dielectric layer having a plurality of pores, with the pores being sealed by glass at least on the opposite side of the dielectric layer to the support layer.Type: GrantFiled: December 3, 2008Date of Patent: March 13, 2012Assignee: AB Mikroelektronik Gesselschaft mit beschrankter HaftungInventor: Bernd Haegele
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Patent number: 8125790Abstract: The invention discloses design concepts and means and methods that can be used for enhancing the reliability and extending the operating life of electronic devices, and assemblies incorporating such devices, and substrates and/or PCBs, especially if such assemblies are exposed to severe environmental conditions such as thermal cycling or power cycling. The main thrust of the invention is to provide flexible joints, such as columns, between the attached components, and preferably to orient such joints, so that they would present their softest bending direction towards the thermal center or fixation point of the assemblies. Joints with rectangular or elongated cross-section are preferred, and they should be oriented so that the wide face of each joint would be facing the thermal center, perpendicular to the thermal deformation ray emanating from the thermal center towards the center of each respective joint. The concepts apply equally to leadless packages as well as to leaded packages.Type: GrantFiled: August 24, 2008Date of Patent: February 28, 2012Inventor: Gabe Cherian
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Patent number: 8110753Abstract: A circuit board assembly includes: a circuit board having opposite first and second surfaces and formed with a first through-hole defined by a hole-defining wall that extends between and that terminates at the first and second surfaces and that cooperates with the first and second surfaces to define first and second turns, respectively, the circuit board further having an abutting wall that extends between and that terminates at the first and second surfaces and that cooperates with the second surface to define a third turn; and an electric wire having a fixed end that is soldered to the circuit board, extending through the first through-hole, and passing over the first, second and third turns of the circuit board so as to form an inflection region between the first and second turns.Type: GrantFiled: April 10, 2008Date of Patent: February 7, 2012Assignee: Universal Scientific Industrial Co., Ltd.Inventors: Wei-Cheng Chen, Cheng-Chao Liao
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Publication number: 20120024593Abstract: A printed circuit board unit includes a first substrate, a second substrate, and a spacer. The second substrate is coupled to the first substrate via a solder material. The second substrate has different coefficient of thermal expansion from the first substrate. The spacer is disposed between the first substrate and the second substrate. The spacer is formed of a thermally-expandable material and a thermosetting material. The thermosetting material has a curing temperature higher than a melting point of the solder material.Type: ApplicationFiled: July 19, 2011Publication date: February 2, 2012Applicant: FUJITSU LIMITEDInventor: Manabu Watanabe
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Patent number: 8106302Abstract: The present invention provides a circuit board of a communication product and a manufacturing method thereof. The circuit board comprises a main body of a circuit board and an isolation cover. A surface of the main body of the circuit board has a power transistor, an insulating layer, a plurality of first openings disposed at intervals on the insulating layer and around the power transistor, and a plurality of soldering portions exposed from the first openings respectively. The isolation cover comprises a cover body and a plurality of second openings equidistantly opened on a lateral side of the cover body. The isolation cover is disposed on the surface of the main body of the circuit board, and is soldered to the soldering portions through a local spot soldering process.Type: GrantFiled: December 22, 2008Date of Patent: January 31, 2012Assignee: Askey Computer Corp.Inventors: Kuo-Ching Chen, Chung-Shao Huang, Ching-Feng Hsieh, Jen-Huan Yu, Cheng-Wen Dai
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Patent number: 8102057Abstract: Provided is an electrically conductive via for reducing flux residue. The via has a first aperture having a first diameter size. The via further has a second aperture having a second diameter size. A chamber is disposed between the first aperture and the second aperture, the chamber having a third diameter size. At least one of the diameters being of a different dimension than the other two. In addition, the via may also provide improved test point access in addition to reducing flux residue.Type: GrantFiled: December 27, 2006Date of Patent: January 24, 2012Assignee: Hewlett-Packard Development Company, L.P.Inventors: Alexander Leon, Rosa Reinosa, Michael David Carothers, Glen Griffiths
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Patent number: 8097815Abstract: The invention provides a printed circuit board capable of mounting BGA or other IC package of narrow terminal interval by using through-holes of conventional size. On one principal surface of printed circuit board (1), soldering lands (2a), (2b), (2c), and (2d) for connecting solder balls are disposed in lattice. Central point (B) of through-hole (3) is set eccentric to the side of soldering land (2a) at the same potential as through-hole (3), remote from intersection (A) formed by diagonal line (200ab) linking soldering lands (2a) and (2b) and diagonal line (200cd) linking soldering lands (2c) and (2d).Type: GrantFiled: December 2, 2005Date of Patent: January 17, 2012Assignee: Panasonic CorporationInventor: Masaki Watanabe
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Patent number: 8089007Abstract: A printed circuit board includes a reference layer, at least one first hole defined in the reference layer and adjacent from a first pin in a first column of pins of an electronic component, and at least one second hole defined in the reference layer and adjacent from a second pin of the electronic component. The at least one second hole is defined in the reference layer and opposite to the at least one first hole. The second pin is in a neighboring second column of pins from the first column of pins. A diameter of the at least one first hole is greater than a diameter of the at least one second hole such that a difference in current flowing through the first pin and the second pin is reduced.Type: GrantFiled: December 10, 2008Date of Patent: January 3, 2012Assignee: Hon Hai Precision Industry Co., Ltd.Inventors: Ying-Tso Lai, Tsung-Sheng Huang, Shou-Kuo Hsu
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Patent number: 8084694Abstract: An electrical contact device comprising a first contact assemblage having multiple contact pads disposed in a row which are allocated to different connection types, and having a second contact assemblage having multiple contact pads disposed in a row in accordance with a predetermined sequence, which are allocated to different connection types and having bonding wire connections that electrically connect at least some of the contact pads of the first contact assemblage to contact pads of the second contact assemblage.Type: GrantFiled: July 25, 2006Date of Patent: December 27, 2011Assignee: Robert Bosch GmbHInventors: Juergen Stegmaier, Markus Ledermann
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Publication number: 20110308847Abstract: The creation of a circuit board which contains electrical interconnections between the circuit board traces and electronic devices mounted on the circuit board where the circuit board assembly can be operated at temperatures of 600° C. or greater. This invention allows for solder connections to be formed using solder paste or high-temperature.Type: ApplicationFiled: June 21, 2010Publication date: December 22, 2011Inventor: Randy Allen Normann
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Publication number: 20110304998Abstract: In accordance with an embodiment, a substrate layout comprises a ground plane of a first power loop on a layer of a substrate, a first trace rail on the layer extending along a first periphery of the ground plane, and a first perpendicular trace coupled to the first trace rail. The ground plane is between the first trace rail and a die area, and the first perpendicular trace extends perpendicularly from the first trace rail. The first trace rail and the first perpendicular trace are components of a second power loop.Type: ApplicationFiled: June 11, 2010Publication date: December 15, 2011Applicants: Global Unichip Corp., Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chin-Sung Lin, Li-Hua Lin, Yu-Yu Lin
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Patent number: 8077472Abstract: A printed circuit board of the present disclosure includes a main body, a tin layer, and a solder mask. The main body defines a through hole configured for being connected to a grounding component. The tin layer is formed on a surface of the main body around the through hole. The tin layer contacts the grounding component. The solder mask is formed between a periphery of the through hole and the tin layer. The solder mask is configured to prevent tin cream of the tin layer from flowing into the through hole.Type: GrantFiled: September 15, 2008Date of Patent: December 13, 2011Assignee: Hon Hai Precision Industry Co., Ltd.Inventor: Shu-Tzu Liu
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Publication number: 20110297433Abstract: A method of forming solder bumps on electrodes of a circuit board without producing bridging using a solder transfer sheet which does not require alignment includes superposing a circuit board and a solder transfer sheet having a solder layer adhered to at least one side of a supporting substrate, performing heating under pressure to a temperature lower than the solidus temperature of the solder to selectively perform solid phase diffusion bonding of the solder layer to electrodes, and peeling the transfer sheet from the circuit board. The solder layer is in the form of a continuous solder coating or in the form of a monoparticle layer of solder particles which are adhered to the supporting substrate by an adhesive layer.Type: ApplicationFiled: February 15, 2010Publication date: December 8, 2011Applicant: Senju Metal Industry Co., Ltd.Inventors: Takeo Kuramoto, Kaichi Tsuruta, Takeo Saitou
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Patent number: 8067698Abstract: On a printed-wiring board 1-1, a conductor layer 2 is laminated to both the top surface and the bottom surface of a substrate core 7 so as to pattern the substrate core, and a solder resist 4 is laminated to the substrate core. The solder resist 4 laminated to the top surface of the printed-wiring board 1-1 forms a raised portion 40 in a semiconductor chip mounting area such that the thickness of the raised portion is greater than the thickness of the solder resist 4 laminated to areas other than the semiconductor chip mounting area, so that the surface of the semiconductor chip mounting area is flat.Type: GrantFiled: December 17, 2008Date of Patent: November 29, 2011Assignee: Panasonic CorporationInventors: Hiroyuki Tanaka, Hiroaki Suzuki
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Patent number: 8058561Abstract: A manufacturing method of a circuit board is provided. A metal core is provided. A conductive layer is formed on each of some carriers. The carriers and dielectric layers are laminated at both sides of the metal core to form a stacked structure. Each of the dielectric layers is located between the corresponding carrier and the metal core, and a portion of the conductive layer is embedded in the corresponding dielectric layer. Then, the carriers are removed. A blind via and/or a through via are/is formed in the stacked structure to connect the corresponding conductive layer and the metal core and/or connect the conductive layers at both sides of the metal core, wherein the through via penetrates the metal core. The conductive layer on a surface of the dielectric layer is removed.Type: GrantFiled: August 18, 2008Date of Patent: November 15, 2011Assignee: Unimicron Technology Corp.Inventors: Chun-Chien Chen, Tsung-Yuan Chen
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Patent number: 8059420Abstract: A surface mountable device includes a ceramic substrate including a first principal surface, a second principal surface, and a side surface connecting the first principal surface to the second principal surface, a terminal electrode disposed on the first principal surface, and a first conductor for appearance inspection extending continuously from the terminal electrode to the side surface and having a width smaller than the width of the terminal electrode.Type: GrantFiled: July 16, 2004Date of Patent: November 15, 2011Assignee: Murata Manufacturing Co., Ltd.Inventor: Yoshihiko Nishizawa
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Patent number: 8059424Abstract: An electronic board including an area forming a BGA type electronic component backing, and an electric heating resistor which supplies an amount of heat for soldering the component onto the plate is disclosed. The board includes a plurality of conductive layers alternating with electrically insulating layers, the resistor forming one of the conductive layers immediately underlying the surface layer. The board may also include a thermal drain. A facility for implementing the method is also disclosed. It allows for an electronic board to be repaired through replacing defective members without risking to unsolder or to damage adjacent members.Type: GrantFiled: January 30, 2008Date of Patent: November 15, 2011Assignee: Hispano SuizaInventors: Bernard Glever, Daniel Goux, Robert Poirier
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Publication number: 20110253430Abstract: A micro pin hybrid interconnect array includes a crystal anode array and a ceramic substrate. The array and substrate are joined together using an interconnect geometry having a large aspect ratio of height to width. The joint affixing the interconnect to the crystal anode array is devoid of solder.Type: ApplicationFiled: April 19, 2010Publication date: October 20, 2011Applicant: GENERAL ELECTRIC COMPANYInventors: Charles Gerard Woychik, John Eric Tkaczyk, Brian David Yanoff, Tan Zhang
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Patent number: 8039761Abstract: Disclosed is a printed circuit board having a flow preventing dam and a manufacturing method thereof. The printed circuit board includes a base substrate having a solder pad, a solder bump formed on the solder pad of the base substrate, and a flow preventing dam formed on a peripheral area of the base substrate using a dry film resist. The flow preventing dam can prevent the outflow of an underfill solution and can be simply formed.Type: GrantFiled: February 27, 2009Date of Patent: October 18, 2011Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Jin Won Choi, Seung Wan Kim
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Publication number: 20110247872Abstract: The present subject matter relates to the field of fabricating microelectronic devices. In at least one embodiment, the present subject matter relates to forming an interconnect that has a portion thereof which becomes debonded from the microelectronic device during cooling after attachment to an external device. The debonded portion allows the interconnect to flex and absorb stress.Type: ApplicationFiled: April 8, 2010Publication date: October 13, 2011Inventors: Qing Ma, Jun He, Patrick Morrow, Paul B. Fischer, Sridhar Balakrishnan, Satish Radhakrishnan, Tatyana Tanya Andryushchenko, Guanghai Xu
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Patent number: 8030578Abstract: The present invention is an electrode 10 so provided as to be soldered to an electronic component 12 and, when the electronic component 12 is mounted on a substrate 13, soldered to the substrate 13. The electrode 10 includes a column-like electrode body 11 soldered to the electronic component 12 and to the substrate 13. The electrode has grooves as an air discharging device discharging the air 15a in air voids 15 generated within the solder 14 between joint surfaces 11a, 11b of the electrode body 11 and the electronic component 12 or the substrate 13 when the electrode body 11 is soldered to the electronic component 12 or the substrate 13.Type: GrantFiled: August 1, 2006Date of Patent: October 4, 2011Assignee: Fujitsu LimitedInventor: Yoshiyuki Hiroshima
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Publication number: 20110237091Abstract: An electrical connector assembly includes an electrical connector having a mounting face and signal terminals extending from the mounting face. The electrical connector assembly also includes a circuit board having an upper surface and a lower surface with vias extending at least partially through the circuit board along parallel via axes. The vias are at least partially filled with conductive material to create signal columns, wherein the signal terminals are set in corresponding signal columns. The signal terminals are electrically connected to the signal columns.Type: ApplicationFiled: March 23, 2010Publication date: September 29, 2011Applicant: TYCO ELECTRONICS CORPORATIONInventor: CHAD WILLIAM MORGAN
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Publication number: 20110226519Abstract: An electric connection structure and a method for fabricating the same are provided. The present invention provides a fixing thread fixed to a substrate and disposed on an upper surface of the substrate. The fixing thread is fixed to the substrate by shuttling between, binding, or penetrating through the upper surface and the bottom surface of the substrate. And then, a bare end of a signal line is fixed to the upper surface of the substrate by welding a solder thereby. When the solder is cooled down to solidify, the fixing thread generates a pull force applied on the solder pulling the solder toward the upper surface of the substrate.Type: ApplicationFiled: March 18, 2010Publication date: September 22, 2011Inventors: Wei-Chun Yang, Pi Hsi Cheng, Chun Yang Li
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Publication number: 20110222256Abstract: Various circuit boards and methods of manufacturing using the same are disclosed. In one aspect, a method of manufacturing is provided that includes applying a solder mask to a side of a circuit board and forming at least one opening in the solder mask leading to the side. An underfill is placed on the solder mask so that a portion thereof projects into the at least one opening.Type: ApplicationFiled: March 10, 2010Publication date: September 15, 2011Inventor: Roden R. Topacio
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Publication number: 20110222224Abstract: A multi layer interconnecting substrate has at least two spaced apart metal layers with a conductive pad on each one of the metal layers. Two different types of insulating layers are placed between the metal layers. The placement is such that one of the two different types of insulating layers is placed between the conductive pads and the other type of insulating layer is placed between the two spaced apart metal layers.Type: ApplicationFiled: March 9, 2010Publication date: September 15, 2011Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Kevin Bills, Mahesh Bohra, Jinwoo Choi, Tae Hong Kim, Rohan Mandrekar
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Publication number: 20110216481Abstract: Apparatus, systems and methods for forming a structure that includes a metal and a composite material are disclosed. According to one aspect, a layer stack includes a metal layer with a first surface, the first surface including at least one protruding feature. The layer stack also includes a non-metal layer molded to the first surface of the metal layer, wherein the non-metal layer is molded over and/or around the at least one protruding feature.Type: ApplicationFiled: March 2, 2010Publication date: September 8, 2011Inventor: Stephen Brian Lynch
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Patent number: 8013254Abstract: The present disclosure provides a printed circuit board (PCB) comprising a first ground layer extended in one direction a first dielectric layer laminated on the first ground layer and extended in the same direction as that of the first ground layer; a signal transmission line laminated on the first dielectric layer and extended in the same direction as that of the first dielectric layer; and a plurality of first ground patterns formed by etching a surface of the first ground layer in an axial direction thereof at a predetermined interval in a line, wherein the plurality of first ground patterns expose the first dielectric layer.Type: GrantFiled: November 21, 2008Date of Patent: September 6, 2011Assignee: Gigalane Co. Ltd.Inventors: Yong Goo Lee, Kyoung il Kang
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Patent number: 8004848Abstract: Provided are a high reliability stack module fabricated at low cost by using simplified processes, a card using the stack module, and a system using the stack module. In the stack module, unit substrates are stacked with respect to each other and each unit substrate includes a selection terminal. First selection lines are electrically connected to selection terminals of first unit substrates disposed in odd-number layers, pass through some of the unit substrates, and extend to a lowermost substrate of the unit substrates. Second selection lines are electrically connected to selection terminals of second unit substrates disposed in even-number layers, pass through some of the unit substrates, and extend to the lowermost substrate of the unit substrates. The selection terminal is disposed between the first selection lines and the second selection lines.Type: GrantFiled: May 23, 2008Date of Patent: August 23, 2011Assignee: Samsung Electronics Co., Ltd.Inventors: Seung-Duk Baek, Mitsuo Umemoto, Kang-Wook Lee
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Patent number: 8004850Abstract: The present system and method relate to an arrangement of electrical and/or mechanical components on a large, flexible foil-type conductor area and a method for producing such an arrangement. The flexible foil-type conductor can be easily and flexibly handled and is inexpensive and process-reliable.Type: GrantFiled: April 2, 2004Date of Patent: August 23, 2011Assignee: Conti Temic Microelectronic GmbHInventors: Turhan Büyükbas, Matthias Gramann, Klaus Scharrer, Peter Guth, Joachim Buhl, Dominik Klein, Bernhard Schuch, Tilo Liebl
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Patent number: 7999193Abstract: There is provided a wiring substrate. The wiring substrate includes: a core substrate formed of a conductive material and having a through hole therein; an insulating layer formed on first and second surfaces of the core substrate; wiring patterns formed on the first and second surfaces via the insulating layer; and a via formed in the through hole and electrically connected to the wiring patterns. The via includes: a conductor ball and a conductor portion. The conductor ball has a conductive surface and an insulating member covering the conductive surface. A portion of the conductive surface is exposed from the insulating member. The conductor portion is electrically connected to the exposed conductive surface and the wiring patterns. At least one of the insulating member and the insulating layer is interposed between the via and the core substrate.Type: GrantFiled: October 8, 2008Date of Patent: August 16, 2011Assignees: Shinko Electric Industries, Co., Ltd., Fujitsu LimitedInventors: Katsuya Fukase, Kishio Yokouchi, Hideaki Yoshimura
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Patent number: 7999380Abstract: A process for manufacturing a substrate with bumps is provided. First, a metallic substrate having a body and a plurality of conductive elements is provided. Next, a first dielectric layer is formed on the body, and the conductive elements are covered by the first dielectric layer. Then, a plurality of circuits and a plurality of contacts are formed on a surface of the first dielectric layer, and the contacts are electrically connected to the conductive elements. Next, a second dielectric layer is formed on the surface of the first dielectric layer, and the circuits are covered by the second dielectric layer. Finally, the body is patterned to form a plurality of bumps, and the bumps are electrically connected to the contacts by the conductive elements. The bumps are formed by etching the body, so the connection reliability between bumps and conductive elements is desirable, and the manufacturing cost is reduced.Type: GrantFiled: May 30, 2008Date of Patent: August 16, 2011Assignee: Advanced Semiconductor Engineering, Inc.Inventor: Chien-Hao Wang
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Patent number: 7995353Abstract: A circuit board includes four positioning pads placed on a surface of the circuit board, four positioning holes corresponding to the positioning pads, respectively, and a solder mask placed on the surface around the periphery of the positioning pads. An arc-shaped recess is defined at a side of each positioning pad near the corresponding positioning hole and the space between the edges of the positioning pad and the positioning hole ranges from 0.2 mm to 0.5 mm.Type: GrantFiled: August 12, 2008Date of Patent: August 9, 2011Assignee: Hon Hai Precision Industry Co., Ltd.Inventor: Chang-Te Liao
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Patent number: 7989707Abstract: A method of producing a chip embedded substrate is disclosed. This method comprises a first step of mounting a semiconductor chip on a first substrate on which a first wiring is formed; and a second step of joining the first substrate with a second substrate on which a second wiring is formed. In the second step, the semiconductor chip is encapsulated between the first substrate and the second substrate and electrical connection is made between the first wiring and the second wiring so as to form multilayered wirings connected to the semiconductor chip.Type: GrantFiled: December 12, 2006Date of Patent: August 2, 2011Assignee: Shinko Electric Industries Co., Ltd.Inventors: Takaharu Yamano, Hajime Iizuka, Hideaki Sakaguchi, Toshio Kobayashi, Tadashi Arai, Tsuyoshi Kobayashi, Tetsuya Koyama, Kiyoaki Iida, Tomoaki Mashima, Koichi Tanaka, Yuji Kunimoto, Takashi Yanagisawa
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Publication number: 20110168437Abstract: A printed circuit board (PCB) includes a positive differential signal line including first and second segments, a negative differential signal line including third and fourth segments, first and second connecting elements soldered on opposite surfaces of the PCB. The first segment and the fourth segment are located in a first straight line which has a first permittivity. The third segment and the second segment are located in a second straight line which has a second permittivity different from the first permittivity. The first connecting element is connected between the first segment and the second segment. The second connecting element is connected between the third segment and the fourth segment.Type: ApplicationFiled: January 25, 2010Publication date: July 14, 2011Applicant: HON HAI PRECISION INDUSTRY CO., LTD.Inventors: YUNG-CHIEH CHEN, CHENG-HSIEN LEE, SHOU-KUO HSU
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Patent number: 7977583Abstract: A shielded cable interface module having cable receiving grooves extending laterally to an edge of the board, each including a center conductor groove, an insulator groove, and a shield groove. A center conductor via and a shield via extend through the board. A conductor plane on the cable termination side surrounds the cable receiving grooves. The conductor plane includes a non-conductor region within the conductor plane adjacent to each of the conductor center conductor grooves. Ground vias associated with the cable receiving grooves are spaced apart from and partially surround the center conductor via outside and adjacent to the non-conductor region, the ground vias extend through the printed circuit board from the cable termination side to the system interface side.Type: GrantFiled: December 21, 2007Date of Patent: July 12, 2011Assignee: Teradyne, Inc.Inventors: Roya Yaghmai, Frank B. Parrish, Steven Hauptman
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Publication number: 20110155450Abstract: According to one embodiment, a printed circuit board is provided. The printed circuit board includes a wiring board, an insertion mount device having lead terminals, and a flexible insulator. The wiring board has a first surface, a second surface on a side opposite the first surface, and through holes. The insertion mount device is mounted on the first surface of the wiring board such that the lead terminals are inserted into the through holes and are soldered to the through holes. At least one of the lead terminals has a distal end protruding out from a corresponding one of the through holes. The insulator provided on the second surface to cover the distal end of the at least one of the lead terminals.Type: ApplicationFiled: November 29, 2010Publication date: June 30, 2011Inventors: Daigo Suzuki, Terunari Kanou
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Patent number: 7952199Abstract: A circuit board and a semiconductor package having the same are provided. The circuit board comprises a base substrate having interconnections, and solder ball lands disposed on one surface of the base substrate. The solder ball lands respectively have land holes having different sizes. The land hole disposed at the center portion of the base substrate and the land hole disposed at the edge portion of the base substrate may have different sizes. For example, the sizes of the land holes may increase from the center portion of the base substrate to the edge portion thereof, and alternatively, the sizes of the land holes may decrease from the center portion of the base substrate to the edge portion thereof.Type: GrantFiled: January 8, 2010Date of Patent: May 31, 2011Assignee: Samsung Electronics Co., Ltd.Inventors: Sang-Gui Jo, Seung-Kon Mok, Han-Shin Youn
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Patent number: 7944710Abstract: The disclosure involves the efficient termination of a winding PCB of a planar inductive component to a main PCB, using relatively little space and providing a low-resistance connection. The disclosed methods are especially suitable for planar structures where several winding PCBs, and/or winding PCBs and a main PCB, are all enclosed by the magnetic path components. The methods allow for a winding PCB to simply rest on the main PCB, or other winding PCBs, without any clearance. The disclosure employs mating sets of conductive annular rings with an optional interlocking terminal pin that allows two PCBs to be fixedly coupled together, while preserving a minimum distance between the solder-mask layers of the two PCBs in order to prevent the formation of unwanted electrical connections between the two PCBs. Solder is used to ensure effective coupling in each assembly of mating annular rings and optional terminal pin.Type: GrantFiled: October 6, 2008Date of Patent: May 17, 2011Assignee: Battery-Biz Inc.Inventors: Victor Marten, Aakar Patel, Mark Vanstone
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Patent number: 7943862Abstract: A method and apparatus for filling a via with transparent material is presented, including the steps of providing a panel having a via, occluding the via with transparent material in a workable state so that a portion of the occluding material is internal to the via and a portion of the material is external to said via. The external and internal portions are separated so the transparent filler material, when set, forms a smooth and featureless surface. This causes the filled via to have a substantially even and uniform appearance over a wide range of viewing angles when lit.Type: GrantFiled: August 20, 2008Date of Patent: May 17, 2011Assignee: Electro Scientific Industries, Inc.Inventors: Glenn Simenson, William Antoni, Steven Cohen, Jeffery Howerton
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Publication number: 20110111609Abstract: A printed circuit board terminal includes a rectangular metal wire rod having a substantially rectangle cross-section. One longitudinal end portion of the printed circuit board terminal includes an insertion portion that is configured to be inserted into a through hole provided in a printed circuit board and soldered. A conducting metal plated layer is provided on an entire surface of the rectangular metal wire rod. One marginal portion of the insertion portion, which faces a long side direction of the rectangle cross-section, is removed to reduce a dimension in the long side direction corresponding to a width direction.Type: ApplicationFiled: October 28, 2010Publication date: May 12, 2011Applicant: SUMITOMO WIRING SYSTEMS, LTD.Inventor: Hideki GOTO
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Publication number: 20110100692Abstract: Various circuit boards and methods of making the same are disclosed. In one aspect, a method of manufacturing is provided that includes applying a solder mask to a first side of a first circuit board. The first side of the first circuit board includes a first conductor structure and a second conductor structure. A first opening is formed in the solder mask that extends to the first conductor structure. The first opening has a first area. A second opening is formed in the solder mask that extends to the second conductor structure and has a second area larger than the first area.Type: ApplicationFiled: November 2, 2009Publication date: May 5, 2011Inventors: Roden Topacio, Andrew Leung
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Patent number: 7935408Abstract: An electrical structure and method of forming. The electrical structure includes a first substrate, first dielectric layer, an underfill layer, and a second substrate. The first dielectric layer is formed over a top surface of the first substrate. The first dielectric layer includes a first opening extending through a top surface and a bottom surface of said first dielectric layer. The underfill layer is formed over the top surface of the first dielectric layer and within the first opening. The second substrate is formed over and in contact with the underfill layer.Type: GrantFiled: October 26, 2007Date of Patent: May 3, 2011Assignee: International Business Machines CorporationInventors: Timothy Harrison Daubenspeck, Jeffrey Peter Gambino, Christopher David Muzzy, Wolfgang Sauter
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Publication number: 20110088929Abstract: Disclosed is a metal structure of a multi-layer substrate, comprising a first metal layer and a dielectric layer. The first metal layer has an embedded base and a main body positioned on the embedded base. The base area of the embedded base is larger than the base area of the main body. After the dielectric layer covers the main body and the embedded base, the dielectric layer is opened at the specific position of the first metal layer for connecting the first metal layer with a second metal layer above the dielectric layer. When the metal structure is employed as a pad or a metal line of the flexible multi-layer substrate according to the present invention, the metal structure cannot easily be delaminated or separated from the contacted dielectric layer. Therefore, a higher reliability for the flexible multi-layer substrate can be achieved.Type: ApplicationFiled: July 4, 2010Publication date: April 21, 2011Applicant: PRINCO CORP.Inventor: CHIH-KUANG YANG
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Publication number: 20110088938Abstract: Disclosed are a printed circuit board including a core substrate including core circuit layers on both sides thereof, a first build-up layer formed on one side of the core substrate, a second build-up layer formed on the other side of the core substrate, and first and second protective layers formed on the first and second build-up layers, respectively, wherein the first build-up layer includes a trench circuit layer as an outermost circuit layer formed by a trench-forming technology, and the trench circuit layer is embedded in the first protective layer, and a method of manufacturing the printed circuit board. Thanks to the formation of the outermost circuit layer by the trench-forming technology, it is difficult to separate the outermost circuit layer from the outermost insulating layer.Type: ApplicationFiled: December 9, 2009Publication date: April 21, 2011Inventor: Young Gwan KO
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Patent number: 7929314Abstract: The present disclosure is directed at an apparatus for changing printed circuit board pad structure to increase solder volume and strength. The invention provides increased end row pad and lead size and utilizes a plurality of lead-to-pad and pad-to-lead conforming geometric structures to form a joint providing additional solder surface adhesion area.Type: GrantFiled: June 20, 2008Date of Patent: April 19, 2011Assignee: International Business Machines CorporationInventors: Arvind K. Sinha, Thomas S. Thompson
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Publication number: 20110080245Abstract: A multilayer circuit board includes a first dielectric layer, a second dielectric layer, a first conductor path, a second conductor path and a soldered joint. The first dielectric layer has a first side and a second side. The second dielectric layer has a first side and a second side, where the first side of the second dielectric layer facing towards the first side of the first dielectric layer. The first conductor path is disposed on the first side of the first dielectric layer. The second conductor path is disposed on the first side of the second dielectric layer. The soldered joint is disposed between the first dielectric layer and the second dielectric layer, where the soldered joint electrically connects the first conductor path to the second conductor path. The first dielectric layer extends continuously through an area surrounding the soldered joint.Type: ApplicationFiled: September 24, 2010Publication date: April 7, 2011Inventors: Tsuneo Suzuki, Rolf Dupper
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Patent number: 7911804Abstract: The present invention provides a circuit board and a method for manufacturing the circuit board, the circuit board and method allowing a further shorter connection distance between electrodes of a semiconductor device, and also allowing a sufficient thickness of a solder pre-coat in a soldering process. The circuit board comprises bonding pads for being connected with bumps of a semiconductor element, which act as connection terminals, the bonding pads being arrayed in parallel lines on a surface of the circuit board, and, on the adjacent parallel lines, the bonding pads being positioned to form a zigzag pattern along the parallel lines longitudinally.Type: GrantFiled: March 25, 2008Date of Patent: March 22, 2011Assignee: Sharp Kabushiki KaishaInventor: Atsushi Ono
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Patent number: 7911061Abstract: A semiconductor device includes a carrier, a chip including a first face having a contact area, where the chip is attached to the carrier such that the contact area faces away from the carrier, a copper connector configured for attachment to the contact area, and a solder material configured to couple the copper connector to the contact area.Type: GrantFiled: June 25, 2007Date of Patent: March 22, 2011Assignee: Infineon Technologies AGInventors: Manfred Schneegans, Markus Leicht, Stefan Wohlert, Edmund Riedl
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Patent number: 7910838Abstract: An intercoupling component is provided that electrically connects the device leads of an integrated circuit package to a substrate. The package includes external device leads, each device lead having a downwardly extending section proximate a side of the package body, and the intercoupling component includes an insulating support member. The support member includes a first surface including first electrical attachment sites, each configured for making an electrical connection with a corresponding one of the device leads of the package. The support member also includes an opposite second surface including second electrical attachment sites in electrical contact with the first electrical attachment sites, each of the second electrical attachment sites including a plurality of solder balls associated with each device lead. The plurality of solder balls are used to form an electrical connection between each surface mount pad on the substrate and the corresponding conductive pad of the intercoupling component.Type: GrantFiled: April 3, 2008Date of Patent: March 22, 2011Assignee: Advanced Interconnections Corp.Inventor: Glenn Goodman