Vent, Inlet Or Exit Patents (Class 174/522)
  • Patent number: 10686302
    Abstract: A power semiconductor module including a housing within which lies at least one semiconductor switching element. The housing includes a vent aperture that is selectively openable and closeable by a cooperating vent cover. The vent cover is held in an open position during normal operation of the power semiconductor module to open the vent aperture and provide ventilation for the or each semiconductor switching element within the housing.
    Type: Grant
    Filed: November 22, 2016
    Date of Patent: June 16, 2020
    Assignee: General Electric Technology GmbH
    Inventors: John Lewis Outram, Stephen David Butler
  • Patent number: 10371712
    Abstract: A robust and compact speed sensor assembly that includes a Hall effect sensor with protective circuitry in a compact housing that can be attached to the wheel of a motorcycle in the vicinity of the brake rotor to present the sensor Hall plate in a proper transverse-to-target orientation to detect passing targets, such as the brake rotor mounting bolts or magnets.
    Type: Grant
    Filed: December 14, 2015
    Date of Patent: August 6, 2019
    Assignee: Polaris Industries Inc.
    Inventors: Jonathan V. S. Boro, Geoffrey Wotton
  • Patent number: 10326103
    Abstract: A display device includes a first substrate having a display area and a non-display area around the display area, a seal pattern in the non-display area and offset from the display area, and one or more buffer patterns between the seal pattern and the display area and having a viscosity of 5000 cps to 50000 cps.
    Type: Grant
    Filed: December 6, 2017
    Date of Patent: June 18, 2019
    Assignee: Samsung Display Co., Ltd.
    Inventors: Min Jun Jo, Yong Seung Park, Ja Woon Lee, Jae Kyung Go, Chang Woo Shim, Hyun Min Hwang
  • Patent number: 10304615
    Abstract: A method of forming a power module located on a conductive substrate by providing power conversion circuitry. The method of providing the power conversion circuitry includes forming a magnetic device by placing a magnetic core proximate a conductive substrate with a surface thereof facing a conductive substrate, and placing a conductive clip proximate a surface of the magnetic core. The method of forming the magnetic device also includes electrically coupling ends of the conductive clip to the conductive substrate to cooperatively form a winding therewith about the magnetic core. The method of providing the power conversion circuitry also includes providing at least one switch on the conductive substrate. The method of forming the power module also includes depositing an encapsulant about the power conversion circuitry.
    Type: Grant
    Filed: March 20, 2014
    Date of Patent: May 28, 2019
    Assignee: Enpirion, Inc.
    Inventors: Ashraf W. Lotfi, Mathew A. Wilkowski, Trifon M. Liakopoulos, John D. Weld
  • Patent number: 10163816
    Abstract: Structures and formation methods of a chip package are provided. The chip package includes a substrate and a semiconductor die over a surface of the substrate. The chip package also includes a lid over the semiconductor die. The lid has a number of support structures bonded with the substrate, and the lid has one or more openings between two of the support structures.
    Type: Grant
    Filed: June 13, 2016
    Date of Patent: December 25, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Shu-Shen Yeh, Chin-Hua Wang, Kuang-Chun Lee, Po-Yao Lin, Shyue-Ter Leu, Shin-Puu Jeng
  • Patent number: 10032746
    Abstract: A device and method of manufacture is provided that utilize recessed regions along a package edge. For example, in an integrated fan-out package, the dielectric layers, e.g., the polymer layers, of the redistribution layers are removed along the scribe line such that after singulation the dielectric layers are recessed back from the edges of the die. The corner regions may be recessed further. The recessed regions may be triangular, rounded, or other shape. In some embodiments one or more of the corner regions may be recessed further relative to the remaining corner regions. The redistribution layers may be recessed along one or both of the front side redistribution layers and the backside redistribution layers.
    Type: Grant
    Filed: September 7, 2016
    Date of Patent: July 24, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventor: Hsien-Wei Chen
  • Patent number: 9778688
    Abstract: Embodiments of the present disclosure are directed towards an integrated circuit (IC) package. In embodiments, an integrated circuit (IC) package may include a flexible substrate. The flexible substrate may have a plurality of dies coupled therewith. The IC package may include a first encapsulation material, having a first rigidity, disposed on the flexible substrate to at least partially encapsulate each die of the plurality dies. The IC package may further include a second encapsulation material, having a second rigidity, disposed on the flexible substrate. In embodiments, the second rigidity and the first rigidity are different from one another. Other embodiments may be described and/or claimed.
    Type: Grant
    Filed: November 12, 2014
    Date of Patent: October 3, 2017
    Assignee: INTEL CORPORATION
    Inventors: Jiamiao Tang, Junfeng Zhao, Michael P. Skinner, Yong She, Jiun Hann Sir, Bok Eng Cheah, Shanggar Periaman, Kooi Chi Ooi, Yen Hsiang Chew
  • Patent number: 9678096
    Abstract: A wheel speed sensor capable of preventing moisture from infiltrating the inside and a wire harness that is connected to the wheel speed sensor, which has a configuration in which a waterproofing member mounted on electric wires that are connected to a Hall IC and a covering member that covers the waterproofing member are embedded in an outer jacket portion. The covering member is formed of a material easily fused to the outer jacket portion. A groove is formed in the outer circumferential face of the waterproofing member, a protrusion is formed on the inner circumferential surface of the covering member, and the waterproofing member is prevented from moving in the axial direction by engaging the groove and the protrusion.
    Type: Grant
    Filed: October 29, 2013
    Date of Patent: June 13, 2017
    Assignee: SUMITOMO WIRING SYSTEMS, LTD.
    Inventors: Toshinari Kobayashi, Kyungwoo Kim, Hironobu Yamamoto, Moriyuki Shimizu, Tomoya Suzuki
  • Patent number: 9595455
    Abstract: Integrated circuit (IC) modules and methods for manufacturing the IC modules are described. In an embodiment, an IC module includes a substrate with contact gaps on which an IC die is attached with electrical connections between the IC die and the substrate. The IC module further include an encapsulation that encloses the IC die and fills first portions of the contact gaps, where the first portions of the contact gaps are located within an area of the substrate defined by the encapsulation. Second portions of the contact gaps, which are located outside of the area of substrate defined by the encapsulation, are filled with a filling material.
    Type: Grant
    Filed: June 9, 2016
    Date of Patent: March 14, 2017
    Assignee: NXP B.V.
    Inventors: Bodin Kasemset, Peeradech Kunpukdee
  • Patent number: 9497868
    Abstract: An electronics housing assembly is provided. The assembly includes an electronics housing defining an internal cavity. The electronics housing defines an outer side, and the electronics housing having portions defining a vent hole therein. The vent hole extends through the outer side. A sealing element is disposed adjacent to the electronics housing and contacting the outer side. The sealing element covers the vent hole. A method for sealing an electronics housing assembly is also provided.
    Type: Grant
    Filed: June 6, 2014
    Date of Patent: November 15, 2016
    Assignee: Continental Automotive Systems, Inc.
    Inventors: Johnathan Guarneros Jones, Ravi Kiran Kothamasa
  • Patent number: 9446745
    Abstract: A sensor assembly for a vehicle electronic braking system including a housing, at least one linear sensor, the at least one sensor contained within the housing, the linear sensor adapted to measure the linear distance traveled of a brake pedal. The assembly further includes a rotary sensor, the rotary sensor also contained within the same housing, the rotary sensor adapted to measure rotary motion of a DC motor in an the electronic braking system. The rotary sensor and the at least one linear sensor each in communication with a brake control unit. The at least one linear sensor and the at least one rotary sensor is encapsulated, either together or separately. The at least one linear sensor is a Hall-effect sensor. A wake up switch circuit is integrated with at least one of the linear sensors to wake up the system when the driver depresses the brake pedal in the electronic braking system. The rotary sensor is an inductive sensor.
    Type: Grant
    Filed: September 10, 2014
    Date of Patent: September 20, 2016
    Assignee: KSR IP Holdings, LLC
    Inventors: Ryan W. Elliott, Dan O'Neill, Lingmin Shao, Shaun Matthew Fuller, Jim Hartford
  • Patent number: 9418920
    Abstract: An integrated circuit (IC) package includes a die pad and an IC die secured on the die pad. The IC die had outer edges aligned with outer edges of the die pad. An encapsulating material body surrounds the die pad and IC die. Leads extend outwardly from the encapsulating material body and are coupled to the IC die. Each lead has an upper surface coplanar with an upper surface of the IC die. The die pad has a lower surface exposed through the encapsulating material body, and has a thickness greater than a thickness of each of the plurality of leads.
    Type: Grant
    Filed: January 5, 2015
    Date of Patent: August 16, 2016
    Assignee: STMICROELECTRONICS PTE LTD
    Inventor: Wing Shenq Wong
  • Patent number: 9136210
    Abstract: An interposer includes a substrate includes a plurality of penetrating electrodes, and a wiring portion formed on the substrate, in which the wiring portion includes a wiring layer electrically connected to the penetrating electrodes and an insulating layer covering the wiring layer. The interposer includes a plurality of first UBM structures provided at a side opposite the substrate of the wiring portion, in which the first UBM structures are electrically connected to the wiring layer. The interposer includes a plurality of bumps provided at the side opposite the wiring portion of the substrate, in which the plurality of bumps is electrically connected to each of the penetrating electrodes via a plurality of second UBM structures.
    Type: Grant
    Filed: December 5, 2011
    Date of Patent: September 15, 2015
    Assignee: NEC CORPORATION
    Inventor: Tsutomu Takeda
  • Patent number: 9059144
    Abstract: A method for forming a molded die assembly includes attaching a first major surface of a semiconductor die onto a package substrate; attaching a heat spreader to a second major surface of the semiconductor die, wherein the second major surface is opposite the first major surface, and wherein the semiconductor die, package substrate, and heat spreader form a die assembly; conforming a die release film to a transfer mold; closing the transfer mold around the die assembly such that the die release film is compressed against the heat spreader and a cavity is formed around the die assembly; transferring a thermoset material into the cavity; and releasing the die assembly from the die release film and the transfer mold.
    Type: Grant
    Filed: February 23, 2012
    Date of Patent: June 16, 2015
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Leo M. Higgins, III, Burton J. Carpenter, Glenn G. Daves
  • Publication number: 20140196945
    Abstract: A terminal box includes a terminal box main body (M), a terminal plate (3) to which a lead wire (2) introduced in the terminal box main body (M) is coupled, and a fixed portion (4) that secures at least the terminal plate (3) to the terminal box main body (M). The terminal box includes a filler (7) that seals a peripheral area of the terminal plate (3). The terminal plate (3) includes an opening portion (3b) that serves as a filler supply port and an air vent port.
    Type: Application
    Filed: June 26, 2012
    Publication date: July 17, 2014
    Applicant: SHARP KABUSHIKI KAISHA
    Inventor: Shiro Kato
  • Patent number: 8610006
    Abstract: A lid for a micro-electro-mechanical device and a method for fabricating the same are provided. The lid includes a board with opposite first and second surfaces and a first conductor layer. The first surface has a first metal layer thereon. The first metal layer and the board have a recess formed therein. The recess has a bottom surface and a side surface adjacent thereto. The first conductor layer is formed on the first metal layer and the bottom and side surfaces of the recess. The shielding effect of the side surface of the board is enhanced because of the recess integral to the board, the homogeneous bottom and side surfaces of the recess, and the first conductor layer covering the first metal layer, the bottom and side surfaces of the recess.
    Type: Grant
    Filed: October 23, 2009
    Date of Patent: December 17, 2013
    Assignee: Unimicron Technology Corporation
    Inventors: Shih-Ping Hsu, Kun-Chen Tsai, Micallaef Ivan
  • Patent number: 8492662
    Abstract: Arc resistant enclosures for dry-type transformers. More particularly, transformer enclosures having one or more arc-resistant features, including arc channels, arc fault dampers, and arc fault plenums, and methods for providing same.
    Type: Grant
    Filed: February 28, 2011
    Date of Patent: July 23, 2013
    Assignee: ABB Inc.
    Inventors: Robert C. Ballard, Nathan T. Sigman, Edgar A. Wimmer, Jr., Rafael Gutierrez, Jr.
  • Patent number: 8436259
    Abstract: An electrical box described herein allows for separate wire connection areas for low voltage and line voltage wiring within a single box. The electrical box includes a voltage divider positioned within the box that divides the box into two distinct portions, thereby providing a low voltage wiring connection area that is separate from the line voltage wiring connection area. The electrical box also includes multiple knockouts, each covering an opening that provides a passageway from the interior of the box to the exterior of the box. At least one knockout and associated opening are positioned to provide access to the low voltage wiring connection area and another knockout and associate opening is positioned along to the box to provide access to the line voltage wiring connection area. The box provides an electrical junction for a luminaire, such as a downlight, or other electrical device.
    Type: Grant
    Filed: March 1, 2010
    Date of Patent: May 7, 2013
    Assignee: Cooper Technologies Company
    Inventors: Russell Bryant Green, Terence JaMal Clarke
  • Patent number: 8218297
    Abstract: An electronic circuit device includes a case and a cover between which a space is defined, electronic circuit parts arranged in the space, and a sealant to seal the electronic circuit parts. The case has a bottom face, a side wall, and an opening face opposing to the bottom face. The cover is located inside of the side wall so as to close the opening face of the case. The cover has a filling port through which the sealant is filled. The cover has a top face located approximately equal to an end face of the side wall, or adjacent to the bottom face relative to the end face of the side wall.
    Type: Grant
    Filed: September 22, 2009
    Date of Patent: July 10, 2012
    Assignee: Denso Corporation
    Inventors: Tadashi Nakamura, Takeo Tsuzuki
  • Patent number: 8179686
    Abstract: Including a wiring board having an electronic component mounted at least on a first surface, a resin applied at least between the electronic component and the wiring board, and a through-hole provided in a region corresponding to the mounting position of the electronic component in the wiring board, a protrusion is formed on the wiring board so as to overlap at least with the electronic component, around a region corresponding to the mounting position of the electronic component.
    Type: Grant
    Filed: October 28, 2008
    Date of Patent: May 15, 2012
    Assignee: Panasonic Corporation
    Inventors: Shigeaki Sakatani, Atsushi Yamaguchi, Koso Matsuno, Hidenori Miyakawa
  • Patent number: 8171623
    Abstract: A methodology for connecting device components with circuitry located at different levels and orientations relative to one another is described. First circuitry can be located on a multi-plane rigid circuit board where the multi-plane rigid circuit board can include at least one flexible member sharing a common substrate with the multi-plane rigid circuit board that extends from a body portion of the multi-plane rigid circuit board. The flexible member can include traces used to convey power and/or data and an interface coupled to the power and/or data traces. The flexible member can be deflected or twisted to connect first circuitry on the body portion of the multi-plane rigid circuit board to second circuitry associated with another device component.
    Type: Grant
    Filed: May 26, 2011
    Date of Patent: May 8, 2012
    Assignee: Apple Inc.
    Inventors: Stephen R. McClure, Joshua D. Banko, John P. Ternus
  • Patent number: 8168896
    Abstract: An electronic housing, which includes at least two housing parts, has at least one housing base, a housing cover, and at least one electronic connection in the form of a printed circuit board between electronic substrates disposed in the housing interior and components positioned outside the housing, with the electronic connection being fixed on the housing base. The housing cover has a filling port for a casting compound, and the filling port is closed by a label. A method for the production of such an electronic housing and the use thereof for transmission control of a motor vehicle, are also provided.
    Type: Grant
    Filed: February 21, 2008
    Date of Patent: May 1, 2012
    Assignee: Continental Automotive GmbH
    Inventors: Josef Loibl, Karl Smirra
  • Patent number: 8138417
    Abstract: The underground storage of operational electronic equipment utilizes a hermetically sealable container adapted for receiving electronic equipment, such as a computer hard drive. The electronic equipment is placed in the container and electrically connected via a seal maintaining feedthrough to a facility proximate the container. The hermetically sealable container is sealed up and then buried underground.
    Type: Grant
    Filed: March 24, 2009
    Date of Patent: March 20, 2012
    Inventor: Dana N. Leach
  • Patent number: 7999197
    Abstract: A method for making a dual sided electronic module. A substrate has a first surface that is substantially parallel to a second surface. The second surface forms a cavity extending into an interior portion of the substrate. The substrate has at least one through hole connecting the cavity to the first surface. A first component is mounted with respect to the first surface, and a second component is mounted at least partially within the cavity. An encapsulant is applied to the first surface and through the at least one through hole into the cavity about the second component.
    Type: Grant
    Filed: April 20, 2009
    Date of Patent: August 16, 2011
    Assignee: RF Micro Devices, Inc.
    Inventors: Brian D. Sawyer, Milind Shah, Thomas Scott Morris, Carl Hinshaw
  • Patent number: 7995334
    Abstract: A methodology for connecting device components with circuitry located at different levels and orientations relative to one another is described. First circuitry can be located on a multi-plane rigid circuit board where the multi-plane rigid circuit board can include at least one flexible member sharing a common substrate with the multi-plane rigid circuit board that extends from a body portion of the multi-plane rigid circuit board. The flexible member can include traces used to convey power and/or data and an interface coupled to the power and/or data traces. The flexible member can be deflected or twisted to connect first circuitry on the body portion of the multi-plane rigid circuit board to second circuitry associated with another device component.
    Type: Grant
    Filed: January 26, 2010
    Date of Patent: August 9, 2011
    Assignee: Apple Inc.
    Inventors: Stephen R. McClure, Joshua D. Banko, John P. Ternus
  • Patent number: 7897234
    Abstract: A potting compound for electronic components comprises a first composition of asphalt and sand and a second composition that attenuates the forces normally applied by the first composition when it is used alone. The force attenuator preferably comprises solvent-refined heavy paraffinic petroleum oil from about 0.1 to 20 wt % of the compound.
    Type: Grant
    Filed: January 15, 2003
    Date of Patent: March 1, 2011
    Assignee: OSRAM SYLVANIA Inc.
    Inventors: John H. Selverian, H. Steven Mackel, William D. Koenigsberg
  • Patent number: 7751194
    Abstract: Provided is a circuit device capable of increasing the packaging density and also suppressing the thermal interference between incorporated circuit elements. In a hybrid integrated circuit device, a first circuit board and a second circuit board are incorporated into a case member being arranged in a way that the first circuit board is overlaid with the second circuit board. A first circuit element is arranged on the upper face of the first circuit board and a second circuit element is arranged on the upper face of the second circuit board. In addition, inside the case member, a hollow portion (internal space) which is not filled with a sealing resin is provided, and this hollow portion communicates with the outside through a communicating opening, which is provided by partially opening the case member.
    Type: Grant
    Filed: September 26, 2008
    Date of Patent: July 6, 2010
    Assignees: Sanyo Electric Co., Ltd., Sanyo Semiconductor Co. Ltd.
    Inventors: Hideyuki Sakamoto, Hidefumi Saito, Yasuhiro Koike, Masao Tsukizawa
  • Patent number: 7336500
    Abstract: A demonstration tool for a programmable logic device is provided. The demonstration tool includes a circuit board partially disposed within a transparent block. A collar having an opening defined therein is disposed between the transparent clock and a base of the demonstration tool. The base is designed to enable access to a bottom portion of the circuit board that extends outside of the transparent block and the collar. The bottom portion of the circuit board includes connection ports to power and configure the programmable logic device. A method for embedding a printed circuit board into a housing is also provided.
    Type: Grant
    Filed: September 3, 2004
    Date of Patent: February 26, 2008
    Assignee: Altera Corporation
    Inventors: Marcus Negron, Michael Phipps
  • Patent number: 7208943
    Abstract: A robust, low cost, compact and highly accurate rotary position sensor is disclosed for measuring the relative angular position (within a range ?180°) of a housing or stator and a rotor. The housing carries a galvanomagnetic sensing element and is adapted for fixation to a relatively fixed portion of a host system. The rotor carrying a magnet is disposed for rotation about a fixed axis with respect to the stator and is interconnected to a relatively moving portion of the host system through intermediate linkage. The magnet is juxtaposed in substantially axial alignment with the galvanomagnetic sensing element for magnetic interaction therewith. The housing defines a cavity to receive potting material for encasing the galvanomagnetic sensing element and an adjacent buffer cavity interconnected by a weir, which diverts ant excess potting material into the buffer cavity.
    Type: Grant
    Filed: June 3, 2005
    Date of Patent: April 24, 2007
    Assignee: Delphi Technologies, Inc.
    Inventors: Arquimedes Godoy, Daniel A. Martinez, Juan C. Lozano, Jose L Almaraz, Ruben Garcia, Jr.
  • Patent number: 7178235
    Abstract: A method for providing an encapsulated optoelectronic chip is provided. The optoelectronic chip is secured on a substrate. A translucent coating substance is then applied on said optoelectronic chip and the translucent coating substance is then polished away to enable an optical coupling.
    Type: Grant
    Filed: December 3, 2003
    Date of Patent: February 20, 2007
    Assignee: Reflex Photonics Inc.
    Inventors: David Robert Cameron Rolston, Tomasz Maj
  • Patent number: 7161092
    Abstract: The present invention provides in one embodiment, a system for encapsulating a substrate on a vehicle structure. The system includes the substrate, the vehicle structure and a package substrate. The substrate has a top portion and a bottom portion. The vehicle structure is operatively connected to the bottom portion of the substrate. The package substrate has a plurality of layers, where the package substrate is operatively connected to the top portion of the substrate. The package substrate conforms to a periphery area of the top portion of the substrate.
    Type: Grant
    Filed: April 15, 2002
    Date of Patent: January 9, 2007
    Assignee: Visteon Global Technologies, Inc.
    Inventor: Andrew Glovatsky
  • Patent number: 7109410
    Abstract: The present invention provides methods and devices for shielding an electronic component package. In one embodiment, an EMI shield is integrally formed within the package adjacent the die and grounded. The EMI shield may be a metallized shaped polymer layer and may be disposed fully within the package or it may extend out of the package.
    Type: Grant
    Filed: April 15, 2004
    Date of Patent: September 19, 2006
    Assignee: WaveZero, Inc.
    Inventors: Rocky R. Arnold, John C. Zarganis, Fabrizio Montauti
  • Patent number: 6677669
    Abstract: A co-package semiconductor device including an outer clip in the form of a metal can includes also two semiconductor dies, at least one of which uses the outer clip as an electrical connector. An inner clip is used to dispose one of the dies within the outer clip. The inner clip may be insulated from the outer clip by an insulating layer.
    Type: Grant
    Filed: January 18, 2002
    Date of Patent: January 13, 2004
    Assignee: International Rectifier Corporation
    Inventor: Martin Standing
  • Patent number: 6667547
    Abstract: A lead frame for a high power semiconductor device die has three external lead conductors, the outer two of which are reentrantly bent outwardly from the center of the lead frame. When the lead frame is overmolded, the outer conductors are spaced from a central conductor by an increased creepage distance along the plastic surface of the housing. Further, the lead sequence of the exterior leads is gate, source, drain for a power MOSFET. The post area for wire bonding to the source post is enlarged to permit wire bonding with at least three bond wires. The external conductors can be downwardly bent to form a surface mount device. The cross-sectional area of the external conductors is substantially enlarged, although only a small enlargement of the circuit board hole is needed. The package outline has a long flat area centered over the main die area, with a tapered end surface which allows the package to pry open a mounting spring for surface mounting of the package.
    Type: Grant
    Filed: September 13, 2002
    Date of Patent: December 23, 2003
    Assignee: International Rectifier Corporation
    Inventors: Arthur Woodworth, Peter R. Ewer, Ken Teasdale
  • Patent number: 6150715
    Abstract: A semiconductor device of the present invention comprises a semiconductor pellet, a radiation plate mounted with the semiconductor pellet, a plurality of lead terminals electrically connected with the semiconductor pellet, and a resin member for encapsulating the above items. The resin member has a first surface and a second surface, and the radiation plate has a first portion exposed to the outside from the first surface of the resin member and a second portion exposed to the outside from the second surface of the resin member.
    Type: Grant
    Filed: July 28, 1998
    Date of Patent: November 21, 2000
    Assignee: NEC Corporation
    Inventors: Seiji Ichikawa, Takeshi Umemoto, Kazunari Sato, Kunihiko Tsubota, Yoshikazu Nishimura, Toshiaki Nishibe, Kazuhiro Tahara, Masato Suga, Toru Kitakoga, Tatsuya Miya, Keita Okahira
  • Patent number: 6147869
    Abstract: An Adaptable Planar Module (APM) provides a new packaging concept suitable for motor control and other functions. An insulated metal substrate (IMS) supports power semiconductor devices and is formed in an opening in a support base and extends at or below a bottom surface of a base to allow for thermal contact with a heatsink. A circuit board for supporting and interconnecting lower power devices is mounted above and spaced from the support base and has an opening therein which is located above the IMS. The circuit board has bonding pads which are electrically connected to the low power devices. Bonding wires provide an electrical connection between the bonding pad of the printed circuit board and the power devices on the IMS substrate. Integral or procured terminals are also provided for external connections. Additional circuit boards may also be provided in the module and arranged co-planar with or above the first circuit board.
    Type: Grant
    Filed: November 20, 1998
    Date of Patent: November 14, 2000
    Assignee: International Rectifier Corp.
    Inventor: Courtney Furnival
  • Patent number: 6144557
    Abstract: An electronics case, a method of manufacturing the same and a power module incorporating the case. In one embodiment, the case includes: (1) an enclosure including a metal substrate and a dielectric material located on inner surfaces of the enclosure that insulate the substrate from electronics components located within the enclosure, the enclosure having an aperture on a major surface thereof and (2) an electrically conductive pin, passing through the aperture and an interior of the enclosure to emerge from the enclosure at a point opposite the major surface, the pin functioning both as a heat sink mount for the case and a case ground pin for the substrate.
    Type: Grant
    Filed: April 9, 1999
    Date of Patent: November 7, 2000
    Assignee: Lucent Technologies, Inc.
    Inventors: Shiaw-Jong S. Chen, Roger J. Hooey
  • Patent number: 6140572
    Abstract: A transformer tank with detachable cabinet interface. The transformer tank has a metal front panel for attachment of an electrical cable. A one-piece enclosure of non-conductive, flame resistant material cooperates with the front panel to provide an enclosed cable compartment for the transformer tank. A cabinet interface of non-conductive, flame resistant material is mounted on the periphery of the front panel. The interface is comprised of strip material having a tongue and groove or Y-shape.
    Type: Grant
    Filed: May 26, 1999
    Date of Patent: October 31, 2000
    Assignee: ABB Power T&D Company Inc.
    Inventor: William James Book
  • Patent number: 6131270
    Abstract: An encapsulated transducer (10) includes an injection molded encapsulation (20) having front end (22) and back end (24). The encapsulation (20) is a monolith of cured moldable material ensconcing a sensing element or coil (90) proximate front end (22) and a portion of an information transmitting medium (120) emanating from back end (24). A component alignment preform (40) operatively couples sensing element (90) with information transmitting medium (120). A protective sleeve (150) is transfer molded over coil (90) and interlocked with preform (40) thereby forming a sleeved coil and cable assembly (170). This sleeved coil and cable assembly (170) is encapsulated by an injection molding process which provides the durable encapsulation (20).
    Type: Grant
    Filed: October 5, 1998
    Date of Patent: October 17, 2000
    Assignee: Bently Nevada Corporation
    Inventor: Dave Van Den Berg
  • Patent number: 6130383
    Abstract: A solder ball array package has a mould gate tape that is attached on top of a portion of the top surface of a leadless circuit carrying insulating substrate and on top of a portion of the top metallization pattern. The mould gate tape, which is optionally removable after completion of the moulding process, is such that it does not interfere with the design of the top side metallization pattern.
    Type: Grant
    Filed: May 24, 1996
    Date of Patent: October 10, 2000
    Assignee: SGS-Thomson Microelectronics, S.A.
    Inventor: Fran.cedilla.ois Lamourelle
  • Patent number: 6122822
    Abstract: A method for forming a plastic package of an electronic device that is substantially without void formation is disclosed. In the method, a lead finger which is to be encapsulated in a plastic package is first deformed into various configurations such that the mold flow pattern can be modified accordingly. For instance, the tip portion of the lead finger can be formed into a U-shaped or a V-shaped bend, can be tilted to a 45.degree. slope or can be formed with U-shaped or V-shaped notch in the lead finger such that plastic flow velocity may be increased where the flow channel has been enlarged. Numerous embodiments of the present invention novel method are available for achieving similarly desirable results.
    Type: Grant
    Filed: June 23, 1998
    Date of Patent: September 26, 2000
    Assignee: Vanguard International Semiconductor Corporation
    Inventor: Kuang-Ho Liao
  • Patent number: 6124546
    Abstract: A semiconductor integrated circuit chip package includes top and bottom interposers 2 and 4, a semiconductor die 14 attached to the top interposer 2, a wirebond 18 or a flipchip connector 52 connected between the die 14 and the top interposer 2, and a tab bond 22 providing an electrical connection from the wirebond 18 or the flipchip connector 52 to outside the bottom interposer 4. A method of making the chip package includes providing top and bottom interposers 2 and 4, attaching a semiconductor die 14 to the top interposer 2, providing a wirebond 18 or a flipchip connector 52 between the die 14 and the top interposer 2, providing a tab bond 22 between the top and bottom interposers 2 and 4, and providing an encapsulant 16 to fill the intermediate volume 40 between the top and bottom interposers 2 and 4.
    Type: Grant
    Filed: December 3, 1997
    Date of Patent: September 26, 2000
    Assignee: Advanced Micro Devices, Inc.
    Inventors: James Hayward, Quang Nguyen
  • Patent number: 6124547
    Abstract: The invention provides a tape carrier package. An integrated circuit element has a free edge that is not provided with electrodes. A flexible film defines a device hole that is smaller than the integrated circuit element and in which the electrodes of the integrated circuit element are disposed. A plurality of leads are provided on the flexible film and connected to the electrodes through the device hole. At least one flow control member is disposed between the integrated circuit element and the flexible film. The flow control member controls a flow of a resin along the free edge of the integrated circuit element.
    Type: Grant
    Filed: February 13, 1998
    Date of Patent: September 26, 2000
    Assignee: Seiko Epson Corporation
    Inventor: Yoshikazu Fujimori
  • Patent number: 6122172
    Abstract: In order to achieve better dissipation of the heat losses, a polymer stud grid array in proposed havingan injection-molded, three-dimensional substrate (S) composed of an electrically insulating polymer,polymer studs (PS) which are arranged over the area on the underneath of the substrate (S) and are integrally formed during injection molding,external connections which are formed on the polymer studs (PS) by an end surface which can be soldered,conductor runs which are formed at least on the underneath of the substrate (S) and connect the external connections to internal connections,at least one heat sink (WL) which is partially coated during the injection molding of the substrate (S), and havingat least one chip or wiring element (VE) which is arranged on the heat sink (WL) and whose connections are electrically conductively connected to the internal connections.The new configuration is suitable in particular for power components or power modules in a polymer stud grid array package.
    Type: Grant
    Filed: April 16, 1998
    Date of Patent: September 19, 2000
    Assignees: Siemens NV, Interuniversitair Micro-Electronica-Centrum VZW
    Inventors: Ann Dumoulin, Marcel Heerman, Jean Roggen, Eric Beyne, Rita van Hoof
  • Patent number: 6114627
    Abstract: An LOC die assembly is disclosed including a die dielectrically adhered to the underside of a lead frame. An underfill material is introduced between each lead finger and semiconductor die, extending from the bonding location of the die and the edge of the die, in order to prevent filler particles from lodging between the leads and the active surface of the die during transfer molding of a plastic encapsulant. The seal created by the underfill material reduces point stresses on the active surface of the die usually caused by the filler particles. The decreased flexure in the leads further enhances the locking of the leads in position with respect to the die.
    Type: Grant
    Filed: August 20, 1997
    Date of Patent: September 5, 2000
    Assignee: Micron Technology, Inc.
    Inventor: Walter L. Moden
  • Patent number: 6111199
    Abstract: An integrated circuit package includes a number of electrical conductors that are completely or at least partially surrounded by a gas instead of a solid material (having no cavities) used in the prior art. Such use of a gas reduces the dielectric constant in a region around each of the electrical conductors, as compared to the dielectric constant of a solid dielectric material. In one implementation, a number of leads are kept separated from a substrate by a number of electrically conductive support members attached to the substrate. Each lead is electrically coupled (e.g. by a bond wire) to a die pad on a die that is supported by the package in the normal manner. The leads are initially formed as portions of a lead frame (e.g. by etching or stamping), and are held separate from each other by the respective support members. The support members are electrically coupled (e.g. by traces and vias in the substrate) to terminals (e.g. pins, balls or lands) of the package.
    Type: Grant
    Filed: April 7, 1998
    Date of Patent: August 29, 2000
    Assignee: Integrated Device Technology, Inc.
    Inventors: Christopher P. Wyland, Richard L. Guilhamet
  • Patent number: 6111324
    Abstract: A carrier ring provides a stiffening function for assembling flexible circuits or semi-rigid circuits. The carrier ring is attached to a substrate adapted for attachment of a matrix of semiconductor dies. The carrier ring is provided with mold gates and mold vents for use with a transfer molding step to provide encapsulation for the semiconductor dies. Alignment and indexing marks on the carrier ring allows use of conventional assembly process flows in conventional assembly equipment. The height of the carrier ring also provides a means of providing integrated circuits with a predetermined thickness.
    Type: Grant
    Filed: February 5, 1998
    Date of Patent: August 29, 2000
    Assignee: ASAT, Limited
    Inventors: Robert P. Sheppard, Edward G. Combs
  • Patent number: 6111761
    Abstract: An electronic assembly (1) having at least one semiconductor die (2) with external electrodes (3) has a foldable electrically insulating substrate (4) supporting a plurality of conductive leads (5) connected and mounted to respective ones of the electrodes (3). A plurality of external connectors (11) supported by the substrate (4) are electrically coupled to respective ones of the leads (5). The substrate (4) is folded at least once into a folded position to form at least two opposite facing surfaces (8, 9) with an adhesive and the die (2) at least partially sandwiched therebetween. The adhesive bonding the substrate (4) to the die (2) maintains the substrate (4) in the folded position.
    Type: Grant
    Filed: August 23, 1999
    Date of Patent: August 29, 2000
    Assignee: Motorola, Inc.
    Inventors: Stefan Peana, Boon Hua How, Janto Tjandra
  • Patent number: 6101099
    Abstract: The present invention relates to a device and a method for electrical and mechanical connection of an electric high-power component (111) which transmits high-frequency electrical signals to conductors (120) on a circuit board (119). The component comprises connections (114) projecting over the circuit board and which are soldered to the conductors (120) on the circuit board (119) with a solder material (112) which essentially lacks grain growth. The component is subject to repeated temperature changes which leads to stresses on the connection between the connections (114) and the conductors (120). The length of the connections is selected depending on a predetermined threshold value for the highest acceptable attenuation which the high-frequency electrical signal is subject to when passing through the electrical high-power component via the connections. The connections can be shaped so that they comprise a bent part with a bending which is determined in dependence of said threshold value.
    Type: Grant
    Filed: December 18, 1997
    Date of Patent: August 8, 2000
    Assignee: Telefonaktiebolaget LM Ericsson
    Inventor: Christer Olsson
  • Patent number: 6097097
    Abstract: A face-down-bonded semiconductor device having: a semiconductor substrate having a semiconductor electric/electronic circuit formed on the surface of the semiconductor substrate, the circuit having contact terminals; wiring pillars made of conductive material and disposed on the contact terminals on the surface of the semiconductor substrate; and support pillars disposed at positions different from the contact terminals on the surface of the semiconductor substrate, the support pillars each having a top surface generally at the same height as the height of each of the wiring pillars. The face-down-bonded semiconductor device can provide a sufficient support force and prevent degradation of the electrical characteristics.
    Type: Grant
    Filed: August 20, 1997
    Date of Patent: August 1, 2000
    Assignee: Fujitsu Limited
    Inventor: Tatsuya Hirose