Vent, Inlet Or Exit Patents (Class 174/522)
  • Patent number: 6101099
    Abstract: The present invention relates to a device and a method for electrical and mechanical connection of an electric high-power component (111) which transmits high-frequency electrical signals to conductors (120) on a circuit board (119). The component comprises connections (114) projecting over the circuit board and which are soldered to the conductors (120) on the circuit board (119) with a solder material (112) which essentially lacks grain growth. The component is subject to repeated temperature changes which leads to stresses on the connection between the connections (114) and the conductors (120). The length of the connections is selected depending on a predetermined threshold value for the highest acceptable attenuation which the high-frequency electrical signal is subject to when passing through the electrical high-power component via the connections. The connections can be shaped so that they comprise a bent part with a bending which is determined in dependence of said threshold value.
    Type: Grant
    Filed: December 18, 1997
    Date of Patent: August 8, 2000
    Assignee: Telefonaktiebolaget LM Ericsson
    Inventor: Christer Olsson
  • Patent number: 6097097
    Abstract: A face-down-bonded semiconductor device having: a semiconductor substrate having a semiconductor electric/electronic circuit formed on the surface of the semiconductor substrate, the circuit having contact terminals; wiring pillars made of conductive material and disposed on the contact terminals on the surface of the semiconductor substrate; and support pillars disposed at positions different from the contact terminals on the surface of the semiconductor substrate, the support pillars each having a top surface generally at the same height as the height of each of the wiring pillars. The face-down-bonded semiconductor device can provide a sufficient support force and prevent degradation of the electrical characteristics.
    Type: Grant
    Filed: August 20, 1997
    Date of Patent: August 1, 2000
    Assignee: Fujitsu Limited
    Inventor: Tatsuya Hirose
  • Patent number: 6093889
    Abstract: A mounting socket for a semiconductor package has socket leads that contact the semiconductor package's external leads. The semiconductor package has a package body surrounding a semiconductor chip, as well as internal and external leads. The external leads are formed in an ingot shape and project outwardly from the package body, and are adapted to connect with the socket leads or external terminals. The external leads contact external walls of the package body, thereby preventing undesired bending or breaking of the leads when the package is handled. Fixing and reworking of the package in the socket is easy, since the semiconductor package is inserted into grooves in the socket. It is possible to stack-mount or side-by-side-mount the package, depending on the socket shape, thus improving socket density and making the arrangement suitable for miniaturization.
    Type: Grant
    Filed: December 19, 1997
    Date of Patent: July 25, 2000
    Assignee: Hyundai Electronics Industries Co., Ltd.
    Inventor: Jae Myoung Choi
  • Patent number: 6093957
    Abstract: A lead frame structure and semiconductor package using the same and fabrication method thereof is provided that decreases noise by providing prescribed impedances for leads of a lead frame. The lead frame structure for the semiconductor package includes a paddle, a plurality of leads regularly aligned outside the paddle, and upper and lower dielectric adhesive layers sandwiching the plurality of leads. Upper and lower dielectric layers are attached on an upper surface of the upper dielectric adhesive layer and a lower surface of the lower dielectric adhesive layer. Upper and lower metallic polar plates formed on an upper surface of the upper dielectric layer and a lower surface of the lower dielectric layer.
    Type: Grant
    Filed: April 14, 1998
    Date of Patent: July 25, 2000
    Assignee: LG Semicon Co., Ltd.
    Inventor: Oh-Kyong Kwon
  • Patent number: 6094354
    Abstract: A chip component mounting board includes a chip mounting portion and a first groove. A chip component is mounted on the chip mounting portion. The chip mounting portion has a connection pad electrically connected to the chip component. The first groove is formed in the chip mounting portion to extend from a center of the chip mounting portion to one side of the chip mounting portion while gradually increasing its width. A method of manufacturing a chip component mounting board is also disclosed.
    Type: Grant
    Filed: December 1, 1997
    Date of Patent: July 25, 2000
    Assignee: NEC Corporation
    Inventors: Toshiaki Nakajoh, Kenichi Tokuno
  • Patent number: 6072122
    Abstract: In a method for manufacturing an electronic apparatus, an electronic component is mounted on an organic substrate within its cavity. The electronic component is sealed by a concave molded resin enveloper filled into the cavity.
    Type: Grant
    Filed: March 11, 1998
    Date of Patent: June 6, 2000
    Assignee: NEC Corporation
    Inventor: Futoshi Hosoya
  • Patent number: 6066804
    Abstract: An electronic circuit package is provided in which a substrate accommodating chamber for accommodating a circuit substrate is formed in a case made of resin. The case has a plurality of terminals fixed thereto each having an internal connecting portion extending in parallel with the substrate. An electronic circuit on the circuit substrate is connected through a plurality of leads to the internal connecting portions. Substrate partitioning ribs for partitioning the internal connecting portions and the circuit substrate are integrally formed on the bottom surface of the substrate accommodating chamber. A terminal partitioning rib for partitioning adjacent internal connecting portions is also integrally formed on the bottom surface of the substrate accommodating chamber.
    Type: Grant
    Filed: September 29, 1998
    Date of Patent: May 23, 2000
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Kazuya Hamada, Koichi Okamura
  • Patent number: 6058602
    Abstract: A method for manufacturing a plastic encapsulated integrated circuit (IC) package has steps for placing a diamond substrate in a lower cavity of an encapsulation mold such that the diamond substrate in the finished package underlies the die attach pad and a portion of the leads in close proximity to each. Pins are provided in lower cavities of molds to support and/or position diamond substrates to lie close to both die attach pads and leads to facilitate efficient heat transfer from an operating IC, through the die attach pad, into and through the diamond substrate, and finally to the leads leading from the encapsulated package. Apparatus is disclosed for positioning and supporting diamond substrates, and combination heat slugs for the purpose are disclosed, having diamond substrates bonded to metal slugs.
    Type: Grant
    Filed: September 21, 1998
    Date of Patent: May 9, 2000
    Assignee: Integrated Packaging Assembly Corporation
    Inventor: Gerald K. Fehr
  • Patent number: 6058020
    Abstract: A component housing for surface mounting of a semiconductor component on a component-mounting surface of a printed circuit board. The component housing including a chip carrier made of an electrically insulating material and having an approximately planar chip carrier area, a semiconductor chip, preferably having an integrated electronic circuit, secured on the chip carrier area, and electrode terminals having a surface-mountable configuration. The electrode terminals penetrating through the chip carrier and electrically connected to the semiconductor chip. A distance between the component-mounting surface of the printed circuit board and outer delimiting areas of the chip carrier which face the component-mounting surface of the printed circuit board increases continuously from an edge region to a central region of the chip carrier.
    Type: Grant
    Filed: December 28, 1998
    Date of Patent: May 2, 2000
    Assignee: Siemens Aktiengesellschaft
    Inventors: Jurgen Winterer, Gottfried Beer, Bernd Stadler
  • Patent number: 6057381
    Abstract: A method is disclosed for preparing an electronic assembly using a reworkable underfill encapsulant in which the encapsulant is cured in situ from a curable composition comprising one or more mono-functional maleimide compounds, or one or more mono-functional vinyl compounds other than maleimide compounds, or a combination of maleimide and vinyl compounds, a curing initiator and optionally, one or more fillers or adhesion promoters.
    Type: Grant
    Filed: July 2, 1998
    Date of Patent: May 2, 2000
    Assignee: National Starch and Chemical Investment Holding Corporation
    Inventors: Bodan Ma, Quinn K. Tong, Chaodong Xiao
  • Patent number: 6051783
    Abstract: The electronic enclosure for an electronics assembly belonging to an electrotechnical apparatus. The enclosure having one open end situated at the top in a filling position, through which a fluid potting compound is filled and which is closed off by a plug after filling of the potting compound. In the electronic enclosure a spill tube is disposed, the top end of which is located in the filling position level with the desired filling height in the electronic enclosure and the bottom end of which is in communication with a catchment space for the spill quantity of the potting compound flowing into the spill tube.
    Type: Grant
    Filed: September 26, 1996
    Date of Patent: April 18, 2000
    Assignee: Endress + Hauser GmbH + Co.
    Inventors: Volker Dreyer, Thomas Werner
  • Patent number: 6051877
    Abstract: A thin-film semiconductor device comprising at least a semiconductor element and a wiring is disclosed. A thin film of a protective insulating material is formed on the lower surface of the semiconductor element, and a substrate is bonded on the lower surface of the thin film. A method for fabricating the thin-film semiconductor device is also disclosed, in which a thin-film semiconductor circuit is formed on a silicon-on-insulator wafer, the silicon substrate on the reverse side of the silicon-on-insulator wafer is etched off, a thin-film semiconductor chip is formed and attached to the substrate, and the thin-film semiconductor chip and the substrate are wired to each other by printing.
    Type: Grant
    Filed: July 3, 1997
    Date of Patent: April 18, 2000
    Assignee: Hitachi, Ltd.
    Inventors: Mitsuo Usami, Takashi Tase
  • Patent number: 6049971
    Abstract: A method for fabricating a lead frame that includes a platform attached thereto for mounting a chip. A base frame is provided for mounting chips of various sizes. The base frame includes connection leads extending toward a central portion, which is substantially of the size of the smallest chip to mount. Connection leads are cut-out about the central portion to form an opening corresponding to the size of the chip to be mounted. A platform is soldered to at least two support leads to form the lead frame.
    Type: Grant
    Filed: June 13, 1997
    Date of Patent: April 18, 2000
    Assignee: SGS-Thomson Microelectronics S.A.
    Inventor: Luc Petit
  • Patent number: 6049038
    Abstract: A sealing resin mixed with filler is used to seal a space between a flip-chip mounted semiconductor device and a printed circuit board. An integrated circuit chip joined to the printed circuit board by metal bumps, has the sealing resin interposed in the space between the chip and the board. The density of the filler in the sealing resin varies such that there is a relatively greater amount of filler at or near the integrated circuit chip. This allows the coefficient of thermal expansion of the resin layer adjacent the chip to better match the coefficient of thermal expansion of the silicon which makes up the chip.
    Type: Grant
    Filed: July 30, 1998
    Date of Patent: April 11, 2000
    Assignee: NEC Corporation
    Inventor: Motoji Suzuki
  • Patent number: 6043429
    Abstract: A flip chip and a flip chip package are shielded from alpha particles emitted by lead in the solder bumps used to form the electrical connection between the flip chip and a substrate. This is accomplished by coating the solder bumps with a layer of alpha particle absorbing material or by providing a suitable amount of alpha particle absorbing material in the underfill material between the flip chip and the substrate. Methods of forming the coating the solder bumps include electroless coating, as well as a method involving a) the deposition of a layer of thick resist in a pattern suitable for the formation of solder bumps; b) the deposition of a layer of alpha particle absorbing material; c) the deposition of a layer of solder; d) removal of excess solder and alpha particle absorbing material; and e) the removal of the thick resist layer.
    Type: Grant
    Filed: May 8, 1997
    Date of Patent: March 28, 2000
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Richard C. Blish, II, Frank Ruttenberg
  • Patent number: 6040526
    Abstract: A crash-survivable enclosure assembly (5) for protecting a data memory unit (45) used in vehicles. The crash-survivable enclosure assembly has an enclosure (10) which has an access opening (30) and an inner enclosure surface (22). A fixed position access panel support element (36), which has inner (73) and outer (74) support surfaces, extends inward from inner enclosure surface (22). Enclosure assembly (5) also has a removable access panel (50), which has a panel inner surface (51), positioned against outer support surface (74) of support element (36). The inner enclosure surface and the access panel inner surface form an inner cavity which is used to store the data memory unit. Enclosure assembly (5) has a retention device (60) which is used to secure access panel (50) to enclosure (10). Retention device (60) has a mechanical member, with a main surface mounted against the inner support surface of the support element. Extending from the main surface of the mechanical member is a fulcrum (62).
    Type: Grant
    Filed: April 2, 1998
    Date of Patent: March 21, 2000
    Assignee: AlliedSignal
    Inventor: Richard A. Olzak
  • Patent number: 6037652
    Abstract: A lead frame is provided that prevents breaks in bonding wires caused by thermal stress which is applied when mounting a resin semiconductor. A plating layer is applied to the surfaces of internal leads to which bonding wires are to be connected and an insulating tape is adhered the internal lead 1 tips and bonding balls, so as to prevent peeling between the internal leads 1 and the resin, thereby preventing breaking of a bonding wire cause by stress applied during mounting. Additionally, a semiconductor device which makes use of this lead frame structure is provided.
    Type: Grant
    Filed: May 29, 1997
    Date of Patent: March 14, 2000
    Assignee: NEC Corporation
    Inventor: Mitsuhiro Matsutomo
  • Patent number: 6031723
    Abstract: A multilayer circuit board or laminated circuit board includes an insulated mounting area for a surface mount package. The mounting area is provided in a recess or portion of the circuit board where the circuit board is only a single layer thick. The insulated mounting area is provided in a blind via in the multilayer circuit board. The insulating medium associated with the single layer provides a heat conductive yet highly electrically insulative mounting area for a heat sink. The heat sink may be mounted on a side opposite the electrical device. The heat sink may be a standard heat sink or a copper coil directly soldered to the circuit board. The heat sink mounting advantageously eliminates the need for bolts, nuts, brackets, and an additional insulating layer necessary to insulate power semiconductor components.
    Type: Grant
    Filed: August 18, 1994
    Date of Patent: February 29, 2000
    Assignee: Allen-Bradley Company, LLC
    Inventor: Christopher J. Wieloch
  • Patent number: 6030684
    Abstract: Electronic devices protected by an organic polymeric encapsulant and placed in a corrosive environment can have added protection by dispersing in the encapsulant particles of a solid buffer which tend to neutralize the effect of the corrosive agent. This approach is quite effective when strong acids are the corrosive agents, and when solid acid-base buffers are dispersed in the polymeric material. The encapsulant may be elastomeric, and silicone elastomers containing solid acid-base buffers are quite effective in protecting the underlying electronic device from corrosion by strong acids.
    Type: Grant
    Filed: June 20, 1997
    Date of Patent: February 29, 2000
    Assignee: Motorola, Inc.
    Inventors: Anthony J. Polak, Theresa L. Baker
  • Patent number: 6025562
    Abstract: An electronic equipment such as a proximity sensor. A groove for discharging air is formed at coil casing (7) arranged at a front surface of the proximity sensor. An opening (43) is formed at a clamp portion (9) holding a code (10) behind a metal casing (8). The proximity sensor (1) is held at a low pressure, and resin is supplied through the opening (43) at the clamp portion (9), whereby the casing can be filled with the resin in a short time.
    Type: Grant
    Filed: March 18, 1997
    Date of Patent: February 15, 2000
    Assignee: OMRON Corporation
    Inventors: Takeshi Shimizu, Hideo Uda, Giichi Konishi, Kyouji Kitamura, Kazuhiro Hayashi, Chikashi Niimi, Toshiki Kitani, Satoshi Noda
  • Patent number: 6025556
    Abstract: An electronic component includes a main element such as a thermistor having electrodes formed on its surfaces, and lead terminals are electrically connected to these electrodes. A resin coating covers the main element, and both the main element and the lead terminals, except their tip parts away from the main element, are covered with another resin coating of an electrically insulating and flexible resin material.
    Type: Grant
    Filed: May 9, 1997
    Date of Patent: February 15, 2000
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Tatsuya Yoshimura, Yoshiyuki Yamashita, Minoru Shimada
  • Patent number: 6004145
    Abstract: A cable-to-board arrangement configured to nondetachably couple wires of a cable to surface-mounted pads on a circuit board. The cable-to-board arrangement includes a first nonconductive housing and a flexible board having thereon a plurality of conductive traces. The conductive traces have first ends and second ends opposite the first ends with the first ends being electrically coupled to the wires. The first nonconductive housing encapsulates a first portion of the flexible board including the first ends. The cable-to-board arrangement further includes a plurality of conductive legs configured for coupling with the surface-mounted pads on the board. The plurality of conductive legs are electrically coupled to the second ends of the conductive traces. There is also included a second nonconductive housing encapsulating a second portion of the flexible board including the second ends of the conductive traces and a portion of the conductive legs.
    Type: Grant
    Filed: September 14, 1998
    Date of Patent: December 21, 1999
    Assignees: DiCon (S) PTE Ltd., DiCON Connectors, Inc., Focus Enhancements, Inc.
    Inventors: Steven Paul Gasparovic, Lee Hock Eng, Ng Lea Swee, Philip Earle Clark, Ronald K. Anderson, Alan Scott Gibbons
  • Patent number: 6002584
    Abstract: In a high-temperature protective arrangement for an electronic device, which as such generates heat, the electronic device is enclosed by a heat protective enclosure provided with gaps for permitting heat removal by air convection. The heat protective enclosure is coated with a material which is subject to swelling under the action of heat to a multiple of the thickness of the original coating whereby a heat-insulating layer is formed and the gaps are closed. Electronic components of the electronic device are disposed within a housing. The heat generated by the electronic components is passed to the housing which is surrounded at a spacing substantially on all sides by the heat protective enclosure.
    Type: Grant
    Filed: May 14, 1998
    Date of Patent: December 14, 1999
    Assignee: Bodenseewerk Geratetechnik GmbH
    Inventors: Helmut Messmer, Wolfgang Kummle
  • Patent number: 6002592
    Abstract: An semiconductor device and a method for manufacturing semiconductor devices which are easily made compact. A plurality of semiconductor chips having protrusion electrodes respectively provided on a plurality of electrodes formed on circuit surfaces are integrally sealed by an insulating material so as to cover the circuit surfaces while the circuit surfaces are nearly directed to the same direction and arranged in prescribed conditions, and to expose the respective protrusion electrodes; and insulating layers and wiring layers respectively electrically connected to the corresponding protrusion electrodes are alternately laminated on the insulating material so as to have the desired number of layers in the direction of thickness.
    Type: Grant
    Filed: December 8, 1997
    Date of Patent: December 14, 1999
    Assignee: Sony Corporation
    Inventors: Toshifumi Nakamura, Naoji Nada, Katsuhiro Yoneyama
  • Patent number: 5999413
    Abstract: A resin sealing type semiconductor device capable of making a resin burr hard to occur when formed by molds and of restraining cracks in solder, is actualized by providing a stepped portion on a resin sealing body for covering a circuit forming surface of a semiconductor chip, making leads exposed from this exposed surface and joining solder bumps to the leads.
    Type: Grant
    Filed: December 15, 1997
    Date of Patent: December 7, 1999
    Assignee: Oki Electric Industry Co., Ltd.
    Inventors: Shinji Ohuchi, Noritaka Anzai
  • Patent number: 5995374
    Abstract: A substrate unit is constituted by a printed substrate on which electronic parts such as a relay block is mounted, and at least printed circuit conductors and terminals in the printed substrate and relay block are buried in a sealing resin material hardened in a bag-like body of a thin resin film set in an injection mold, and the hardened sealing resin material is then released from the injection mold together with the bag-like body.
    Type: Grant
    Filed: April 23, 1998
    Date of Patent: November 30, 1999
    Assignee: Yazaki Corporation
    Inventors: Masataka Suzuki, Hiroyuki Ashiya, Yayoi Maki, Atsushi Masuda
  • Patent number: 5982623
    Abstract: A module is provided for a packaged IC designed to radiate heat by sealing the packaged IC. At least outer lead parts the packaged IC which are mounted on an electronic circuit board are sealed by a sealing material of a high thermal conductivity to form a sealing part.
    Type: Grant
    Filed: January 23, 1996
    Date of Patent: November 9, 1999
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Takahiro Matsuo, Yoshio Maruyama, Osamu Hikita, Shinji Kadoriku
  • Patent number: 5981873
    Abstract: A printed circuit board for a BGA semiconductor package provided at one corner thereof with a degating opening serving as a mold runner gate during a process of molding a resin seal adapted to protect the semiconductor chip and serving as a region for degating a surplus resin formed after the molding process and a method for molding a BGA semiconductor using the printed circuit board. The degating opening has an inverted triangular shape having curved lateral sides and a vertex, at which the lateral sides join together, disposed in a region for forming the resin seal, or an inverted trapezoidal shape having one end disposed in the resin seal region.
    Type: Grant
    Filed: June 25, 1997
    Date of Patent: November 9, 1999
    Assignees: Anam Semiconductor Inc., Amkor Technology, Inc.
    Inventor: Young Wook Heo
  • Patent number: 5973263
    Abstract: An encapsulation body for enclosing an electronic element is disclosed and which includes a first layer of a slow curing two-part epoxy which is in a flowable state; a second layer of material positioned outwardly of the first layer and which substantially retains the first layer of material on the electronic element while the first layer of material is in a flowable state; and a dam surrounding the electronic element, the first and second layers of material received within the dam.
    Type: Grant
    Filed: August 18, 1997
    Date of Patent: October 26, 1999
    Assignee: Micron Communications, Inc.
    Inventors: Mark E. Tuttle, Joseph P. Mousseau, Clay L. Cirino
  • Patent number: 5973599
    Abstract: A high temperature RFID tag is described which has a survival temperature in the range of approximately -40.degree. C. to 300.degree. C. and an operating temperature of approximately -20.degree. C. to 200.degree. C. The RFID tag comprises a housing comprising a first thermally resistant material and having a base and a top, and a circuit board substrate comprising a second thermally resistant material which is encapsulated within the housing.
    Type: Grant
    Filed: October 15, 1997
    Date of Patent: October 26, 1999
    Assignee: Escort Memory Systems
    Inventors: Mark Nicholson, Brian Monahan
  • Patent number: 5969293
    Abstract: A single gauge lead frame having a second support pad which is substantially a mirror image of a first support pad is disclosed. The second support pad is capable of being placed upon the first support pad. In this manner, the structural and thermally conductive advantages of a dual gauge lead frame is realized at a cost near a single gauge lead frame.
    Type: Grant
    Filed: July 18, 1997
    Date of Patent: October 19, 1999
    Assignee: National Semiconductor Corporation
    Inventor: Seshadri Vikram
  • Patent number: 5963028
    Abstract: A magnetic field sensor assembly has a magnet, a semiconductor sensor and a metal leadframe encapsulated in a plastic package to form a semiconductor integrated circuit. A metal leadframe has a die attach pad on which the sensor is secured and an assembly having one or more projections for securing the magnet in close proximity to the sensor. The leadframe is made from a metal having sufficient spring tension so that the assembly having the projections will secure the magnet. The sensor is adjacent to a ferromagnetic object and will detect a change in magnetic field caused by the ferromagnetic object. Only a thin layer of the plastic package covers the sensor thus reducing the distance between the sensor and the ferromagnetic object but still maintaining an air gap between the plastic package and the ferromagnetic object sufficient to allow passage of the ferromagnetic object.
    Type: Grant
    Filed: August 19, 1997
    Date of Patent: October 5, 1999
    Assignee: Allegro MicroSystems, Inc.
    Inventors: Raymond W Engel, Ravi Vig, Jay Gagnon J Gagnon
  • Patent number: 5962810
    Abstract: An integrated circuit package for EPROM, CCD, and other optical integrated circuit devices has a substrate base having metallized vias extending there through. An integrated circuit die is affixed to a first surface of the substrate, and is electrically connected to the metallized vias. An adhesive bead is applied onto the substrate around the die. The bead covers the side surfaces of the die, the periphery of the upper first surface of the die, and the bond wires. The bead and the upper first surface of the die form a cavity above the die. A layer of a transparent encapsulating material is deposited onto the die, within the cavity formed by the bead. The encapsulating material is hardened, and subsequently forms an exterior surface of the package. The transparent encapsulating material allows light of a selected frequency to illuminate the light sensitive circuitry of the die.
    Type: Grant
    Filed: September 9, 1997
    Date of Patent: October 5, 1999
    Assignee: Amkor Technology, Inc.
    Inventor: Thomas P. Glenn
  • Patent number: 5959247
    Abstract: An electronic circuit assembly includes a printed circuit board having a plurality of conductors formed thereon. An integrated circuit die is mounted directly on and bonded to the circuit board. A plurality of microleads extend between the integrated circuit die and conductors and are ultrasonically bonded to the die and conductors. A protective coating deposited on the circuit board encapsulates the circuit die and microleads. Methods for depositing the coating include flow and cure, immersion and plasma spray techniques.
    Type: Grant
    Filed: July 22, 1997
    Date of Patent: September 28, 1999
    Inventors: Joseph H. Armstrong, Mohan S. Misra, Anil K. Kapuria
  • Patent number: 5959842
    Abstract: A surface mount package for containing a board-mounted power supply, a method of manufacturing the same and a board-mounted power supply employing the package. In one embodiment, the package includes: (1) a plurality of leads having first ends and second, surface mount ends, (2) a dielectric lead frame that retains the plurality of leads in predetermined positions relative to one another such that at least some of the second, surface mount ends are co-planar, the first ends couplable to the board-mounted power supply, (3) a shell, coupled to the lead frame, that forms a portion of a periphery of the surface mount package and (4) potting material located between the lead frame and the shell.
    Type: Grant
    Filed: May 14, 1998
    Date of Patent: September 28, 1999
    Assignee: Lucent Technologies Inc.
    Inventors: Scott E. Leonard, Yi Teh Shih, William L. Woods, Jr.
  • Patent number: 5949655
    Abstract: A mounting for a flip chip integrated circuit device having a light sensitive cell is disclosed. The mounting includes an insulating substrate having an aperture between its first and second surfaces. A flip chip integrated circuit device is placed on the first surface of the substrate. A light sensitive cell of the integrated circuit device faces the aperture. Solder bumps on the integrated circuit are electrically connected to corresponding conductive metallizations on the first surface of the substrate. A transparent aperture cover is affixed to the second surface of the substrate with an adhesive bead. The aperture cover extends over the aperture, allowing light to be transmitted through the aperture cover to the light sensitive cell. The side surfaces of the aperture cover include features for locking the adhesive bead to the aperture cover.
    Type: Grant
    Filed: July 17, 1998
    Date of Patent: September 7, 1999
    Assignee: Amkor Technology, Inc.
    Inventor: Thomas P. Glenn
  • Patent number: 5941137
    Abstract: A controller for a motor vehicle with an automatic transmission is connected to sensors in the transmission and through a communications channel to an engine controller. A gear ratio is varied with actuators for actuating final control elements in the transmission. The transmission and the electronic transmission controller are constructed as an integrated complete system, which includes all of the mechanical, hydraulic and electronic transmission components. A plug forms a pressure and fluid-tight connection between the transmission and the transmission controller secured to a transmission housing.
    Type: Grant
    Filed: March 16, 1998
    Date of Patent: August 24, 1999
    Assignee: Siemens Aktiengesellschaft
    Inventors: Stefan Beer, Klaus Staerker
  • Patent number: 5915753
    Abstract: A method of producing a high-density wiring board for mounting comprises the steps of providing an electroconductive metallic film on the main surface thereof with a photosensitive resist layer, subjecting the photosensitive resist layer to selective exposure to light and development thereby forming holes for selectively exposing the surface of the electroconductive metallic foil in the photosensitive resist layer, depositing an electroconductive metal by plating on the exposed surface of the electroconductive metallic foil thereby forming electroconductive bumps thereon, peeling off the remainder of the photosensitive resist layer, superposing an insulating polymer sheet on the electroconductive bump forming surface, pressing the resultant superposed layers so that the electroconductive bumps to pierce the polymer sheet in the direction of thickness thereof and allowing the leading end parts of the electroconductive bumps to emerge from the polymer sheet and give rise to connecting terminal parts, and select
    Type: Grant
    Filed: January 16, 1998
    Date of Patent: June 29, 1999
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tomohisa Motomura, Osamu Shimada, Yoshitaka Fukuoka
  • Patent number: 5907477
    Abstract: An enclosed electrical circuit and method for manufacturing the electrical circuit are provided. Initially a flexible substrate is formed with a plurality of electrical circuits. By way of example, each circuit can contain a conductive trace, a battery and a die, all in electrical communication. During the manufacturing process, a barrier is placed on the substrate and a curable encapsulant is poured into a cavity formed by the barrier and the substrate to encapsulate each circuit. The barrier can be formed as a compartmentalized dam having a separate cavity for each circuit, as a perimeter dam having a single cavity, or as a spacer sheet having a separate cavity for each circuit formed by a pattern of cut outs. Following the encapsulation step, the electrical circuits can be singulated into separate encapsulated circuits.
    Type: Grant
    Filed: March 11, 1997
    Date of Patent: May 25, 1999
    Assignee: Micron Communications, Inc.
    Inventors: Mark E. Tuttle, Rickie C. Lake, Joe P. Mousseau, Clay L. Cirino
  • Patent number: 5900581
    Abstract: A resin sealing structure according to the invention has convex parts formed in the vicinities of the perimeters of elements on a substrate to prevent thereby the resin, when it is applied for sealing, from invading the wiring parts of the elements. There may be narrow enough gaps between the substrate and the elements not to allow the resin to enter. This structure enables resin sealing to be accomplished at a high yield and dispenses with metallic caps or the like.
    Type: Grant
    Filed: September 19, 1997
    Date of Patent: May 4, 1999
    Assignee: NEC Corporation
    Inventor: Kenichi Ootake
  • Patent number: 5901044
    Abstract: A power module with leads extending upwardly. The circuit components and connections of the power module are arranged upon a substrate having interface leads attached thereto extending away from the undersurface of the substrate. The interface leads extend through openings in a form fitting molded case. The case has an open center region to facilitate performance of final assembly steps upon the module and is subsequently covered with a rugged lid and is encapsulated with a suitable potting material. The interior of the module is filled with a gel to provide moisture-proof protection.
    Type: Grant
    Filed: July 10, 1997
    Date of Patent: May 4, 1999
    Assignee: ILC Data Device Corporation
    Inventor: Len Marro
  • Patent number: 5900582
    Abstract: A leadframe for producing a semiconductor device having a lead-on chip (LOC) structure with leads extending across a semiconductor chip, the leadframe includes a frame for a die pad having an outer frame section, a die pad displaced from the outer frame section, and a suspending lead connecting the die pad to the outer frame section with the die pad disposed inside the outer frame section; and a frame for leads including an outer frame portion and leads extending from opposite sides of the outer frame portion, connected to the frame for a die pad, the die pad being connected to the frame for leads at the suspending lead, wherein one of the frame for a die pad and the frame for leads includes a projection and the other of the frame for a die pad and the frame for leads includes a hole, the hole receiving the projection, the projection being disposed parallel to the frame for leads, connecting the frame for a die pad to the frame for leads.
    Type: Grant
    Filed: March 31, 1998
    Date of Patent: May 4, 1999
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Yoshihiro Tomita, Naoto Ueda, Yoshirou Nishinaka, Shunichi Abe, Hideyuki Ichiyama
  • Patent number: 5894107
    Abstract: A method for manufacturing a chip-size package and the chip-size package produced by the method uses first and second lead frames which are prepared by a stamping process. The first lead frame has leads with receiving parts, and the leads are integrally formed with lengthwise side rails of the lead frame. The second lead frame has external connections which align with the receiving parts of the leads when the second lead frame is positioned on top of the first lead frame and attached thereto. Guide holes located on the crosswise side rails of both lead frames can be used to easily align the two lead frames. A semiconductor chip is then adhered to the underside of the first lead frame, and the bonding pads of the semiconductor chip are electrically connected to the leads of the first lead frame. Then the two lead frames and the chip are encapsulated, with only the external connections of the second lead frame remaining exposed to the outside.
    Type: Grant
    Filed: August 1, 1997
    Date of Patent: April 13, 1999
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kyu Jin Lee, Do Soo Jeong, Wan Gyan Choi, Tae Gyeong Chung
  • Patent number: 5890586
    Abstract: In a resin-embedded switching element provided with a casting containment, which encloses an area of the switching element to be covered by a resin, the casting containment has a fill hole consisting of a blind bore having at its inner end a diaphragm which is sufficiently thin that it can be ruptured by casting resin supplied to the fill hole under pressure and a measuring opening is formed in the top of the casting containment through which air can escape during filling of the casting containment with liquid casting resin and the level of the casting resin in the casting containment can be controlled.
    Type: Grant
    Filed: October 14, 1997
    Date of Patent: April 6, 1999
    Assignee: Cherry Mikroschalter GmbH
    Inventors: Siegbert Adelhardt, Helmut Brunnhuber, Wilfried Pohner, Stefan Gebhardt
  • Patent number: 5892417
    Abstract: A method for packaging an acoustic wave filter die, and an acoustic wave filter die packaged by the method. The method includes steps of providing an acoustic wave filter die having an active area disposed on a first surface thereof, providing a leadframe including a die flag and sealing the first surface to the die flag. The method also includes steps of molding a plastic package body about the die and the die flag and singulating the plastic body, the die and the die flag. The molding step desirably includes substeps of placing the acoustic wave filter die sealed to the leadframe in a mold, applying a thermosetting plastic material at a suitable temperature less than the glass transition temperature and at a suitable pressure to the acoustic wave filter die sealed to the leadframe in the mold and maintaining the suitable temperature for a suitable period of time.
    Type: Grant
    Filed: December 27, 1996
    Date of Patent: April 6, 1999
    Assignee: Motorola Inc.
    Inventors: Gary Carl Johnson, Michael J. Anderson, Gregory Jon Kennison, Jeffrey Eanes Christensen, Mark Phillip Popovich
  • Patent number: 5887435
    Abstract: The environmentally protected module (16, 116, 216), which is qualifiable under military and space specifications, uses commercial and/or industrial grade electronic components (18, 20; 118, 120; 218, 220). The components are secured to and are electrically coupled together on a printed wiring board (24, 124, 224), through which thermally conductive vias (38, 138, 238) extend. The components are encapsulated in a thermally conductive and electrically insulative packaging material (25a, 25b; 125; 225, 229). Cooling or heating is provided by Peltier thermoelectric heat pump devices (32, 132, 232) coupled between an external heat sink/exchanger (35, 80; 135; 235) and the components.
    Type: Grant
    Filed: December 9, 1996
    Date of Patent: March 30, 1999
    Assignee: Litton Systems, Inc.
    Inventor: James R. Morton
  • Patent number: 5889232
    Abstract: An ultrahigh-frequency electronic component has an ultrahigh-frequency chip encased in a molded-resin package. The ultrahigh-frequency electronic component includes a first sealing layer encasing the ultrahigh-frequency chip therein and a second sealing layer encasing the first sealing layer therein. The first sealing layer contains a number of voids or minute air bubbles therein which are effective in reducing the permittivity of the first sealing layer. A method of manufacturing the ultrahigh-frequency electronic component is also disclosed.
    Type: Grant
    Filed: May 13, 1997
    Date of Patent: March 30, 1999
    Assignee: NEC Corporation
    Inventors: Seiji Ichikawa, Tomoaki Hirokawa, Tomoaki Kimura, Taku Sato, Junichi Tanaka, Kenji Uchida, Masatoshi Ohara, Takeo Ogihara, Satoshi Murata, Tsutomu Kubota
  • Patent number: 5880403
    Abstract: The invention discloses a method for making two sided Multi-Chip Modules (MCMs) that will allow most commercially available integrated circuits to meet the thermal and radiation hazards of the spacecraft environment using integrated package shielding technology. The invention describes the technology and methodology to manufacture MCMs that are radiation-hardened, structurally and thermally stable using 3-dimensional techniques allowing for high density integrated circuit packaging in a radiation hardened package.
    Type: Grant
    Filed: January 24, 1997
    Date of Patent: March 9, 1999
    Assignee: Space Electronics, Inc.
    Inventors: David Czajkowski, Neil Eggleston, Janet Patterson
  • Patent number: 5877941
    Abstract: An IC card and a method of fabricating the same are provided in which the IC card substrate is formed of a blackened metal core plate to improve thermal, electrical and mechanical stability of the IC card.
    Type: Grant
    Filed: April 24, 1997
    Date of Patent: March 2, 1999
    Assignee: Samsung Aerospace Industries, Ltd.
    Inventor: Jae-chul Ryu
  • Patent number: RE36356
    Abstract: The disclosure relates to memory cards having an electronic component housed in a cavity. The electronic support has a first base made of silicon, with a small thickness (between 50 and 100 microns) and a thicker (between 200 and 300 microns) second base, which is deposited on the first base and is formed by a material which is harder than silicon, such as cobalt, vanadium, titanium or ceramic.
    Type: Grant
    Filed: June 1, 1994
    Date of Patent: October 26, 1999
    Assignee: SGS-Thomson Microelectronics S.A.
    Inventors: Jean-Pierre Gloton, Philippe Peres