Abstract: A part carrier strip in combination with a part for insertion therein. A flexible planar part carrier strip includes a plurality of part-receiving apertures define by a plurality of side edges. Each of the aperture side edges includes an inwardly projecting and resiliently deflectable tab. Each part is adapted for securement in a corresponding one of the apertures and includes a closed top side, an open bottom side having a peripheral flange, and a plurality of interconnecting sidewalls. Each sidewall is disposed adjacent a corresponding one of the aperture side edges, and each sidewall further includes an outwardly projecting retaining member spaced upwardly from the peripheral sidewall. The retaining members and the sidewall define therebetween a capture area adapted to receive therewithin an adjacent one of the side edge tabs to thereby retain each part on the strip.

Abstract: A multi-chip module includes a housing having insulative side walls and an end plate, conductive leads extending from the side walls, integrated circuit (IC) dies mounted to the end plate, and one or more interconnect dies mounted to the end plate. The end plate is made from a heat sink material, such as copper. Each interconnect die is positioned between a pair of the IC dies. Electrically conductive material connects the IC dies to the interconnect die, connects the IC dies to the conductive leads, and connects the interconnect dies to the conductive leads. The interconnect dies function to interconnect the IC dies and to interconnect the IC dies to the conductive leads. The interconnect die may be embodied by wiring layers formed on a silicon substrate.

Abstract: An IC package suitable for high density mounting and high speed is provided, by improving the humidity resistance and mounting stress resistance at a resin-sealed type BGA package and improving the reliability lessened a warp of the package. A concave part is provided in a multi-layer wiring substrate which has an exhaling route of water vapor expanded by heat in the inside of the package and a semiconductor chip is mounted at the concave part and is connected electrically to the substrate and the upper surface and sides of the package is sealed with resin. By this constitution, the infiltration of water is prevented and the stress at receiving thermal stress is lessened and the occurrence of stripping and crack of the inside of the package is prevented. Moreover, by utilizing the concave part effectively and connecting electrically, the wiring length is shortened and the high frequency characteristic is improved.

Abstract: The present invention provides an interconnection scheme having compliant contacts arranged in an array to connect conductive surfaces on a microelectronic device and a supporting substrate, such as a printed circuit board. This invention accommodates for the difference in thermal coefficients of expansion between the device and the supporting substrate. Typically, an area array of conductive contact pads are connected into rows by conductive leads on a flexible, intermediate substrate. Each of the conductive leads bridges a bonding hole in the intermediate substrate which is situated between successive contact pads. Each of the conductive leads further has a frangible portion within or near each bonding hole. A stand-off between the intermediate substrate and the device is create by compliant dielectric pads, typically composed of an elastomer material, positioned under each contact pad.

Abstract: The present invention is directed to an electronic component assembly which cost effectively eliminates capacitive coupling while providing significant heat transfer. Exemplary embodiments ensure that the circuit ground of electrical circuits on printed wiring boards and the chassis ground remain separate so that undesired ground loops are not created and so that a Faraday shield or "cage" can be established around all circuit elements to reduce EMI effects on the circuit.

Abstract: In a semiconductor packaged device of an LOC structure, a lead frame is formed having leads which extend in two directions from a semiconductor chip. The lead frame further includes dummy frames which extend in the two directions opposite of the directions in which the leads extend. The dummy frames are located below the center line (drawn half-way between the upper surface and undersurface of the device) by depressing the dummy frames before the semiconductor chip is mounted on the lead frame. The inner lead portions of the leads are each adhered to the surface of the semiconductor chip through a tape and connected to electrode pads on the semiconductor chip using bonding wires. The semiconductor chip and its periphery is then sealed with mold resin.

Abstract: A leadframe having individual bond fingers incorporating two or more alternate bonding areas. In one embodiment, conventional bond fingers having bonding areas in an outer row are augmented to include an additional conductive trace or intermediate portion terminating in a bonding area that is in general alignment with an inner row of bonding areas. Likewise, bond fingers having bonding areas in an inner row are enlarged to include an alternate bonding area that is in general alignment with the outer row of bonding areas. In another embodiment, bond fingers are arranged to provide multiple rows of closely-spaced staggered bonding areas to reduce bonding pitches. By providing alternate bonding areas in individual bond fingers, the manufacturing rules addressing staggered bond wire placement can be followed more readily, while simultaneously permitting the most convenient bond fingers to be utilized.

Abstract: A method of fabricating a metal matrix composite containing electrically isolated areas and the MMC formed from the method. The method comprises: (a) providing a liquid pool of unreinforced aluminum alloy; (b) infiltrating the unreinforced aluminum alloy into a stack comprising upper and lower porous preforms and an electrical insulator material placed between the preforms; (c) solidifying the liquid-phase metal to form a metal matrix composite product that completely surrounds the stack; and (d) forming at least one groove in the solidified metal, the groove extending downward to the insulating substrate so as to electrically isolate at least one region on the surface of the metal matrix composite.

Abstract: A resin sealing type semiconductor device capable of making a resin burr hard to occur when formed by molds and of restraining cracks in solder, is actualized by providing a stepped portion on a resin sealing body for covering a circuit forming surface of a semiconductor chip, making leads exposed from this exposed surface and joining solder bumps to the leads.

Abstract: The heat tolerance of an LED alphanumeric display device having a clear epoxy encapsulation can be improved by matching the coefficient of thermal expansion (CTE) of the inner circuit board to the high CTE of the epoxy. When heat is applied to fix the device to a circuit board, the components will expand at a nearly equal rate, avoiding cracking and failure.

Abstract: A device and method for hermetically sealing an integrated circuit chip between a substrate and a lid while providing effective dissipation of heat generated by the integrated circuit chip. The device includes an integrated circuit chip, carrier substrate, interface coolant, and a lid. The integrated circuit chip is attached to the top of the carrier substrate. The interface coolant is disposed on the top of the integrated circuit chip and the lid is placed on top of the carrier substrate/integrated circuit chip combination and contacts the interface coolant. The interface coolant provides a thermal path for conducting heat from the integrated circuit chip to the lid. The substrate is attached to a circuit board by a ceramic ball grid array (CBGA) or a ceramic column grid array (CCGA).

Abstract: A packaged semiconductor device has bottom surface leads having portions of the package adjacent the lead edges excised. The outer leads may take the form of inverted-J leads, short stub leads, vertically bent leads-in-grooves, or may be entirely eliminated. Lead connections are on the bottom package surface, over the top package surface, and/or on the sides and ends of the package, enabling vertical stacking of the devices and simultaneous/alternative coplanar horizontal connections to other semiconductor devices, circuit boards, etc. A mold assembly with a castellated inner surface forms a package with alternating grooves and columns for holding side and end electrical connection surfaces.

Abstract: An apparatus and a process for precisely mounting integrated circuit packages on circuit boards. The package has guide pins on its bottom surface that mate with non standard holes on the circuit board. This simplifies the precise positioning of packages on circuit boards. When the package is properly mounted on the circuit board many leads on the bottom surface of the integrated circuit package are electrically connected with the circuit board.

Abstract: A package for power converters in which a multilayers circuits board holds the components. The winding of the magnetic elements are incorporated in the multilayers circuit board. The top and some portion of the bottom layer are also support for electronic components. Some of the components are placed on the top layer, which may not be utilized for magnetic winding, reducing the footprint of the magnetic elements to the footprint of the magnetic core. The power dissipating devices placed on pads which have a multitude of copper coated via connecting the top to bottom layers. Through these via the heat is transferred from the power devices to the other side of the PCB. In some of the embodiment of this invention the heat can be further transferred to a metal plate connected to the multilayers circuit board via a thermally conductive insulator. The baseplate has cutouts or cavities to accommodate the magnetic cores.

Abstract: A slug or plate of copper or some other material having high heat conductivity is attached by an adhesive such as epoxy to a heat-emitting electrical component such as a chip, ASIC, microprocessor, or the like. A heat sink having a base and a plurality of fins upstanding from the base is attached to the slug or plate by screws, nuts or other, preferably detachable, means. The bottom of the base may be formed with a socket to receive the slug. The heat sink may be larger than the slug, thereby improving heat dissipation. When it is necessary to replace the component, the heat sink is detached from the slug and re-used.

Abstract: A part carrier device for receiving and transporting component parts includes a flexible member capable of being flattened into a planar strip and having a plurality of part receiving areas. Each of the part receiving areas is defined or bounded by a plurality of part positioning tabs. Each of the part positioning tabs is positioned to abut an edge of a pre-formed part placed adjacent the part receiving area. Each of the part receiving areas is further being bounded on at least two opposing sides by a row of resiliently deflectable part retaining latches which releasably engaging the part. At least one of the latches in each row is positioned to overlie the surface of the part, while at least one of the latches in each row is positioned to underlie the surface of the part.

Abstract: A single gauge lead frame having a second support pad which is substantially a mirror image of a first support pad is disclosed. The second support pad is capable of being placed upon the first support pad. In this manner, the structural and thermally conductive advantages of a dual gauge lead frame is realized at a cost near a single gauge lead frame.

Abstract: A bottom lead semiconductor package includes a plurality of bottom leads with inner leads extended upwardly bent or inclined from corresponding ones of the bottom leads. A semiconductor chip is attached to an upper surface of each of the bottom leads by a nonconductive adhesive, and a plurality of conductive wires electrically connects a plurality of chip pads on the chip to the inner leads. A molding compound forms a package body having a plurality of openings such that a lower surface of each of the bottom leads is externally exposed. The fabrication method includes a molding step for sealingly molding the package but exposing the lower surface of the bottom leads and the inner leads upwardly bent extending from corresponding ones of the bottom leads. A mold with a plurality of protrusions on a bottom surface in the mold and the protrusions respectively serve to fill openings formed below each of the inner leads to prevent the flow of molding resin into the openings.

Abstract: A holder for multiple remote control units includes a plurality of generally planar tiers pivotally coupled to a cylindrical support at one end. The tiers are pivotable to separate at angular positions and secured by an elongated fastener or the like. Embodiments are shown having two and three tiers. A plurality of hook and loop fabric fasteners are secured to the upper surfaces of each receiving tier and to the undersurfaces of the to-be-secured remote control hand units. In its preferred form, the holder is fabricated using a planar member having an aperture at one end thereof together with at least one member having a planar element including a cylindrical support having a passage defined therein. A threaded insert is press fitted within the passage to permit the attachment between the cylindrical support and the remaining structure using a threaded fastener. An extending base member forms a base extension for the bottommost planar tier for supporting the holder against tipping.

Abstract: A multichip module having a carrier substrate, on whose component side an IC component and other electronic components are mounted which are interconnected by way of electrically conductive interconnects. Electrical through-lines are led from the component side to the bottom side of the carrier substrate and being joined to solder contacts arranged on the bottom side for the electrical connection of the multichip module to a card cage. To reduce the density of printed circuit traces on the top side of the multichip module, and to decrease the number of layers necessary in the carrier substrate, a carrier part is arranged between an IC component and the carrier substrate, the carrier part having printed circuit traces and components which are connected to the respective IC component by way of first terminal pads, and are connected to terminals on the carrier substrate by way of second terminal pads.

Abstract: An integrated circuit package (30) including a substrate (70) having an opening (86) and first and second surfaces(92, 94), a plurality of pads (100) disposed on the first and second surfaces (92, 94) having disposed thereon solder balls (150) electrically connected by a via (84) that provides the end-user with flexibility in the location of a power supply Pin (96) is disclosed.

Abstract: The invention discloses a three-dimensional module with the use of volume unpackaged and film electronic components.Between the independent electronic components comprising IC chips and the microboards comprising active and passive electronic components are disposed intermediate multifunctional boards. All module members are fabricated mostly from heat conductive materials, and together with the module's heatsinks make up an effective heat dissipation system. The microboards and intermediate boards further contain film active and passive components fabricated using semiconductor, thin film and thick film techniques and increasing the operational range of equipment. The proposed design is versatile and can be used in any-purpose electronic equipment.The module structure allows its application under severe operational conditions and increases the packing density up to the technological limit.

Abstract: Composite materials for electronic packages are disclosed. The composite materials comprise a core layer and first and second cladding layers. The core and cladding layer compositions and thicknesses are selected to maximize thermal and electrical conductivity and to minimize the coefficient of thermal expansion of the composite. The composite material may be employed to fashion the package base, the leadframe, a heat spreader or combinations thereof. In one embodiment, a portion of the first cladding layer is removed so that an electronic device may be mounted directly to a high thermal conductivity core.

Abstract: A parts carrier strip includes a wall portion defining an aperture wherein the wall portion includes a tab portion which is deflectable to permit the tab portion to be placed in a recess in a part to be carried by the strip. Also disclosed is an apparatus for assembling parts in such a strip.

Abstract: The invention is directed to a chip-sized package (CSP) and method for making a CSP which is simple to manufacture, less costly and more compact, thus being truly a chip-sized package. The inventive CSP has a chip that has an array of chip ports on an active surface, such as an array of solder or metal bumps or any other conductive material. The chip may be held in a cavity of a frame by a pair of frame tie-bars. An encapsulant encapsulates the chip and portions of the chip ports located near the active surface, leaving portions of the chip ports located away from the active surface exposed. Package ports, such as solder balls may be attached to the portions of the chip ports located away from the active surface and used to attach the CSP to a printed circuit board. Various methods are used to leave portions of the chip ports located away from the active surface exposed from the encapsulant. The encapsulant may be removed by laser or grinding to expose portions of the chip ports.

Abstract: A multi-chip carrier which uses less lateral mounting space on the surface of a circuit board or card can be formed using flexible circuitized material. Lateral space is compressed by utilizing more vertical space to package chips and components. The problem of cooling multiple chips in a tight space may be accomplished by integrating the heat sink in with the circuit carrier and having the heat sink double as a support structure. A flex material is folded or shaped. Different regions of the flex are used for mounting chips, mounting support mechanisms, or mounting the structure on a carrier or substrate.

Abstract: A circuit module comprising a circuit board, a function component, and a heat sink. The circuit board has a number of circuit components and a circuit element which generates heat while operating. The function component is secured to the circuit board by screws. The heat sink is connected to the circuit board by the screws, for radiating heat generated by the circuit element.

Abstract: A hermetically sealed housing (10) includes a dielectric end portion (118) which provides a transmission-line feedthrough between a printed-circuit such as HDI and exterior connections. A first transmission line (1) on the PC board (30) transitions to a 3-via transmission line (4), which transitions to a third coplanar, microstrip, or stripline transmission line (3). The third transmission line (3) transitions to a second 3-via transmission line (5), which ends at a coplanar transmission line (2) which is outside the housing.

Abstract: A one side resin sealing type semiconductor device has a semiconductor element which is mounted on one side of a circuit board. Wiring patterns are provided on both sides of the circuit board. The semiconductor element mount portion is sealed with resin. External connecting terminals, such as soldering balls, are joined to the wiring pattern on the-other side of the circuit board. The method of manufacturing one side resin sealing type semiconductor devices includes the steps of: positioning and disposing the circuit board formed into an individual piece corresponding to a through-hole formed in a rectangular carrier frame; and conveying the circuit board supported by the carrier frame so as to conduct a series of processing steps such as mounting the semiconductor element, electrically connecting the semiconductor element with the wiring pattern, sealing the semiconductor element mount portion with resin, and connecting the wiring pattern with the external connecting terminals.

Abstract: A connection component for electrically connecting a semiconductor chip to support substrate incorporates a preferably dielectric supporting structure (70) defining gaps (40). Leads extend across these gaps so that the leads are supported both sides of the gap (66, 70). The leads therefore can be positioned approximately in registration to contacts on the chip by aligning the connection component with the chip. Each lead is arranged so that one end can be displaced relative to the supporting structure when a downward force is applied to the lead. This allows the leads to be connected to the contacts on the chip by engaging each lead with a tool and forcing the lead downwardly against the contact. Preferably, each lead incorporates a frangible section (72) adjacent one side of the gap and the frangible section is broken when the lead is engaged with the contact.

Abstract: There is disclosed herein an electronic component 10 having an integral heat spreader 16 specially designed to assist in laser soldering of the heat spreader to a solder pad 22 on a substrate 20. The component 10 has a top surface 30, a bottom surface 32 generally parallel to the top surface, and at least one perimeter outer surface 34 generally orthogonal to and between the top and bottom surfaces. The component 10 comprises: a circuit portion 12; at least one termination 14 connected to the circuit portion 12 and extending outward therefrom; a heat spreader 16 portion situated generally beneath and in thermal contact with the circuit portion 12; and a body portion 18 enclosing at least a top surface of the circuit portion 12 and a part of each termination 14 proximate the circuit portion 12. The heat spreader 16 defines at least part of the bottom surface 32 of the electronic component 10 and at least part of the at least one perimeter outer surface 34 of the electronic component 10.

Abstract: A method of enhancing the passive thermal management of electronic packages, and an electronic package consisting of a vertically-oriented substrate, such as a printed circuit board or the like, a heat-generating electronic module, for example, containing at least one chip which is positioned on a substrate, and a cover plate located adjacent to the module at a predetermined spaced relationship therefrom. The cover plate includes at least one opening located adjacent the module at a predetermined location relative thereto so as to ensure a maximum cooling air flow impinging on the module, and which air flow thereafter passes upwardly between the substrate and the cover plate. The cover plate may be equipped with a heat-sink structure, such as fins, for cooling the module, which structure is adapted to project through the opening formed in the cover plate or to lie flush therewith.

Abstract: An electrically conductive adhesive film having a pattern of microscopic elongate metal particles which extend from one surface to the other to provide an interconnection between confronting conductive metal pads abutting the surface. The particles have sharp ends to penetrate the oxide coating on the conductive metal pads of an electronic module when force is applied to press the module against the film.

Abstract: A low-profile heat transfer apparatus is presented for a surface-mounted semiconductor device employing a ball grid array (BGA) device package having a chip mounted upon a substantially flat upper surface of a substrate. The semiconductor device is mounted upon a component side of a printed circuit board (PCB), and the heat transfer apparatus is used to transfer heat energy from the semiconductor device to an ambient. A thermally conductive cap structure is positioned between the semiconductor device and the ambient. The cap structure includes a bottom surface having a first cavity sized to receive the substrate and possibly any decoupling capacitors. During use, the substrate resides within the first cavity. In a first embodiment, the chip resides within a second cavity in an upper wall of the first cavity during use. The chip and substrate are thermally coupled to the cap structure by a first and second thermal interface layer, respectively.

Abstract: An apparatus and method for packaging a microelectronic device to be connectable to a distribution circuit. The apparatus is in the form of a microelectronic package including a microelectronic device having first and second oppositely facing surfaces and a plurality of Input/Output pads on the first surface capable of being electrically interconnected to a distribution circuit, a base adapted to support the microelectronic device in a predetermined operative relationship to a distribution circuit, and a first layer of elastomer gel sandwiched between the first surface and the base. The first surface of the microelectronic device overlays the base so as to allow an electrical interconnection through the base between the microelectronic device and a distribution circuit.

Abstract: A surface mount semiconductor package includes a semiconductor device, a metal pad on which the semiconductor device is mounted, and a housing formed of a flowable material which bonds to the metal pad and encapsulates the semiconductor device when cured, where the metal pad includes a waffled surface opposite the surface on which the semiconductor device is mounted for accepting solder between the metal pad and a substrate and for permitting solder wetting therebetween.

Abstract: An electronic component can be more easily tested after being mounted onto a circuit board (660). The component also stops cracks from propagating over vital areas of a substrate (110). The component includes an electrically insulative substrate (100), electrically conductive traces (120) supported by the electrically insulative substrate (100), and an electrically insulative layer (310) covering inner and outer portions of the electrically conductive traces (120) while middle portions of the electrically conductive traces (120) remain exposed.

Abstract: A flexible integrated circuit package for mounting on a substrate is disclosed. The package consists of a tape film having layers of dielectric and conductive material, a semiconductor die and an array of conductive leads. A molded body covers the die, and absorbs the majority of the pressure applied when compressing the package between a heatsink and a printed circuit board (PCB). Rigid removable support material surrounds the molded body to keep the package flat while it is being mounted to the PCB. The support material is removed after soldering of the package to the PCB. The invention permits the package to be tightly compressed between a heatsink and a substrate without causing degradation of the conductive connections. Reliability of the connections is further increased since the tape film is flexible enough to accommodate bending of the substrate to which the package is connected.

Abstract: A leadframe for producing a semiconductor device having a lead-on chip (LOC) structure with leads extending across a semiconductor chip, the leadframe includes a frame for a die pad having an outer frame section, a die pad displaced from the outer frame section, and a suspending lead connecting the die pad to the outer frame section with the die pad disposed inside the outer frame section; and a frame for leads including an outer frame portion and leads extending from opposite sides of the outer frame portion, connected to the frame for a die pad, the die pad being connected to the frame for leads at the suspending lead, wherein one of the frame for a die pad and the frame for leads includes a projection and the other of the frame for a die pad and the frame for leads includes a hole, the hole receiving the projection, the projection being disposed parallel to the frame for leads, connecting the frame for a die pad to the frame for leads.

Abstract: An electronic component (10) has an electrically insulating substrate (20) that is encapsulated with an electrically conductive material (15) to provide thermal dissipation for the electronic component (10). The electrically insulating substrate (20) has cavities (21-24) that are either completely filled with an electrically conductive material (15) or are partially filled to provide recesses (26-27) for electronic devices (30,31). The electronic devices (30,31) are electrically coupled to the leads (60-63) of the electronic component (10) using either wire bonds (70) or metallic depositions (55-57).

Abstract: A Tape-Automated-Bonding (TAB) package includes a resilient polyimide layer that supports a metal leadframe. A microelectronic circuit die is mounted in a hole in the polyimide layer and interconnected with inner leads of the leadframe. The TAB package is adhered to a support member having spacers that abut against the surface of a printed circuit board (PCB) on which the package is to be mounted and provide a predetermined spacing between the leadframe and the surface. Outer leads that protrude from the leadframe are bent into a shape so as extend, in their free state, toward the surface at least as far as the spacers. The package and support member assembly is placed on the PCB surface, and the combination of the weight of the assembly, the resilience of the leads and the preset standoff height enable the leads to resiliently deform so that the spacers abut against the surface and the leads conformably engage with the surface for soldering or other ohmic connection to conjugate bonding pads on the surface.

Abstract: For fully testing and burning-in an integrated circuit chip before it is incorporated into a high density interconnect or other standard hybrid bare chip circuit, a temporary test substrate having pins extending therethrough holds the chip within a cavity. Chip pads are electrically connected with the pins to create a package that can be tested using commercially available testing and burn-in devices. After testing, the chip is retrieved from the test structure undamaged. In using HDI techniques to interconnect the chip with the pins, metal-filled vias in a polymer layer overlying the temporary test substrate electrically connect the chip to the pins through a metal interconnect pattern on the polymer layer. In another embodiment, the chip is interconnected with the pins through wire bonds. Metal-filled vias pass through an insulative coating on the chip and make electrical contact with the chip pad.

Abstract: In order to reduce the chip size of a semiconductor device as well as to separate noises between at least two types of pads having different functions, power supply pins and ground pins are provided on opposite edges of a package with input address pins being arranged therebetween and output data pins being arranged outside the same. Control pins and a nonconnected excess pin are arranged in the center. This allows the package to omit wires and reduce chip size.

Abstract: A molded plastic package incorporates a lead frame which includes a plurality of leads radially aligned around a central opening. A die is mounted in the central opening and is electrically connected to the leads by wire bonding. A molded plastic casing is formed over the die, wiring and lead frame to encapsulate the package. The lower surfaces of the die and lead frame are exposed through the package. A method for making the molded plastic package includes mounting the die and lead frame onto an adhesive tape, electrically connecting the die to the leads by wire bonding, forming a molded plastic casing over the die, wire bonding and lead frame, and then removing the adhesive tape to expose the lower surfaces of the die and the lead frame.

Abstract: A method for manufacturing a chip-size package and the chip-size package produced by the method uses first and second lead frames which are prepared by a stamping process. The first lead frame has leads with receiving parts, and the leads are integrally formed with lengthwise side rails of the lead frame. The second lead frame has external connections which align with the receiving parts of the leads when the second lead frame is positioned on top of the first lead frame and attached thereto. Guide holes located on the crosswise side rails of both lead frames can be used to easily align the two lead frames. A semiconductor chip is then adhered to the underside of the first lead frame, and the bonding pads of the semiconductor chip are electrically connected to the leads of the first lead frame. Then the two lead frames and the chip are encapsulated, with only the external connections of the second lead frame remaining exposed to the outside.

Abstract: A method of manufacturing a semiconductor device includes the steps of: mounting a semiconductor chip on a holding board having electrode accommodation recesses formed thereon, and mounting electrode members to the electrode accommodation recesses, the electrode members being formed separately from the semiconductor element; electrically connecting electrode pads formed on the semiconductor chip with the electrode members; forming a resin package for sealing the semiconductor chip on the holding board by using a die, the holding board serving as a part of the die; and separating the resin package including the electrode members from the holding board.

Abstract: An ultrahigh-frequency electronic component has an ultrahigh-frequency chip encased in a molded-resin package. The ultrahigh-frequency electronic component includes a first sealing layer encasing the ultrahigh-frequency chip therein and a second sealing layer encasing the first sealing layer therein. The first sealing layer contains a number of voids or minute air bubbles therein which are effective in reducing the permittivity of the first sealing layer. A method of manufacturing the ultrahigh-frequency electronic component is also disclosed.

Abstract: The semiconductor package contains the substrate with a stacked structure; the semiconductor device mounted on the top of the substrate and provided with the electrode pads; the input/output terminals on the bottom of the substrate, which connects the semiconductor package to the printed circuit board; and the conductive tubes going through the substrate, which connects the input/output terminals and the electrode pads. The surface-mounted semiconductor package has the protecting device on its sides. The protect device prevents water and the like from infiltrating the edges of the substrate, and additionally avoid a crack of the substrate due to expansion of the water. Furthermore, the protecting device has the pairs of lands on both sides of the substrate, which fasten the edges of the substrate.

Abstract: The invention discloses a method for making two sided Multi-Chip Modules (MCMs) that will allow most commercially available integrated circuits to meet the thermal and radiation hazards of the spacecraft environment using integrated package shielding technology. The invention describes the technology and methodology to manufacture MCMs that are radiation-hardened, structurally and thermally stable using 3-dimensional techniques allowing for high density integrated circuit packaging in a radiation hardened package.

Abstract: A ball grid array (BGA) integrated circuit package which has a plurality of vias connected to a plurality of solder pads located on a bottom surface of a package substrate. Each via has a portion located within a solder pad to increase the routing space of the substrate, and a portion located outside the solder pad to allow outgassing from the via. The bottom surface also has a solder mask which covers the vias and contains a number of holes that expose the solder pads. The holes allow solder balls to be attached to the solder pads. The solder balls can be reflowed to attach the package to a printed circuit board.