Abstract: An electronic package having improved electrical properties in which a plastic Quad Flat Pack is provided with upper and lower metallic plates encased in the plastic body and overlapping at least a portion of the length of the encased portion of the leads whereby the self and mutual inductance of the package is reduced. A ceramic Quad Flat Pack is provided with metal plates attached to the mating surfaces of the ceramic cover component and the ceramic base component so that at least a portion of the enclosed portion of the leads which are electrically connected to the electronic component inside the components is overlapped on the top and bottom by the metallic plates.

Abstract: Plastic (or resinous) materials used to package (or support) electronic devices typically have thermal coefficients of expansion exceeding that of the device to be packaged. A "loading" material (agent) having a coefficient of expansion significantly less than the "base" plastic material (molding compound), less than that of the die, and preferably zero or negative over a temperature range of interest, is mixed with the "base" plastic material to produce a plastic molding compound with a lower overall thermal coefficient of expansion. Titanium dioxide, zirconium oxide and silicon are discussed as loading agents. The loading material is mixed into the plastic molding compound in sufficient quantity to ensure that the resulting mixture exhibits an overall thermal coefficient of expansion that is more closely matched to that of the electronic device.

Abstract: Single flat metal sheet blank in which thin metallic parts including side frames which are to form side walls, a shield plate and external lead and the like are connected together in a developed state in positional relationships necessary for the assembly of the high-density circuit module. A circuit board is then placed on one side of the shield plate of the flat metal sheet blank. Terminals having pedestals are formed on the shield plate. The terminals are inserted into holes formed in the circuit board and connected to conductors on the circuit board. Then, operations such as severance or bending are effected on selected connecting portions at which the thin metallic parts arranged in developed state are inter-connected, and required processings are executed on the portions to be jointed, whereby the circuit module is completed.

Abstract: An electronic device (10) includes a package (16) having two posts (30) suitable for insertion in PCB holes. Package (16) presents a lengthwise molding plane (32) along which the upper portion (42) and bottom portion (44) of package (16) are mated during the molding process. Posts (30) are disposed substantially exclusively in bottom portion (44) so that posts (30) are asymmetric about lengthwise molding plane (32). Thus, even if a top mold (42a) and a bottom mold (44a) are misaligned there will be no effect on the dimensional tolerance of posts (30) and thus the tolerance of post (30) can be closely matched with a PCB hole (20) tolerance to insure a snug fit. Thus, device (10) is mounted edgewise on a PCB (18) by insertion of posts (30) into PCB holes (20) so that tips (24) of lead fingers (4 14) can be connected to PCB (18) by surfacing-mounting techniques or the like.

Abstract: Plural kinds of metal wiring patterns on which a lid is to be put are formed on a package body. The wiring patterns connected to an IC chip are changed depending upon the size of the lid which is put on the package body. Either of an IC chip operated by a single power supply and an IC chip operated by positive and negative power supplies can be packaged without changing the wiring patterns in the package.

Abstract: A tantalum capacitor chip and lead terminals respectively connected to two electrodes of the chip are molded in resin. A portion of the lead terminal, not molded in the resin is bent at a tip side and at a base side. The resin is provided with a structure in which its upper half is longer than its lower half at both sides. The base side portion of the portion not molded in the resin, of each of the lead terminals is curved downward with a predetermined radius of curvature, and an inwardly bent portion is formed on the tip side of the base side curved portion of the protruding portion.

Abstract: A semiconductor device having an interconnecting circuit board includes an island formed in a predetermined plane, a semiconductor chip disposed on the island and having a plurality of electrically connecting electrode pads, an interconnecting circuit board disposed on the semiconductor chip and having an electrically conductive pattern, a plurality of inner leads disposed around the island, a first electrically connecting wire connecting the electrically conductive pattern and one of the plurality of electrically connecting electrode pads, and a second electrically connecting wire connecting the electrically conductive pattern and one of the inner leads.

Abstract: Described is a plastic encapsulated electronic device having an integrated circuit unit, a lead frame and a plastic material encapsulating the IC unit and portions of the leads into a sealed package. Each of the leads includes an inner portion adjacent the IC unit, an outer portion laying in a different plane than the inner portion, and a central portion interconnecting the inner and the outer portions. The plastic enclosure is so formed that the outer portion of each lead, except for its lowermost flat surface and a short outermost section, is embedded in the plastic material. The bottom surface of the plastic enclosure is substantially coplanar with the lowermost flat surface of each lead. The short outermost portion of the outer lead portion extends beyond the plastic material for testing purposes. This arrangement provides for a robust encapsulation of the leads avoiding the prior problems of the prior art.

Abstract: The invention is an electronic component device in the form of an envelope including a glass cover and a glass shell bonded together for hermetically sealing a surface acoustic filter inside the envelope. Electrical connections are provided from the filter's electrodes to the outside of the envelope by means of through holes in the cover. Each through hole has an electrode disposed around its periphery on the upper and bottom surfaces of the cover and a conductive layer disposed on the internal surface of the hole. A metal foil is formed on the bottom electrode sealing the hole and pressed downward and deformed against a filter electrode to complete a connection between the filter electrode, the metal foil, the conductor layer and the electrodes disposed around the periphery of the hole, and to hermetically seal the hole.

Abstract: There is provided a leadframe having a plurality of coplanar electrically conductive leads. At least one metallic guard is bonded to the leads with a dielectric layer disposed between the metallic guard and the leads. The metallic guard has good adhesion to a polymer molding resin such that when the leadframe structure is encased in a molding resin, delamination is minimized. By restricting delamination, the ingress of water and water soluble contaminants to an integrated circuit device is inhibited.

Abstract: A method for forming solder balls and an apparatus and method for forming solder columns on the electrical contact pads of an electronic package in order to establish a more reliable electrical and mechanical connection between an electronic package and a printed circuit board. In one embodiment, solder balls are formed on the electrical contact pads of a package by placing solder cylinders over the electrical contact pads and then passing the package through a reflow furnace where the solder cylinders take the form of spheres and are wetted onto the pads. In a second embodiment, a laminated solder column is formed that is resistant to collapse during the manufacturing process. The laminated solder column comprises a solder cylinder being clad on its top and bottom surfaces with a solder material having a lower melting temperature than that of the center solder cylinder.

Abstract: One or more reinforcement pins are inserted between the lid and base of a sealed integrated-circuit package. The reinforcement pins reinforce a sealing layer between the lid and the base, particularly against shear forces exerted on the sealing layer between the lid and the base of a package. Shorter pins are provided which do not extend through the lid or base. Longer pins are provided which extend through the lid or base, with the ends of the pins being mechanically secured to the lid or base and sealed with solder, glass, or epoxy material.

Abstract: A method for electroconductively connecting two electronic circuits to one another. A contact is coated with a liquefied, electrically conductive, flux-free solder, and the coated contact is arranged over the other contact. Then, in the molten state, the electrically conductive solder is electroconductively connected to the other contact and hardened. In addition, a liquefied, hardenable, non-conducting bonding means is introduced between the two electronic circuits.

Abstract: An insulating electrical feed-through connector extending through a wall of aluminium is obtained by using a sintered sleeve comprising phosphate glass in which a conductive pin is inserted. The sleeve is raised to a firing temperature in excess of the dilatometric softening temperature of the vitreous material in the presence of a first effective quantity of alumina between the sleeve and the wall and of a second effective quantity of nickel oxide between the sleeve and the pin, which makes it possible to achieve a simultaneous and direct hermetic sealing of the sleeve to the wall and of the pin to the sleeve.

Abstract: The disclosure describes a method of attaching and electrically connecting first and second planar substrates, wherein the first and second substrates have inwardly-facing surfaces with matching patterns of bond pads. The method includes adjusting a wire bonder's tear length to a setting which leaves a projecting tail of severed bond wire at a terminating wedge bond connection. Further steps include making a wedge bond to an individual bond pad of the first planar substrate with bond wire from the wire bonder, and then severing the bond wire adjacent said wedge bond. The adjusted tear length of the wire bonder results in a tail of severed bond wire which projects from said wedge bond and said individual bond pad. Subsequent steps include positioning the first and second planar substrates with their inwardly facing surfaces facing each other, aligning the matching bond pad patterns of the first and second planar substrates, and pressing the first and second planar substrates against each other.

Abstract: In one form of the invention, a package for integrated circuits and devices (42), (46) is disclosed, the package including: a package base (44), the base having a first top surface; a layer of material (43) on the first top surface of the base (44) wherein the material (43) is patterned to cover a portion of the base, and wherein the layer of material (43) forms a substrate having a second top surface; a microstrip transmission line (45) on the second top surface; and a plastic encapsulant (50), wherein the encapsulant covers the first top surface of the base.

Abstract: A semiconductor package includes a package body, a semiconductor chip disposed on the surface of the package body, external lead terminals disposed on two opposite side surfaces of the package body, a lid hermetically sealing and shielding the semiconductor chip in the package body, a package substrate having a metallized region on which the package body is mounted, and a metal layer disposed on the rear surface of the package body and connected to the metallized region of the package substrate with solder. The metal layer includes material having a good adhesion to the solder and has a pattern in which stripe-shaped metal portions abut two opposite side surfaces of the package body where the external lead terminals are absent, and stripe-shaped openings that abut the respective metal portions. Therefore, when the package body is soldered to the package substrate, unwanted flow of the melted solder is stopped at the openings in the metal layer.

Abstract: A semiconductor device including a lead on chip structure employs two frames. One of the frames includes a die pad and an outer frame portion and the other frame includes a plurality of leads and an outer lead portion. After a semiconductor chip is die bonded to the die pad, the two frames are connected to each other with the leads extending across the semiconductor chip. Slits within the second frame provide access to parts of the outer frame of the first frame and the first frame is severed at those slits. The severed portions of the first frame are removed after which the leads of the second frame are connected by wire bonding to the semiconductor chip. Finally, the semiconductor chip, the remaining part of the first frame, and the second frame are encapsulated in a resin with leads extending from the resin. The remaining parts of the outer frame of the second frame are removed by cutting and the exposed leads outside the resin are formed into a desired shape.

Abstract: A semiconductor device package comprises an integrated circuit chip (10), a substrate (16), an encapsulant (30), and an organic coupling agent or underfill material (12) disposed between the integrated circuit chip and the first side of the substrate. The chip has a plurality of interconnection pads (14) disposed on an active surface of the chip at some minimum spacing "X." Each of the interconnect pads also has electrically conducting bumps (26) on them. The substrate has a circuit pattern (20) on a first side and an array of solder pads (23) spaced a certain distance apart on an opposite side of the substrate. The distance between these pads is greater than the minimum distance (X) between the interconnect pads on the IC. The circuit pattern is electrically connected to the array of solder pads by plated through holes (22). The length and width of the circuit carrying substrate is substantially greater than the length and width of the integrated circuit chip.

Abstract: A hybrid integrated circuit having a lead frame electrically connected to electronic components by means of a silver (Ag) paste, the hybrid integrated circuit comprising: an electroless-plated coating on the lead frame, the coating being free from an insulating surface oxide layer at least in a connection area in which the electrical connection is provided. A process of producing this hybrid integrated circuit comprises: a first step of electroless-plating a lead frame by using a phosphorus-containing reducing agent to form a coating on the lead frame; a second step of mounting electronic components on the lead frame and then electrically and mechanically connecting the former to the latter by means of an electroconductive paste; and a third step of maintaining the surface of the electroless-plated coating free from a phosphorus-containing oxide layer during the connecting operation.

Abstract: An electronic-parts mounting board frame is formed by assembling a plurality of electronic-parts mounting boards into a single frame. The mounting boards may be electrically connected to the frame by separate inner and outer lead frames, the former being formed in the mounting boards and the latter being integral with the frame.

Abstract: A metal cap involved in a cavity down mounting package to be subjected to a seam welding with at least a roller electrode, wherein the metal cap has a square like external shape with four corners being so rounded that each corner has a radius of curvature in the range from 1/10 to 3/8 of a length on each side of the square like shaped metal cap thereby the seam welding is carried out by a combination of a straight movement of the roller electrode along straight sides of the metal cap and adjacent part of the rounded corners to the straight sides and a rotary movement of the roller electrode around a center axis of the metal cap and the roller electrode moves along the rounded corners except adjacent portions to the straight side of the metal cap.

Abstract: The present invention relates to the formation of a macrocomposite body for use as an electronic package or container. The macrocomposite body is formed by spontaneously infiltrating a permeable mass of filler material or a preform with molten matrix metal and bonding the spontaneously infiltrated material to at least one second material such as a ceramic or ceramic containing body or a metal or metal containing body. Moreover, prior to infiltration, the filler material or preform is placed into contact with at least a portion of a second material such that after infiltration of the filler material or preform by molten matrix metal, the infiltrated material is bonded to said second material, thereby forming a macrocomposite body. The macrocomposite body may then be coated by techniques according to the present invention to enhance its performance or bonding capabilities.

Abstract: A miniature electronic label or tag includes a metal card, and an integrated memory circuit attached to a surface of said card. The integrated memory circuit has an outer surface facing the card, an electrically conductive region on the surface and two input/output conductors. A first conductor is electrically connected to the card and the second conductor is electrically connected to the electrically conductive region. An opening through said card adjacent said electrically conductive portion permits electrical connection to be made to the first conductor by electrical contact with said card and electrical connection to the second conductor can be made by contact with the electrically conductive region through the opening, either directly or indirectly.

Abstract: A radio (100) which includes a plurality of printed circuit boards (101) which are positioned in a planar arrangement so to provide a substantially fiat structure. The printed circuit boards (101) are connected using flexible conductors (105) which mechanically and electrically couple the printed boards (101) and provide a flexible link to allow the printed circuit boards (101) to be manipulated into various configurations. A flexible radio housing (151) is used to encapsulate the printed circuit boards (101) and flexible conductors (105) allowing radio (100) to be impacted and/or easily manipulated without crushing the contents. The radio (100) may be worn and easily concealed on the body without risk of breakage.

Abstract: An electronic package which includes a rigid support member, e.g., copper sheet, to which is bonded both the package's semiconductor chip and circuitized substrate members. The chip is bonded using a thermally conductive adhesive while the circuitized substrate, preferably a flexible circuit, is bonded using an electrically insulative adhesive. The chip is electrically coupled to designated parts of the circuitry of the substrate, preferably by wire, thermocompression or thermosonic bonding. An encapsulant may be used to cover and protect the connections between the chip and substrate. This package may in turn be electrically coupled to a separate, second substrate such as a PCB.

Abstract: A package for a semiconductor device comprising (i) a high dielectric layer composed of an alumina particles, a high permittivity-imparting agent in particles selected from (a) W or Mo, (b) Re and (c) zirconia and a glass plase comprising alumina and at least one component selected from silica, alkaline earth metal components, and rare earth device components present in their grain boundaries, (ii) a pair of electrode layers comprising as a main component a metal selected from W and Mo provided on both sides of the high dielectric layer, and (iii) insulation layers composed of alumina particles and a glass phase composed of alumina and at least one component selected from silica, alkaline earth metal components and rare earth device components, the insulation layers being provided so as to sandwich the electrode layers and the dielectric layer.

Abstract: A package is disclosed that incorporates recessed test vias into a circuit substrate. The test vias are preferably formed at the time of substrate manufacture with little additional cost and offer access to electrical test points after hermetic sealing of the package without competing for lead sites on an otherwise crowded package exterior. The vias are preferably recessed below the surface of the substrate and may be backfilled with insulation to prevent unintended contact. Alternatively, the vias may be incorporated into the side of a package used for mounting to a motherboard, in which case the vias will be sealed at the time of package mounting. In still another instances, the vias may be left accessible or filled with a material that is easily removed for later test and service.

Abstract: A mechanical component peripheral lead protector covers fine pitch component leads in such a manner that nothing can come into contact with them. The lead protector is disposed above the component having the leads. It can be made of aluminum, conductive plastic or any other non ESD (electric static discharge) generating material. It can be glued, snapped, bolted or riveted to the associated PC board or glued to the top of the component, depending upon the application in which it is being used. The attachment method should be one which enables it to be removed and replaced when necessary. The center of the lead protector can be provided with an aperture so that the legends on the top of the component will be exposed.

Abstract: The invention relates to the encapsulation of integrated circuits, and more particularly encapsulation in a multi-layer ceramic case. In order to permit the disposition of chips of variable size on a monolithic chip (22, 24, 26) reception site (23, 25, 27) without the risk of having excessively long connection wires between the chip and the conductive regions (44) surrounding the reserved site, it is proposed according to the invention to cover the chip-reception site with a number of mutually insulated conductive contacts which can serve as soldering relays for these connection wires (80, 90, 100). If the chip is large (chip 24) it is bonded or soldered to these contacts; if it is small (chip 22) it is surrounded by relay-contacts.

Abstract: A package for holding at least one integrated circuit (IC) chip includes an IC chip, a lead frame, and a ceramic relay substrate with a wiring pattern. Respective portions of the wiring pattern are connected to the IC chip and the lead frame by respective bonding wires. The substrate includes at least one green tape with at least part of the wiring pattern thereon, and formed by printing a metal paste on the green tape and then firing it. An opening may be provided in the green tape to receive the IC chip. The assembly, which includes the IC chip, the substrate, and part of the leads of the lead frame, is sealed in a resin molding using a molding technique.

Abstract: An integrated circuit package, as well as a method for fabricating the same, is herein disclosed. The integrated circuit package of the present invention includes a cavity located within an assembly of laminated printed wiring boards. Such cavity provides two or more bonding tiers for connection with a semiconductor die. The contact pads are further connected, through conductive vias, to external connection means such as solder balls or pins. The semiconductor die is encapsulated with a molding compound through a transfer molding process. The present invention is especially advantageous in manufacturing pin grid array ("PGA") and ball grid array ("BGA")integrated circuit packages.

Abstract: An integrated circuit package which contains a heat slug that extends from an integrated circuit to a top surface of a surrounding housing. The heat slug has a coefficient of thermal expansion that matches the coefficients of thermal expansion of the housing and the integrated circuit to reduce thermal stresses in the package.

Abstract: The multichip module includes a ceramic multilayer substrate, a thick film wiring, a thick film insulator, a thin film multilayer wiring portion and semiconductor chips. The thick film wiring and the thick film insulator are laminated on the ceramic multilayer substrate. The thin film multilayer wiring portion is formed on the thick film insulator. In this thin film multilayer wiring portion, thin film wirings and thin film insulators are alternately laminated. The semiconductor chips are mounted on the thin film insulator of the thin film multilayer wiring portion, and the chips are electrically connected to a plurality of bonding pads made of the thin film wirings of the thin film multilayer wiring portion. A thick film wiring is situated underneath each bonding pad, and the thick film wiring is electrically connected to the thin film wiring in order to serve as a part of the wiring.

Abstract: A homogeneous thermoplastic semi-conductor chip carrier cavity package (HC package) which utilizes the same thermoplastic for various integral attachments to the HC package, such as, a molded lid and a circuit substrate. A chemical bonding or fusing of the integral attachments to the HC package provides increased protection from having moisture enter into the cavity of the HC package. The HC package eliminates problems which are associated with having different coefficients of thermal expansion for the HC package and its various integral attachments.

Abstract: The present invention provides a method and apparatus for fabricating thermally and electrically improved electronic integrated circuits by laminating one or more lead frames to a standard integrated circuit package such as, for example, thin small outline package (TSOP). The lead frame laminated to the package enhances thermal conduction of heat from the integrated circuit package. A heat spreader may also be utilized to improve heat transfer and can be further used as a ground plane to improve signal quality by reducing electrical circuit noise. Achieving improved thermal transfer characteristics from an integrated circuit package results in better dissipation of heat from the integrated circuit package and results in more reliable operation thereby. Using standard commercially available integrated circuit packages such as TSOP allows economical and rapid fabrication of thermally and electrically superior electronic circuits for applications that demand high reliability and performance.

Abstract: The invention discloses a high density semiconductor package. In one embodiment, two semiconductor chips are each affixed on a corresponding one of two lead frames. The semiconductor chips and the lead frames are encapsulated, wherein only a portion of the leads of the lead frames protrudes and extends from the package.

Abstract: A method for creating an interface between a chip and chip carrier includes spacing the chip a given distance above the chip carrier, and then introducing a liquid in the gap between the chip and carrier. Preferably, the liquid is an elastomer which is hardened into a resilient layer after its introduction into the gap. In another preferred embodiment, the terminals on a chip carrier are planarized or otherwise vertically positioned by deforming the terminals into set vertical locations with a plate, and then hardening a liquid between the chip carrier and chip.

Abstract: An electronic package that is tested before the leads of the package are cut and bent into a final shape. The electronic package has a plurality of leads that extend from an outer housing of the package. The package is typically rectangular in shape and has a group of leads extending from each side of the housing. Extending along each group of leads is a strip of dielectric material that is spaced an offset distance from the side of the housing. The package is tested by placing a plurality of corresponding test pins into contact with the leads over their final cut and formed length in an area between the housing and the dielectric strip. The area of contact corresponds to the ends of the final assembled leads, so that the actual impedance of the leads over their final cut and formed length are tested. The dielectric strip provides structural support for the leads during the handling and testing of the package.

Abstract: A method is provided for hermetically sealing a surface-mounted thick film electronic module within a cover soldered to a ceramic substrate, under the circumstances in which the input/output terminals of the electronic module are electrically interconnected with their corresponding external conductors on the exterior of the cover with a number of conductors. The integrity of the hermetic seal is promoted by routing the conductors beneath the ceramic substrate, as opposed to printing the conductors directly on the surface of the ceramic substrate, which necessitates that a dielectric material be placed intermediate the conductors and the bond material so as to electrically isolate the conductors from the bond material and cover. Consequently, an advantage of the present invention is the avoidance of a material mismatch between the dielectric material and the bonding material and the cover.

Abstract: A semiconductor device having an interconnecting circuit board includes an island formed in a predetermined plane, a semiconductor chip disposed on the island and having a plurality of electrically connecting electrode pads, an interconnecting circuit board disposed on the semiconductor chip and having an electrically conductive pattern, a plurality of inner leads disposed around the island, a first electrically connecting wire connecting the electrically conductive pattern and one of the plurality of electrically connecting electrode pads, and a second electrically connecting wire connecting the electrically conductive pattern and one of the inner leads.

Abstract: An electrical assembly 100 is provided which includes a land grid array integrated circuit package 103, a socket 104, a printed circuit board 106 and a clamping lid 101. Socket 104 and clamping lid 101 have major surface dimensions no greater than the major surface dimensions of the LGA integrated circuit package 103 in order to limit board space requirements to the minimum required by the circuit package 103. Alignment means associated with integrated circuit package 103, socket 104 and printed circuit board 106 are provided to maintain alignment between contact pads 120 on circuit package 103 and first ends of compressible conductors 111 on socket 104 and between contact pads 122 on circuit board 106 and second ends of compressible conductors 111. In the completed assembly, clamping lid 101 applies pressure to an adjacent surface of integrated circuit package 103 thereby compressing compressible conductors 111 against contact pads 120 and contact pads 122.

Abstract: An electronic device, such as an integrated circuit chip or a multichip module, is held in place overlying a circuit board, with which it is thermal expansion mismatched, by three or more localized rigid support elements. The bottom surface of the chip is bonded to the top surface of preferably only one of these support elements and can laterally slide along the top surfaces of the others in response to heating and cooling during electrical operations of the electronic device. In addition, the electronic device is encapsulated in a soft gel that is held in place by a rigid plastic half-shell cover that is epoxy-bonded in place along its perimeter (edge).

Abstract: A homogeneous thermoplastic semi-conductor chip carrier cavity package (HC package) which utilizes the same thermoplastic for various integral attachments to the HC package, such as, a molded lid and a circuit substrate. A chemical bonding or fusing of the integral attachments to the HC package provides increased protection from having moisture enter into the cavity of the HC package. The HC package eliminates problems which are associated with having different coefficients of thermal expansion for the HC package and its various integral attachments.

Abstract: A direct chip attach module (DCAM) 10, comprises of one or more electronic components 30, electrically bonded to a printed circuit 40, on a substrate 20. The DCAM 10, is bonded to an electronic circuit assembly by connection pads 50, formed on the edge of the DCAM substrate 10. This enables easy visual inspection of solder joints between the DCAM and the assembly. DCAM substrates 10, are initially formed in a panel form 70, and vias 50, are drilled and filled with electrically conductive media 55, at predetermined connection points. The DCAM 10, is then excised from the parent panel 70, and the cut vias provide connection pads 55, along the edge of the substrate 10.

Abstract: A multi-chip module includes a substrate, an interconnection pattern provided on the substrate, a plurality of semiconductor chips provided commonly upon the substrate in electrical connection with the interconnection pattern, a plurality of thermally conductive blocks each provided on corresponding one of the plurality of semiconductor chips in an intimate contact therewith, a resin package body that encapsulates the plurality of semiconductor chips and the plurality of thermally conductive blocks together with the substrate, such that the resin package body has an upper major surface substantially flush with the upper major surfaces of the plurality of thermally conductive blocks, and a heat sink mounted upon the upper major surface of the resin package body such that the heat sink establishes an intimate contact with respective upper major surfaces of the thermally conducting blocks.

Abstract: A switching power supply embodiment of the present invention includes a plastic leaded chip carrier (PLCC) that has two rectangular holes joined by a channel on the bottom surface that allow the PLCC to be surface mounted on a printed circuit board over a ferrite U-core section. A ferrite I-core section caps the ends of the U-core section above the top surface of the PLCC. A wire frame within the PLCC provides for several individual parallel conductor segments that pass between the two holes to rows of surface mount pins on opposite edges of the PLCC. Traces on the printed circuit board complete the connection of these conductor segments to form a primary winding of a transformer. A secondary winding is similarly constructed using pins on another edge of the PLCC.

Abstract: An electronic package assembly wherein a low profile package is soldered to an organic (e.g., epoxy resin) substrate (e.g., printed circuit board). The assembly's projecting conductive leads are soldered. An encapsulant material (e.g., polymer resin) is used to provide reinforcement for the solder-lead connections, the encapsulant material being dispensed only along opposing sides of the package's housing which do not include projecting leads (and which are oriented substantially normal to the stresses imposed on the package during operation wherein high temperatures are attained). This dispensing may follow solder reflow and solidification. The invention is particularly useful with thin, small outline package (TSOP) structures which occupy a minimum of height on the substrate surface.

Abstract: A semiconductor package (100) and module (300) includes a unitary base structure (101) and alignment mechanisms (104). The unitary base structure (101) includes a semiconductor mounting area (102) and encircling walls (103). The structure provides resistance to bowing as compared to a flat base. The lack of bowing provides improved thermal contact to a cold plate of the operating environment. The lack of bowing also reduces certain failure modes. The alignment mechanism (104) aligns module components during assembly, thereby simplifying assembly by eliminating the need for complicated fixtures which hold components in place.

Abstract: A flexible printed circuit board is constituted with a first insulation film covering a first insulating resist layer, a second insulation film covering a second insulating resist layer and a printed circuit formed between the first insulating resist layer and the second insulating resist layer, and a terminal of an electronic component is disposed on the printed circuit, and the second insulation film is pressed and heated.