Sputter Etching Patents (Class 204/192.32)
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Publication number: 20040011385Abstract: A process for cleaning a glass-coating reactor includes: (a) providing the reactor to be cleaned, wherein the reactor contains a glass substrate within a chamber and the chamber has an internal surface coated with at least one substance selected from the group consisting of Si3N4 or SiO2; (b) terminating a flow of a deposition gas to the reactor; (c) adding to the reactor at least one cleaning gas to react with the at least one substance to form at least one volatile product; and (d) removing from the reactor the at least one volatile product.Type: ApplicationFiled: July 22, 2002Publication date: January 22, 2004Inventors: Philip Bruce Henderson, Mario Joseph Moniz, Andrew David Johnson, Eugene Joseph Karwacki,, Richard R. Bodette, Christopher Robert Cording, Herbert David Johnson
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Patent number: 6673254Abstract: Methods for fabricating a highly effective, micron-scale micro heat barrier structure and process for manufacturing a micro heat barrier based on semiconductor and/or MEMS fabrication techniques. The micro heat barrier has an array of non-metallic, freestanding microsupports with a height less than 100 microns, attached to a substrate. An infrared reflective membrane (e.g., 1 micron gold) can be supported by the array of microsupports to provide radiation shielding. The micro heat barrier can be evacuated to eliminate gas phase heat conduction and convection. Semi-isotropic, reactive ion plasma etching can be used to create a microspike having a cusp-like shape with a sharp, pointed tip (<0.1 micron), to minimize the tip's contact area. A heat source can be placed directly on the microspikes. The micro heat barrier can have an apparent thermal conductivity in the range of 10−6 to 10−7 W/m-K. Multiple layers of reflective membranes can be used to increase thermal resistance.Type: GrantFiled: December 19, 2001Date of Patent: January 6, 2004Assignee: Sandia CorporationInventors: Albert C. Marshall, Stanley H. Kravitz, Chris P. Tigges, Gregory A. Vawter
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Patent number: 6645353Abstract: A sputter etch system and a method of conducting a sputter etch. The sputter etch system includes an etch chamber with a wafer pedestal having a top surface to support a wafer and a magnet configured to provide a continuous magnetic field directed at the top surface of the wafer pedestal.Type: GrantFiled: December 31, 1997Date of Patent: November 11, 2003Assignee: Intel CorporationInventors: Brett E. Huff, Ken Schatz, Mike Maxim, William G. Petro
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Patent number: 6641703Abstract: A magnetic multi-layer film manufacturing apparatus has a transferring chamber, a plurality of film-depositing chambers, and a robotic transferring device. Each film-depositing chamber has a rotatable substrate holder, a plurality of targets positioned at an incline on an opposing interior surface from the substrate holder, and a double layer rotating shutter mechanism and is controllable to deposit at least one layer of a magnetic multi-layer film structure. Magnetic multi-layer film structures are formed by depositing a plurality of magnetic films divided into a plurality of groups, each one of the plurality of groups deposited in an associated one of the plurality of film-depositing chambers continuously in a laminated state. A first division between successive groups of magnetic films is between a metal oxide film and a magnetic layer continuous therewith and a second division is between an antiferromagnetic layer and a magnetic layer continuous therewith.Type: GrantFiled: November 30, 2001Date of Patent: November 4, 2003Assignee: Anelva CorporationInventors: Shuji Nomura, Ayumu Miyoshi, Koji Tsunekawa
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Patent number: 6608378Abstract: Formation of a gate dielectric includes forming a metal oxide on at least a portion of the surface of the substrate assembly by electron beam evaporation. An ion beam is generated using an inert gas to provide inert gas ions for compacting the metal oxide during formation thereof.Type: GrantFiled: August 26, 2002Date of Patent: August 19, 2003Assignee: Micron Technology, Inc.Inventors: Kie Y. Ahn, Leonard Forbes
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Patent number: 6602621Abstract: A magnetic recording medium comprises, on a substrate, a soft magnetic layer, a first seed layer, a second seed layer, and a recording layer having an artificial lattice structure. The first seed layer contains oxide of Fe. The second seed layer contains one of Pd and Pt, Si, and N. The magnetic exchange coupling force in the in-plane direction of the recording layer is weakened by the first seed layer and the second seed layer. Accordingly, minute recording magnetic domains can be formed in the recording layer, and the magnetization transition area is distinct as well. Even when information is recorded at a high density, the information can be reproduced with low noise. A magnetic storage apparatus, which is provided with such a magnetic recording medium, makes it possible to achieve an areal recording density of 150 gigabits/square inch.Type: GrantFiled: December 27, 2001Date of Patent: August 5, 2003Assignee: Hitachi Maxell, Ltd.Inventors: Satoshi Matsunuma, Akira Yano, Tsuyoshi Onuma, Takanobu Takayama, Harumi Hieida, Kouichirou Wakabayashi
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Patent number: 6599400Abstract: The invention relates to a method for the manufacture of coatings having a low coefficient of friction on articles such as mechanical components and tools, with a layer sequence of carbon and a carbide of at least one element in the form of a metal and/or silicon and/or boron being deposited on the article by means of a PVD process. Articles which have such a layer sequence are also claimed. The coating has a low coefficient of friction, is wear-resistant and has a relatively high hardness and also relatively high elasticity.Type: GrantFiled: February 7, 2001Date of Patent: July 29, 2003Assignee: Hauzer Techno Coating Europe BVInventors: Christian G.C. Strondl, Antonius P. A. Hurkmans, Gerrit Jan van der Kolk
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Publication number: 20030136664Abstract: A sputter etch system and a method of conducting a sputter etch. The sputter etch system includes an etch chamber with a wafer pedestal having a top surface to support a wafer and a magnet configured to provide a continuous magnetic field directed at the top surface of the wafer pedestal.Type: ApplicationFiled: December 31, 1997Publication date: July 24, 2003Inventors: BRETT E. HUFF, KEN SCHATZ, MIKE MAXIM, WILLIAM G. PETRO
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Publication number: 20030136665Abstract: In one aspect, the invention encompasses a method of etching insulative materials which comprise complexes of metal and oxygen. The insulative materials are exposed to physical etching conditions within a reaction chamber and in the presence of at least one oxygen-containing gas. In another aspect, the invention encompasses a method of forming a capacitor. An electrically conductive first layer is formed over a substrate, and a second layer is formed over the first layer. The second layer is a dielectric layer and comprises a complex of metal and oxygen. A conductive third layer is formed over the second layer. The first, second and third layers are patterned into a capacitor construction. The patterning of the second layer comprises exposing the second layer to at least one oxygen-containing gas while also exposing the second layer to physical etching conditions.Type: ApplicationFiled: January 27, 2003Publication date: July 24, 2003Inventor: Daryl C. New
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Publication number: 20030111337Abstract: An apparatus and a method for monitoring the ion concentration in an etching chamber of a sputter etch process are described, wherein the DC bias of a pre-clean process for a sputter etch process is acquired. The parameters of the pre-clean process for the sputter etch process are then adjusted according to the value of the monitored DC bias. The DC bias thus varies within a certain range to provide a steady control of the ion concentration and to reduce the defects formed in the wafer.Type: ApplicationFiled: April 3, 2002Publication date: June 19, 2003Inventors: Chien-Chia Lin, Shih-Liang Chou, Kuo-Wei Shyu
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Patent number: 6579565Abstract: A multilayered circuit board is produced by: a. laminating a copper foil conductor layer and a nickel foil or nickel plating etch-stopping layer by simultaneously press-bonding the nickel and copper layer to form a multilayered clad sheet; b. selectively etching the multilayered clad sheet; c. forming an insulating layer and an outer conductor layer on the surface of the clad sheet; d. patterning the outer conductor layer; and e. electrically connecting the internal conductor layer and the outer conductor layer by interposing a columnar conductor formed in the base by etching.Type: GrantFiled: July 1, 2002Date of Patent: June 17, 2003Assignee: Toyo Kohan Co., Ltd.Inventors: Kinji Saijo, Shinji Ohsawa, Kazuo Yoshida
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Patent number: 6565721Abstract: An ion bombardment sputter etch of a layer to be etched is performed in an inert gas plasma including therein a small amount of a heavy halogen gas, such as iodine or bromine. The heavy halogen gas, in the form ions that are ionized by the plasma and halogen molecules, have the effect of bonding with the material of the layer to be etched, decreasing the sputter rate at areas normal to the ion bombardment, relative to the sputter rate at areas at an angle to the ion bombardmen. The redeposition rate of material sputtered from areas at an angle is also increased. A small amount of oxygen may also be included in the plasma to enhance the above effects.Type: GrantFiled: October 9, 1997Date of Patent: May 20, 2003Assignee: Micron Technology, Inc.Inventors: Guy T. Blalock, Kevin G. Donohoe
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Patent number: 6565913Abstract: An adherent antimicrobial coating and method of making same comprising hydrogenated amorphous carbon and a dispersion of antimicrobial metal ions adapted to maintain a therapeutically effective zone of inhibition.Type: GrantFiled: July 24, 2001Date of Patent: May 20, 2003Assignee: Southwest Research InstituteInventors: James Arps, Geoffrey Dearnaley
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Patent number: 6564439Abstract: A method of manufacturing a surface acoustic wave element includes the steps of providing a piezoelectric body having an interdigital transducer, where the interdigital transducer is made of a metal having a higher density than the piezoelectric body, and performing ion bombardment of the interdigital transducer and the piezoelectric body simultaneously so as to reduce the thickness of the interdigital transducer and the piezoelectric body.Type: GrantFiled: April 10, 2000Date of Patent: May 20, 2003Assignee: Murata Manufacturing Co., Ltd.Inventors: Eiichi Takata, Yasuji Yamamoto, Toshimaro Yoneda, Michio Kadota
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Patent number: 6565720Abstract: Substrate removal from a semiconductor chip having silicon-on-oxide (SOI) structure is enhanced via a method and system that provide a control for the removal process. According to an example embodiment of the present invention, a portion of substrate is removed from the back side of a semiconductor chip having a SOI structure and a backside opposite a circuit side. As the substrate is removed, secondary ions are sputtered from the back side. The sputtered ions are detected, and the substrate removal is controlled as a function of detected ions. In this manner, the portion of the substrate being removed can be detected and used to enhance the control of the substrate removal process, such as by detecting sputtered ions from the insulating portion of the SOI and using the insulating portion as an endpoint of the substrate removal process.Type: GrantFiled: May 31, 2000Date of Patent: May 20, 2003Assignee: Advanced Micro Devices, Inc.Inventor: Rosalinda M. Ring
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Patent number: 6562416Abstract: Low resistant vias are formed by sequentially treating an opening in an interlayer dielectric and the exposed surface of a lower metal feature with an NH3 plasma followed by a N2/H2 plasma, thereby removing any oxide on the metal surface and removing residual polymers or polymeric deposits generated during etching to form the opening. Embodiments include forming a dual damascene opening in a low-k interlayer dielectric exposing the upper surface of a lower Cu or Cu alloy feature, sequentially treating the opening and the upper surface of the lower metal feature with an NH3 plasma and then with a N2/H2 plasma, Ar sputter etching, depositing a barrier layer lining the opening, depositing a seedlayer and filling the opening with Cu or a Cu alloy.Type: GrantFiled: May 2, 2001Date of Patent: May 13, 2003Assignee: Advanced Micro Devices, Inc.Inventors: Minh Van Ngo, Robert A. Huertas, Dawn Hopper
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Patent number: 6554974Abstract: A recording film is formed on a surface of a substrate, including the slopes, which are positioned on both sides of each information track and have surfaces not parallel to the surfaces of the information tracks. The surface of the substrate is sputter-etched by accelerated ions impinging against the substrate surface in a substantially vertical direction. The recording film on each slope is etched away based on the dependence of a sputtering rate upon an incident angle of the ions, while the recording film remains on the surface of each information track.Type: GrantFiled: December 6, 2000Date of Patent: April 29, 2003Assignee: Canon Kabushiki KaishaInventor: Tsutomu Shiratori
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Patent number: 6547978Abstract: Copper can be pattern etched in a manner which provides the desired feature dimension and integrity, at acceptable rates, and with selectivity over adjacent materials. To provide for feature integrity, the portion of the copper feature surface which has been etched to the desired dimensions and shape must be protected during the etching of adjacent feature surfaces. This is particularly important for feature sizes less than about 0.5 &mgr;m, where presence of even a limited amount of a corrosive agent can eat away a large portion of the feature.Type: GrantFiled: December 13, 2001Date of Patent: April 15, 2003Assignee: Applied Materials Inc.Inventors: Yan Ye, Allen Zhao, Xiancan Deng, Diana Xiaobing Ma, Chang-Lin Hsieh
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Publication number: 20030066749Abstract: A solid state structure having a surface is provided and is exposed to a flux, F, of incident ions.Type: ApplicationFiled: June 27, 2002Publication date: April 10, 2003Applicant: President and Fellows of Harvard CollegeInventors: Jene A. Golovchenko, Daniel Branton, Michael J. Aziz, Jiali Li, Derek M. Stein, Ciaran J. McMullan
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Patent number: 6538387Abstract: The substrate electrode plasma generating apparatus is constituted of an array of small gap thin film electrode pairs 1, 2, 3, and 4 formed by sputtering and dry etching tungsten on a silicon substrate 5 with an oxidized surface.Type: GrantFiled: May 23, 2000Date of Patent: March 25, 2003Assignees: Seiko Epson Corporation, Kazuo TerashimaInventors: Shunichi Seki, Tatsuya Shimoda, Takeshi Izaki, Kazuo Terashima
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Publication number: 20030038113Abstract: A micro-machining process that includes etching a substrate having copper overlying a dielectric layer to a charged particle beam in the presence of an etch assisting agent. The etch assisting agent is selected from the group consisting of ammonia, acetic acid, thiolacetic acid, and combinations thereof.Type: ApplicationFiled: August 26, 2002Publication date: February 27, 2003Inventors: Vladimir V. Makarov, Javier Fernandez Ruiz, Tzong-Tsong Miau
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Photomask, method for manufacturing the same and method for detecting/repairing defects in photomask
Publication number: 20030039895Abstract: A photomask includes a mask substrate formed of a transparent nonconductor, a plurality of opaque conductive patterns formed on the mask substrate and separated from one another, and one or more conductive lines for connecting one of the conductive patterns with at least one adjacent conductive patterns. Electric charges, which accumulate in conductive patterns when using a focused ion beam (FIB) system, are dispersed through the conductive lines. The contrast of images of photomask patterns is increased by dispersion of electric charges, thereby improving the images of photomask patterns.Type: ApplicationFiled: June 4, 2002Publication date: February 27, 2003Applicant: Samsung Electronics Co., Ltd.Inventor: Yo-Han Choi -
Patent number: 6521897Abstract: A collimating grid for an ion source located after the exit grid. The collimating grid collimates the ion beamlets and disallows beam spread and limits the beam divergence during transients and steady state operation. The additional exit or collimating grid prevents beam divergence during turn-on and turn-off and prevents ions from hitting the periphery of the target where there is re-deposited material or from missing the target and hitting the wall of the vessel where there is deposited material, thereby preventing defects from being deposited on a substrate to be coated. Thus, the addition of a collimating grid to an ion source ensures that the ion beam will hit and be confined to a specific target area.Type: GrantFiled: November 17, 2000Date of Patent: February 18, 2003Assignee: The Regents of the University of CaliforniaInventors: Walter B. Lindquist, Patrick A. Kearney
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Patent number: 6517688Abstract: A method of smoothing a surface of a diamond coating of a diamond-coated body, by using an arc-type ion plating device in which at least one target is disposed. The method includes: (a) a step of causing arc discharge between an anode, and a cathode which is provided by each of the above-described at least one target, whereby positive ions are emitted from the above-described at least one target; and (b) a step of applying a negative bias voltage to the diamond-coated body which is disposed in the arc-type ion plating device, whereby the surface of the diamond coating is bombarded with the positive Lions, so as to be smoothed by the bombardment of the positive ions against the surface of the diamond coating.Type: GrantFiled: August 13, 2001Date of Patent: February 11, 2003Assignee: OSG CorporationInventors: Masatoshi Sakurai, Hiroaki Sugita
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Patent number: 6506312Abstract: The present invention provides a method of reducing or delaying the exfoliation of deposited films within a vapor deposition system. The method of preventing the delamination of thin films deposited of a vapor deposition chamber components includes the steps of depositing a series of thin films on a discontinuous surface. The internal stress of the deposited thin film laminates are relaxed by fragmenting the deposited thin film laminates into a plurality of discontinuous surfaces. Thus allowing the exfoliation process of the thin film laminates to be delayed.Type: GrantFiled: April 26, 1999Date of Patent: January 14, 2003Inventor: Roger L. Bottomfield
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Publication number: 20030009233Abstract: Regardless of the materials used in an artificial joint component design, the present invention applies gas cluster ion beam (GCIB) technology in order to modify the component's surface(s) so as to increase lubrication between contact surfaces, thereby substantially reducing wear debris, osteolysis complications, and accelerated wear failure. The approach of the surface modification comprises an atomic level surface patterning utilizing GCIB to apply a predetermined pattern to the surface(s) of the joint implant to reduce frictional wear at the interface of the surfaces. A reduction in wear debris by GCIB patterning on any surface(s) of a joint prosthesis reduces accelerated failure due to wear and osteolysis and results in a substantial cost savings to the healthcare system, and reduces patient pain and suffering.Type: ApplicationFiled: May 9, 2002Publication date: January 9, 2003Applicant: Epion Corporation a Commonwealth of Massachusetts corporationInventors: Stephen M. Blinn, Barry M. Zide, Vincent DiFilippo
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Publication number: 20030000845Abstract: A method for creating a material library of surface areas having different properties in which a substrate is coated. The substrate is subjected to a combined pretreatment procedure.Type: ApplicationFiled: June 20, 2002Publication date: January 2, 2003Inventors: Thomas Brinz, Ilona Ullmann
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Publication number: 20030000844Abstract: One aspect of the invention provides a consistent metal electroplating technique to form void-less metal interconnects in sub-micron high aspect ratio features on semiconductor substrates. One embodiment of the invention provides a method for filling sub-micron features on a substrate, comprising reactive precleaning the substrate, depositing a barrier layer on the substrate using high density plasma physical vapor deposition; depositing a seed layer over the barrier layer using high density plasma physical vapor deposition; and electro-chemically depositing a metal using a highly resistive electrolyte and applying a first current density during a first deposition period followed by a second current density during a second period.Type: ApplicationFiled: June 26, 2002Publication date: January 2, 2003Applicant: Applied Materials, Inc.Inventors: Daniel A. Carl, Barry Chin, Liang Chen, Robin Cheung, Peijun Ding, Yezdi Dordi, Imran Hashim, Peter Hey, Ashok K. Sinha
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Patent number: 6497825Abstract: A method of manufacturing a thin-film magnetic head, includes a first step of forming a second magnetic pole layer (an upper magnetic pole layer) on a magnetic gap layer formed on a first magnetic pole layer (a lower magnetic pole layer) so that the second magnetic pole layer opposes to the first magnetic pole layer via the magnetic gap layer, and a second step of dry etching a part of an upper surface of the first magnetic pole layer surrounding the second magnetic pole layer used as an etching mask to make a width of the dry-etched part of the first magnetic pole layer equal to a width of the second magnetic pole layer. The first step includes shaping at least part of the second magnetic pole layer so that the width of the second magnetic pole layer increases as a throat height becomes large.Type: GrantFiled: August 14, 2000Date of Patent: December 24, 2002Assignee: TDK CorporationInventor: Akifumi Kamijima
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Patent number: 6492272Abstract: Deleterious physical sputtering of workpiece layers accompanying removal of photoresist layers from the workpiece by plasma ashing utilizing an active plasma ashing gas such as O2, N2, N2/O2, or H2/N2 gas mixtures admixed with Ar inert carrier gas/diluent, is eliminated, or at least substantially reduced, by replacing the Ar with an inert gas of greater atomic weight, such as Kr or Xe, and supplying a lower level of electrical power to the plasma reactor than when Ar is utilized.Type: GrantFiled: March 15, 2001Date of Patent: December 10, 2002Assignee: Advanced Micro Devices, Inc.Inventors: Lynne A. Okada, Fei Wang
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Patent number: 6485618Abstract: A target and magnetron for a plasma sputter reactor. The target has an annular vault facing the wafer to be sputter coated. Various types of magnetic means positioned around the vault create a magnetic field supporting a plasma extending over a large volume of the vault. An integrated copper via filling process includes a first step of highly ionized sputter deposition of copper, a second step of more neutral, lower-energy sputter deposition of copper to complete the seed layer, and electroplating copper into the hole to complete the metallization.Type: GrantFiled: July 30, 2001Date of Patent: November 26, 2002Assignee: Applied Materials, Inc.Inventors: Praburam Gopalraja, Jianming Fu, Fusen Chen, Girish Dixit, Zheng Xu, Sankaram Athreya, Wei D. Wang, Ashok K. Sinha
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Publication number: 20020162736Abstract: Low resistant vias are formed by sequentially treating an opening in an interlayer dielectric and the exposed surface of a lower metal feature with an NH3 plasma followed by a N2/H2 plasma, thereby removing any oxide on the metal surface and removing residual polymers or polymeric deposits generated during etching to form the opening. Embodiments include forming a dual damascene opening in a low-k interlayer dielectric exposing the upper surface of a lower Cu or Cu alloy feature, sequentially treating the opening and the upper surface of the lower metal feature with an NH3 plasma and then with a N2/H2 plasma, Ar sputter etching, depositing a barrier layer lining the opening, depositing a seedlayer and filling the opening with Cu or a Cu alloy.Type: ApplicationFiled: May 2, 2001Publication date: November 7, 2002Applicant: Advanced Micro Devices, Inc.Inventors: Minh Van Ngo, Robert A. Huertas, Dawn Hopper
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Patent number: 6471920Abstract: An apparatus for treatment of electrically conductive continuous material, like wire material, copper wire in particular, is proposed, wherein the treatment is effected during the movement of the continuous material in its direction of extension through the apparatus. The apparatus can be used for heating, annealing or surface cleaning of the continuous material. The apparatus includes contact. means for creating an electrical contact with the moved continuous material and an electrode arrangement arranged with a distance to the continuous material and at least partly encompassing it, wherein in a gas discharge chamber located between the continuous material and the electrode arrangement and filled with a reaction gas an electrical gas discharge can be generated by applying an electrical voltage between the contact means 5 and said electrode arrangement for treatment of the continuous material.Type: GrantFiled: October 24, 2000Date of Patent: October 29, 2002Assignee: Mag Maschinen Und Apparatebau AktiengesellschaftInventors: Hans-Jörg Aigner, Helmut Jäger
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Patent number: 6464889Abstract: An irregularly etched metallic medical implant device is provided having random non-uniform relief patterns on the surface ranging from about 0.3 &mgr;m to less than about 20 &mgr;m in depth. The random, irregular surface as defined by the etch micromorphology and respective dimensional properties is sobtained by exposing a surface to a reactive plasma in a chamber wherein said reactive plasma produces a reaction product with the surface to thereby etch the surface, said reaction product or a complex thereof having a vapor pressure lower than a pressure in the chamber; providing a dynamic masking agent during the etching process; and removing the reaction products.Type: GrantFiled: January 25, 2000Date of Patent: October 15, 2002Assignee: Etex CorporationInventors: Dosuk D. Lee, Atul Nagras, Pramod Chakravarthy, Anthony M. Majahad
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Publication number: 20020134672Abstract: A method is provided for grading the surface topography of a surface to improve step coverage for an overcoat. In accordance with one aspect of the present invention, an ABS of a slider and sensitive element of a magnetic head is graded to provide better step coverage of an overcoat of ultra-thin DLC film. After lapping the ABS, a thin film is deposited on the lapped surface to cover any scratches, irregularities, and steps. The thin film is sputter etched at a glancing angle to grade the topography of the slider ABS. Sputtering at a glancing angle removes the thin film in planar regions faster than the thin film under the shadow of the glancing angle, which is near surface irregularities. The graded surface is then covered by a DLC deposition.Type: ApplicationFiled: March 20, 2001Publication date: September 26, 2002Inventors: Cherngye Hwang, Eun Kyoung Row, Ning Shi
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Patent number: 6454915Abstract: In a method of producing an information recording medium, any recording film is not substantially formed on the slope portions of a substrate in which slope portions having surfaces non-parallel to the surface of the information track of an information recording medium are provided on the opposite sides of the information track. A recording film of a predetermined film thickness is formed on the information track.Type: GrantFiled: October 23, 2000Date of Patent: September 24, 2002Assignee: Canon Kabushiki KaishaInventors: Tsutomu Shiratori, Kazuoki Hongu
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Publication number: 20020112951Abstract: A method for treating a silicon substrate is described. The silicon substrate is placed into a sputtering equipment. A sputtering step is performed to simultaneously dry clean and amorphize the silicon substrate surface by using the sputtering equipment. A titanium film is deposited on the silicon substrate by the sputtering equipment.Type: ApplicationFiled: February 11, 2002Publication date: August 22, 2002Inventor: Su-Chen Fan
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Patent number: 6436304Abstract: A plasma processing method using helicon wave excited plasma which makes it possible to control a degree of dissociation for a process gas by controlling the source power. In the plasma processing method using helicon wave excited plasma, the source power applied to the plasma generator is set lower than a source power corresponding to a discontinuous change of a characteristic line indicating the dependency of electron density or saturated ion current density on source power.Type: GrantFiled: February 5, 1997Date of Patent: August 20, 2002Assignee: Anelva CorporationInventor: Hiroshi Nogami
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Patent number: 6409891Abstract: Cryofilm/organic contaminants are removed from cryogenically cooled surfaces such as spacecraft cryo-telescope mirrors by sputtering and chemical reaction with a low energy plasma having an average ion energy of not more than about 30 eV, and preferably in the approximate range of 5-20 eV. When the reactive plasma's freezing point is higher than the temperature of the surface to be cleaned, the cryofilm and embedded hydrocarbons are first removed with a non-reactive plasma having a freezing point less than the surface temperature, the reactive plasma is then used to remove residual organic contaminants left on the surface by chemical reaction, and finally another inert plasma is applied to remove reactive plasma frozen to the surface; the two inert plasmas are preferably formed from the same gas.Type: GrantFiled: April 29, 1994Date of Patent: June 25, 2002Assignee: Hughes Electronics CorporationInventors: Barret Lippey, Darrell A. Gleichauf, Weldon S. Williamson
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Patent number: 6409896Abstract: A method and apparatus for detecting the presence of a plasma. The apparatus comprises an electrically floating contact member that is exposed to a plasma forming region, for example, a semiconductor wafer processing chamber. The floating contact is coupled to a measuring device. When a plasma is present in the plasma forming region, the plasma induces a voltage upon the floating contact which is detected by the measuring device.Type: GrantFiled: December 1, 1999Date of Patent: June 25, 2002Assignee: Applied Materials, Inc.Inventor: Steve Crocker
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Publication number: 20020068132Abstract: A method and apparatus to facilitate the successful and precise smoothing of conductive films on insulating films or substrates. The smoothing technique provides a smooth surface that is substantially free of scratches. By supplying a source of electrons, harmful charging of the films and damage to the films are avoided.Type: ApplicationFiled: December 1, 2000Publication date: June 6, 2002Inventors: Wesley J. Skinner, Allen R. Kirkpatrick
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Publication number: 20020063055Abstract: A method for improving the anchoring of liquid crystals on carbon alignment layers used in liquid crystal displays involves exposing the alignment layer to hydrogen atoms. The atomic hydrogen exposure passivates the surface of the carbon layer to stabilize the anchoring of the subsequently deposited liquid crystals. The substrate on which the carbon layer is supported is located beneath a stretched tungsten filament, and the substrate and filament are located in a vacuum chamber containing hydrogen gas. The heating of the tungsten filament by an appropriate power source dissociates the hydrogen gas into hydrogen atoms and the hydrogen atoms contact the surface of the carbon layer. The process is applicable to stabilize carbon alignment layers that have been formed by directional deposition of carbon, as well as carbon alignment layers where the alignment is caused by a separate ion irradiation step after the carbon layer is formed.Type: ApplicationFiled: November 30, 2000Publication date: May 30, 2002Applicant: International Business Machines CorporationInventors: Yoshimine Katoh, Yoshiki Nakagawa, Shuhichi Odahara, Mahesh Govind Samant
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Publication number: 20020063114Abstract: The surface of an article with a metallic base body is cleaned. A plasma comprising electrically positively charged ions is generated, and the ions are accelerated toward the article, so that they come into contact with the base body for cleaning purposes. To do this, an electron beam is directed onto the base body. The outgoing flux of electrons which come into contact with the base body is controlled by the base body being connected to a reference potential via a switch of at a fixed, adjustable or regulated frequency.Type: ApplicationFiled: January 10, 2002Publication date: May 30, 2002Applicant: Siemens AktiengesellschaftInventor: Gebhard Dopper
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Patent number: 6395148Abstract: The invention relates to a method for producing improved tantalum conductive and resistive materials for use in ink jet heater chips. Specifically, a method for producing thin film tantalum layers of a desired phase on a semiconductor substrate comprises depositing protective layers upon the semiconductor substrate; pre-sputter etching the semiconductor substrate; preheating the semiconductor substrate; maintaining the substrate at a predetermined temperature while depositing the thin film tantalum layer by sputtering for a predetermined period of time at a predetermined input power. Use of the method enables production of a desired tantalum phase for use on a semiconductor substrate thereby providing enhanced corrosion and/or cavitation resistance depending on the use of the semiconductor device.Type: GrantFiled: February 29, 2000Date of Patent: May 28, 2002Assignee: Lexmark International, Inc.Inventor: Charles Spencer Whitman
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Patent number: 6391377Abstract: A method of manufacturing workpieces, includes loading the workpieces into a treatment facility, surface treating the workpieces in at least one vacuum station of the facility grouped as a station batch and controlling at least the timing of the process by a freely programmable process controller unit. At least two stations operating each on workpiece batches can be grouped as respective station batches and be different with respect to number of workpieces. The workpieces can be transported to and from the grouped stations. An embodiment of vacuum treatment system for such a process includes at least one vacuum treatment station for workpieces grouped as a station batch. A transport system supplies the vacuum station with workpieces. A process controller unit has an output operationally connected to a drive arrangement for the transport system. The unit controls operating timing of the treatment system and is freely programmable.Type: GrantFiled: November 17, 1999Date of Patent: May 21, 2002Assignee: Unaxis Balzers AktiengesellschaftInventors: Rudolf Wagner, Jacques Schmitt, Jerome Perrin
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Publication number: 20020040848Abstract: A method of smoothing a surface of a diamond coating of a diamond-coated body, by using an arc-type ion plating device in which at least one target is disposed. The method includes: (a) a step of causing arc discharge between an anode, and a cathode which is provided by each of the above-described at least one target, whereby positive ions are emitted from the above-described at least one target; and (b) a step of applying a negative bias voltage to the diamond-coated body which is disposed in the arc-type ion plating device, whereby the surface of the diamond coating is bombarded with the positive ions, so as to be smoothed by the bombardment of the positive ions against the surface of the diamond coating.Type: ApplicationFiled: August 13, 2001Publication date: April 11, 2002Applicant: OSG CORPORATIONInventors: Masatoshi Sakurai, Hiroaki Sugita
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Publication number: 20020029958Abstract: We disclose a method of applying a sculptured layer of material on a semiconductor feature surface using ion deposition sputtering, wherein a surface onto which the sculptured layer is applied is protected to resist erosion and contamination by impacting ions of a depositing layer, said method comprising the steps of: a) applying a first portion of a sculptured layer with sufficiently low substrate bias that a surface onto which said sculptured layer is applied is not eroded away or contaminated in an amount which is harmful to said semiconductor device performance or longevity; and b) applying a subsequent portion of said sculptured layer with sufficiently high substrate bias to sculpture a shape from said the first portion, while depositing additional layer material. The method is particularly applicable to the sculpturing of barrier layers, wetting layers, and conductive layers upon semiconductor feature surfaces and is especially helpful when the conductive layer is copper.Type: ApplicationFiled: June 20, 2001Publication date: March 14, 2002Applicant: Applied Materials, Inc.Inventors: Tony Chiang, Gongda Yao, Peijun Ding, Fusen E. Chen, Barry L. Chin, Gene Y. Kohara, Zheng Xu, Hong Zhang
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Patent number: 6350353Abstract: The present invention provides a method and apparatus for achieving conformal step coverage on a substrate by PVD. A target provides a source of material to be sputtered by a plasma and then ionized. Ionization is facilitated by maintaining a sufficiently dense plasma using, for example, an inductive coil. The ionized material is then deposited on the substrate which is biased to a negative voltage. A signal provided to the target during processing includes a negative voltage portion and a zero-voltage portion. During the negative voltage portion, ions are attracted to the target to cause sputtering. During the zero-voltage portion, sputtering from the target is terminated while the bias on the substrate cause reverse sputtering therefrom. Accordingly, the negative voltage portion and the zero-voltage portion are alternated to cycle between a sputter step and a reverse sputter step.Type: GrantFiled: November 24, 1999Date of Patent: February 26, 2002Assignee: Applied Materials, Inc.Inventors: Praburam Gopalraja, Sergio Edelstein, Avi Tepman, Peijun Ding, Debabrata Ghosh, Nirmalya Maity
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Publication number: 20020014403Abstract: After a Ta radiation absorber 13 is subjected to reactive ion overetching to form a desired pattern till an upper portion of the SiO2 buffer film 12 is removed, the buffer film 12 is removed by two steps of reactive sputter pre-underetching and final wet etching. In the wet etching, a substrate is rotated while spraying a dilute hydrofluoric acid solution, spray and rotation are ceased, the substrate is illuminated with a light beam to detect regularly reflected light, the detected signal is amplified, differentiated and compared with a reference voltage to detect an etching endpoint, and etching is ceased after a predetermined time has elapsed from the detection of the etching endpoint. At an inspection step, an image of a reflective mask is obtained with a microscope and it is determined that the side etching amount of the buffer film is short if the luminance, at a point of the maximum change rate on a luminance curve around the edge of the Ta radiation absorber 13, is lower than a reference value.Type: ApplicationFiled: April 3, 2001Publication date: February 7, 2002Inventor: Eiichi Hoshino
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Publication number: 20020011421Abstract: A metal is provided on a polymeric component and the component is subjected to a removal process such as plasma or liquid etching in the presence of an electric field. The etchant selectively attacks the polymer at the boundary between the metal and the polymer, thereby forming gaps alongside the metal. A cover metal may be plated onto the metal in the gaps. The cover metal protects the principal metal during subsequent etching procedures.Type: ApplicationFiled: September 4, 2001Publication date: January 31, 2002Inventors: Belgacem Haba, Irina Poukhova, Masud Beroz