Abstract: A fabrication method of fabricating an array of microstructures is provided. The method includes the step of preparing a substrate with a surface including a usable region and a dummy region continuously set around the usable region, at least the usable region and the dummy region of the substrate are electrically conductive and have a conductive portion. The method also includes the steps of forming a first insulating layer on the conductive portion, and forming a plurality of openings in the first insulating layer, the openings being arranged in a predetermined array pattern. Additionally, the method includes the step of performing one of electroplating and electrodeposition using the conductive portion as an electrode to form a first plated or electrodeposited layer in the openings and on the first insulating layer in both the usable region and the dummy region.

Abstract: A method of simultaneously electroplating both sides of a dual-sided circuit board substrate having electrically connected, multi-trace circuit patterns formed on both sides of the substrate, without requiring formation and at least partial removal of electrically conductive tie bars and associated extensions, comprises steps of simultaneously electrically contacting each feature of a first one of the circuit patterns with a multi-fingered electrical contactor, and applying an electrical potential to the contactor to effect simultaneous electroplating on the circuit patterns on both sides of the substrate. According to an embodiment of the invention, the multi-fingered contactor comprises an array of electrically conductive wires, rods, or filaments extending from one surface of a metal plate. The invention finds particular utility in the fabrication of ball grid array (BGA) semiconductor device packages.

Abstract: A method of electroplating both sides of a dual-sided circuit board substrate having electrically connected, multi-trace circuit patterns formed on both sides of the substrate, without requiring formation and at least partial removal of electrically conductive tie bars, comprises steps of covering and electrically contacting a first one of the circuit patterns with a first layer of electrically conductive material, applying an electrical potential to the first layer of electrically conductive material to effect electroplating on the second one of the circuit patterns, removing the first layer of electrically conductive material, covering and electrically contacting the second one of the circuit patterns with a second layer of electrically conductive material, applying an electrical potential to the second layer of electrically conductive material to effect electroplating on the first one of the circuit patterns, and removing the second layer of electrically conductive material.

Abstract: There are provided a method and apparatus for forming interconnects by embedding a metal such as copper (Cu) into recesses for interconnects formed on the surface of a substrate such as a semiconductor substrate. The method of the present invention includes the steps of: providing a substrate having fine recesses formed in the surface; subjecting the surface of the substrate to plating in a plating liquid; and subjecting the plated film formed on the surface of the substrate to electrolytic etching in an etching liquid.

Abstract: An object of the present invention is to improve the reliability and the yield of production of semiconductor integrated circuit devices by filling copper in the inside of features having a high aspect ratio for forming multi-layer interconnections composed of a plurality of interconnection layers which are connected to one another and to a copper electroplating bath suitable therefor. In the present invention, when the features are filled with copper, the use of a copper electroplating bath with an addition of cyanine dyes, for example, indolium compounds allows the copper plating to proceed preferentially from the bottoms of the features.

Abstract: The present invention provides an aqueous electroplating solution. The aqueous electroplating solution includes a copper salt comprising a weight by weight percent of the electroplating solution between about 0.1% to about 2.5%. The electroplating solution also includes an inorganic acid having a dissociation constant of less than about 2.0, and comprising a weight by weight percent of the electroplating solution between about 0.1% to about 10%. The electroplating solution further includes a hydrogenated halide and a modulator, each that comprises a weight by weight percent of the electroplating solution between about 0.0001% to about 1%.

Abstract: A method of manufacturing a support circuit includes providing a conductive layer with top and bottom surfaces, providing a top etch mask on the top surface that includes an opening that exposes a portion of the top surface, providing a bottom etch mask on the bottom surface that includes an opening that exposes a portion of the bottom surface, applying an etch to the exposed portion of the top surface through the opening in the top etch mask, thereby etching partially but not completely through the conductive layer and forming a recessed portion in the conductive layer below the top surface, forming an insulative base on the recessed portion without forming the insulative base on the top surface, and applying an etch to the exposed portion of the bottom surface through the opening in the bottom etch mask, thereby forming a through-hole in the recessed portion that extends to and is covered by the insulative base.

Abstract: The present invention relates to a method of electrodepositing metal onto a substrate, which comprises applying a pulsed periodic reverse current across the electrodes of a plating cell utilizing a peak reverse current density and peak forward current density; and varying the ratio of peak reverse current density to peak forward current density in periodic cycles to provide metal deposits of uniform thickness and appearance upon the substrate. The invention also relates to a process for improving the properties of an electrodeposit, particularly on substrates having uneven surfaces or apertures, by using programmed pulse periodic reverse current modulation. More particularly, it involves varying the anodic to cathodic current density ratio, in order to improve the surface uniformity appearance, grain structure and levelling of the deposit while maintaining high current density throwing power.

Abstract: A resin plate having wiring pattern recesses and via through holes is made. All of the surfaces of the resin plate including inner walls of said wiring pattern recesses and via through holes are coated with a metal film. An electroplating is applied using the metal film as a power-supply layer to fill a plated metal into the wiring pattern recesses and via through holes. The metal film formed on the resin plate except for the inner walls of the wiring pattern recesses and via through holes is removed, so that wiring pattern and via are exposed on a surface the same as that of the resin plate.

Abstract: A method and apparatus for enhancing the microthrowing power in a plating bath. The method involves the use of ultrasonic vibration of an electrochemical solution to increase the uniformity of copper deposition for blind hole vias. The apparatus includes a series of ultrasonic transducers positioned between anodes for vibration of the solution being electro deposited on the cathode.

Abstract: There is disclosed an improved method for manufacturing printed circuit boards which solves the problem of immersion bath contaminants being plated-out onto electrically-conductive, circuit functional pads, (board-features) by introducing into the bath system a mechanism for attracting those contaminants to non-functional “micro-thieves” which are electrically-conductive, non-circuit-functional pads having substantially smaller dimensions than those of the smallest board-feature, thereby taking advantage of previously unknown immersion bath uncontrolled strike phenomena, whereby the contaminants are directed to the micro-thieves and away from the board-features. Application of the micro-thieves in the immersion bath environment also produces plated features, of both finer and larger geometries, having flatter surfaces and a more uniform plated thickness for all features on the printed circuit board, than previously obtained.

Abstract: An optical transparent film is formed so as to cover a first thin film element and a marker, and flattened. A resist-cover is formed on the part of the optical transparent film above the marker. A plate underfilm is formed on the optical transparent film and the resist-cover. The resist-cover is removed from the optical transparent film. A resistframe is fabricated on the part of the optical transparent film including the plate underfilm above the first thin film element on the basis of the marker which is visible via the optical transparent film from the removed part of the resist-cover. Then, a plate film is formed on the part of the plate underfilm enclosed by the resistframe.

Abstract: Within both a method for forming a patterned photoresist layer and a method for forming an electroplated patterned conductor layer while employing the patterned photoresist layer as a patterned photoresist plating mask layer there is first provided a substrate. There is then formed over the substrate a blanket photoresist layer formed of a negative photoresist material. There is then photoexposed the blanket photoresist layer to form a photoexposed blanket photoresist layer while employing a photoexposure apparatus which employs an annular edge ring exclusion apparatus positioned over an annular edge ring of the blanket photoresist layer and the substrate. Finally, there is then developed the photoexposed blanket photoresist layer to form a patterned photoresist layer having an annular edge ring excluded over the annular edge ring of the substrate.

Abstract: A process for electrolytically processing a flat perforated item, comprising the steps of: moving the item in a transport direction to a treatment station where the item is contacted with an electrolyte, continuously mechanically wiping, in the presence of one of a cathodic item and an anode, and an anodic item and a cathode, a surface of the item using means for reducing the thickness of a diffusion layer depleted in metal ions adjacent the surface of the item, which means include a wiping roller extending perpendicular to the transport direction over the entire width of the item and in contact with the item; and moving the electrolyte in a direction substantially perpendicular to a plane of the item so as to direct the electrolyte only toward the perforations in the item and to convey the electrolyte through the in the item under pressure.

Abstract: The present invention discloses a polymeric circuit protection device and a method of making the same, wherein a highly conductive composite material and a conductive composite material of positive temperature coefficient thermal sensitive resistance are alternately stacked to form a plaque-shaped composite material, then two metal foils are laminated on top surface and bottom surface of the plaque-shaped composite material as electrodes to thereby form a sandwich-like laminated material. Moreover, a cross-linking process is made to cross-link the resin inside the composite material layer. Electrode trenches are etched, and an insulating layer is formed by using green paint in the electrode trenches to isolate different electrodes on the same surface of the device.

Abstract: A method of manufacturing a support circuit includes providing a conductive layer with top and bottom surfaces, providing a top etch mask on the top surface that includes an opening that exposes a portion of the top surface, providing a bottom etch mask on the bottom surface that includes an opening that exposes a portion of the bottom surface, applying an etch to the exposed portion of the top surface through the opening in the top etch mask thereby etching partially but not completely through the conductive layer and forming a recessed portion in the conductive layer below the top surface, forming an insulative base on the recessed portion without forming the insulative base on the top surface, applying an etch to the exposed portion of the bottom surface through the opening in the bottom etch mask thereby forming a routing line in the recessed portion, applying an etch to the insulative base to form an opening in the insulative base that exposes a portion of the routing line, and applying an etch to the ex

Abstract: A method of producing a multilayer circuit board comprising a core substrate and a plurality of layers of wiring lines on both sides of the core substrate with an insulation layer being interposed therebetween; the layers of wiring lines on both sides being interconnected by conducting members provided on the inside walls of through holes going through the core substrate, and the interposed insulation layer. The method further comprising, wiring lines with an upper layer of wiring lines wherein the conducting member on the inside wall of the through hole and the via are formed in separate steps. The method can provide a multilayer circuit board which can advantageously be used to mount a chip or device thereon having an increased number of electrodes or terminals.

Abstract: A method of electroplating circuit board substrate having a high density, multi-trace circuit pattern formed on at least one major surface of an insulative substrate, without requiring formation and at least partial removal of a large plurality of electrically conductive tie bars contacting each of the circuit traces for supplying electroplating potential/current, comprises providing the at least one major surface with a single tie bar having at least a pair of laterally extending arms in simultaneous electrical contact with an end of each trace. Portions of the tie bar extension arms are selectively removed after completion of electroplating, e.g., by laser drilling or plasma etching, to electrically separate each of the circuit traces from the tie bar. According to an embodiment of the invention, electroplating is simultaneously performed on a dual-sided substrate including electrically interconnected circuit patterns formed on opposite sides thereof.

Abstract: Disclosed is a copper foil—for printed circuit boards—which is especially excellent in soft etching property and also superior in such properties as heat discoloration resistance, rust-proofing and solder-ability. The copper foil for printed circuit boards comprising a first layer formed by applying 12 to 50 mg/m2 of a sulfur-contained zinc alloy containing 0.1 to 2.5 percent by weight of sulfur on the surface on at least one side of the copper foil and a second layer formed of a chromate layer on the first layer by applying 0.5 to 2.5 mg/m2 of chromium and, if necessary, 1.5 to 6 mg/m2 of phosphorus.

Abstract: A process for producing an electrodeposited copper foil, comprising the steps of: preparing an electrolyte having a copper concentration of 60 to 90 g/lit., preferably 60 to 85 g/lit., a free sulfuric acid concentration of 80 to 250 g/lit., preferably 100 to 250 g/lit., a chloride (Cl) ion concentration of 1 to 3 ppm and a gelatin additive concentration of 0.3 to 5 ppm and electrolyzing at 40 to 60° C. and at a current density of 30 to 120 A/dm2 preferably 30 to 75 A/dm2, to thereby electrodeposit a copper foil. The obtained electrodeposited copper foil is excellent in tensile strength and elongation.

Abstract: A method and structure for a solder interconnection, using solder balls for making a low temperature chip attachment directly to any of the higher levels of packaging substrate is disclosed. After a solder ball has been formed using standard methods it is reflowed to give the solder ball a smooth surface. A layer of low melting point metal, such as, bismuth, indium or tin, preferably, pure tin, is deposited on the top of the solder balls. This structure results in localizing of the eutectic alloy, formed upon subsequent low temperature joining cycle, to the top of the high melting solder ball even after multiple low temperature reflow cycles. This method does not need tinning of the substrate to which the chip is to be joined, which makes this method economical. It has also been noticed that whenever temperature is raised slightly above the eutectic temperature, the structure always forms a liquid fillet around the joint with copper wires.

Abstract: An apparatus for plating a conductive film directly on a substrate with a barrier layer on top includes anode rod (1) placed in tube (109), and anode rings (2), and (3) placed between cylindrical walls (107) and (105), (103) and (101), respectively. Anodes (1), (2), and (3) are powered by power supplies (13), (12), and (11), respectively. Electrolyte (34) is pumped by pump (33) to pass through filter (32) and reach inlets of liquid mass flow controllers (LMFCs) (21), (22), and (23). Then LMFCs (21), (22) and (23) deliver electrolyte at a set flow rate to sub-plating baths containing anodes (3), (2) and (1), respectively. After flowing through the gap between wafer (31) and the top of the cylindrical walls (101), (103), (105), (107) and (109), electrolyte flows back to tank (36) through spaces between cylindrical walls (100) and (101), (103) and (105), and (107) and (109), respectively.

Abstract: A metal is provided on a polymeric component and the component is subjected to a removal process such as plasma or liquid etching in the presence of an electric field. The etchant selectively attacks the polymer at the boundary between the metal and the polymer, thereby forming gaps alongside the metal. A cover metal may be plated onto the metal in the gaps. The cover metal protects the principal metal during subsequent etching procedures.

Abstract: A method of processing a printed wiring board. Initial processing steps are implemented on the printed wiring board. Copper is plated on the printed wiring board from a bath containing nickel and copper. Nickel is plated on the printed wiring board from a bath containing nickel and copper and final processing steps are implemented on the printed wiring board.

Abstract: The invention relates to a palladium colloid solution, which, in addition to a palladium compound, a protective colloid for stabilizing the colloid and a reducing agent, additionally contains noble metals from the group rhodium, iridium and platinum. The solution can be used to treat electrically non-conductive substrate surfaces, particularly in order to metallize the substrate surfaces directly and electrolytically. By means of this method, the nonconductive areas of the holes in printed circuit boards can be directly electrolytically metallized.

Abstract: An apparatus is disclosed having at least one cathode adapted to maintain a line of contact with at least one substrate surface during relative movement therebetween. There is at least one anode located in a spaced relationship to the cathode and an electronically insulating member located between the at least one anode and the at least one cathode adapted to provide a gap between the substrate surface and the insulating member. When placed in a plating bath, the electric field is directed toward conducting patterns on a substrate to uniformly plate the patterns while minimizing plating on the electrode. The same device may also be used for electroetching by reversing the polarity of the electrodes.

Abstract: A method of forming a multi-layer structure over an insulating layer comprises the steps of: selectively depositing a barrier layer on a predetermined region of an insulating layer by use of a first deposition mask; selectively depositing a metal seed layer made of a metal which is different in substance from the barrier layer by use of a second deposition mask, so that the metal seed layer extends not only on an entire surface of the barrier layer but also a peripheral region positioned outside the predetermined region of the insulating layer; and forming a metal plating layer made of the metal as the seed layer, so that the metal layer is adhered on the metal seed layer whereby the metal plating layer is separated from the barrier layer and also from the insulating layer.

Abstract: A continuous layer of a metal is electrodeposited onto a substrate having both hydrodynamically inaccessible recesses and hydrodynamically accessible recesses on its surface by a two-step process in which the hydrodynamically inaccessible recesses are plated using a pulsed reversing current with cathodic pulses having a duty cycle of less than about 50% and anodic pulses having a duty cycle of greater than about 50% and the hydrodynamically accessible recesses are then plated using a pulsed reversing current with cathodic pulses having a duty cycle of greater than about 50% and anodic pulses having a duty cycle of less than about 50%.

Abstract: A method of applying a conductive carbon coating to a nonconductive surface, conductive carbon compositions for that purpose, and a printed wiring board having through holes or other nonconductive surfaces treated with such carbon compositions are disclosed. A conditioning agent, made (for example) by condensing a polyamide and epichlorohydrin, is applied to the nonconductive surface to form a conditioned surface. A liquid dispersion of electrically conductive carbon (for example, graphite) having a mean particle size no greater than about 50 microns is coated on the conditioned surface to form an electrically conductive carbon coating. The conductive carbon coating is then optionally fixed on the (formerly) nonconductive surface. Fixing may be accomplished, for example, by applying a fixing liquid such as a dilute aqueous acid to the carbon-coated surface. The coating is then dried.

Abstract: Nitride layer formation includes a method wherein a material is electrodeposited on a substrate and converted, at least in part, to a layer comprising nitrogen and the electrodeposited material. The electrodepositing may occur substantially selective on a conductive portion of the substrate. Also, the converting may comprise exposing the electrodeposited material to a nitrogen-comprising plasma. Chromium nitride and chromium oxynitride are examples of nitrogen-comprising materials. Copper or gold wiring of an integrated circuit are examples of a substrate. The processing temperature during the electrodepositing and the converting may be selected not to exceed 500° C. The thickness and composition of the nitride layer may be effective to limit diffusion of the wiring through the nitride layer. A diffusion barrier forming method may include forming a patterned layer of integrated circuit copper wiring over a substrate.

Abstract: A conveyorized electroplating device having an anode positioned proximate to a plurality of absorptive applicator assemblies that apply a plating solution to a substrate and a conveyor device that grips the substrate thereby isolating the electrical contact from the plating solution. The conveyorized electroplating device has a fluid bed assembly with a manifold and an anode, a conveyor device adjacent to the fluid bed assembly, and a plurality of absorptive applicator assemblies, wherein the plurality of absorptive applicator assemblies are adjacent and in close proximity to the anode and in fluid communication with the fluid bed assembly. The conveyor device isolates the electrical contacts from the plating solution and is able to handle various sizes and thicknesses of substrates.

Abstract: A printed circuit board with a solid metallic interconnect which gives a stable and effective electrical interconnection between metallic layers separated by one or more dielectric layers. The method of producing the interconnect includes creating the solid metallic interconnect by metallic plating on the base copper at the interconnecting location, followed by the lamination of the appropriate dielectric layer. This dielectric layer may have a pre-cut hole corresponding to the solid metallic interconnect, which is registered with the interconnect before lamination. A layer of dielectric polymer is then removed from the interconnect by traditional methods. This is followed by electroplating and conventional metallization and circuitry formation. This process may also be applied to create an interconnect spanning more than one dielectric layer.

Abstract: A process for electroplating a substrate by coating the substrate with a coating of carbonaceous particles. The coating of particles is applied to the substrate from an aqueous dispersion and then dried by passing the substrates between opposing resilient rollers and preferably passed an air knife.

Abstract: In order to form metallic conductor patterns having connection regions that can be soldered and/or bonded on electrically insulating substrates, firstly a metalization is applied to the substrate and is then removed again, at least in those regions adjoining the desired conductor pattern. There then follows the electrolytic deposition of a final surface which can be soldered and/or bonded to the connection regions. Clean-room conditions are not necessary.

Abstract: A multilayer printed circuit board having resinous insulating layers and conductor layers alternately superposed on a circuit board with ample adhesive strength, a method for the production thereof, and a curable resin composition useful for the formation of resinous insulating layers are disclosed. The manufacture of the multilayer printed circuit board is accomplished by applying the curable resin composition to the surface of conductor layer of the circuit board, thermally curing the applied layer thereby forming resinous insulating layer, then boring a through-hole in the circuit board, treating the resinous insulating layer with a coarsening agent thereby imparting undulating coarsened surface thereto, subsequently coating the surface of resinous insulating layer and the inner surface of the through-hole with a conductor layer as by electroless plating, and thereafter forming a prescribed circuit pattern in the conductor layer.

Abstract: The current density with which the process is used is of essential importance for the economy of a method of electrolytically treating materials. Normally only low or medium current densities are used, as the speed of replacement of consumed materials in the direct vicinity of the surface of the material for treatment has a restrictive effect on the magnitude of the current density at which a usable process result can still be achieved. However, a low current density leads to long electrolysis times and to complex treatment installations.

Abstract: A method for forming a metallization layer (30). A first layer (14) is formed outwardly from a semiconductor substrate (10). Contact vias (16) are formed through the first layer (14) to the semiconductor substrate (10). A second layer (20) is formed outwardly from the first layer (14). Portions of the second layer (20) are selectively removed such that the remaining portion of the second layer (20) defines the layout of the metallization layer (30) and the contact vias (16). The first and second layers (14) and (20) are electroplated by applying a bi-polar modulated voltage having a positive duty cycle and a negative duty cycle to the layers in a solution containing metal ions. The voltage and surface potentials are selected such that the metal ions are deposited on the remaining portions of the second layer (20). Further, metal ions deposited on the first layer (14) during a positive duty cycle are removed from the first layer (14) during a negative duty cycle.

Abstract: A method of applying a conductive carbon coating to a non-conductive surface, conductive carbon compositions for that purpose, and a printed wiring board having through holes or other nonconductive surfaces treated with such carbon compositions are disclosed. A liquid dispersion of electrically conductive carbon (for example, graphite) having a mean particle size no greater than about 50 microns is coated on the non-conductive surface to form an electrically conductive carbon coating. The conductive carbon coating is then fixed on the (formerly) nonconductive surface. Fixing may be accomplished in a variety of different ways. For example, the fixing step can be carried out by applying a fixing liquid to the carbon-coated surface. One example of a suitable fixing liquid is a dilute aqueous acid. Fixing may also be carried out by removing the excess carbon dispersion with an air knife or other source of compressed air.

Abstract: A method is provided for selectively electrochemically depositing copper. The method includes forming a layer of dielectric material above a structure layer, forming a conductive layer above the layer of dielectric material and forming an opening in the conductive layer and the layer of dielectric material. The method also includes selectively forming at least one barrier metal layer and a copper seed layer only in the opening, the at least one barrier metal layer and the copper seed layer being conductively coupled to the conductive layer. The method further includes forming an insulating layer above the conductive layer, and selectively electrochemically depositing copper only in the opening.

Abstract: A process for making a printed circuit board is provided. The process employs a noble metal as an etch mask for subtractive circuitization and as a seed layer for secondary finishing. In a preferred embodiment of the invention, a dielectric is covered by a conductive layer of metal such as copper, a patterned photoresist is applied, additional copper is deposited on areas not covered by the photoresist, and a palladium etch mask/seed layer is deposited on the copper. The palladium layer remains sufficiently active for deposition of nickel or gold on the circuitry for purposes such as wire bonding.

Abstract: In wiring circuit board having fine and isolated conductor circuit pattern, a metal deposit coat is formed at desired position on the isolated conductor circuit pattern without damaging conductor circuit of the pattern, as an object of the invention. An electrically conducting layer consisting of a material electrically conducting and peelable with one of heat, solvent and alkali is formed on the wiring circuit board so as to be at least in contact with the isolated conductor circuit pattern on which the deposit coat is to be formed, a peelable protect layer is formed to be superposed on the electrically conducting layer at least at other portions than the portion where the deposit coat is to be formed, a metal deposition is performed on the portion not coated with the protect layer by means of an electroplating with the electrically conducting layer used as a power supply layer, and the electrically conducting and protect layers left on the wiring circuit board are peeled off.

Abstract: An electroplating system includes a tank that holds an electrolytic bath solution. An anode within the tank receives a first voltage having a first potential. A substrate cathode, immersible in the solution within the tank, spaced from the anode, receives a second voltage having a second potential, opposite to that of the first potential. A shield is immersible in the solution within the tank between the anode and cathode. The level of shielding provided by the shield is variable and controllable. In one embodiment, the shield includes a conductive element that receives a third voltage having the first potential, the magnitude of the third voltage being controllable. In another embodiment, the shield includes at least one louver, the physical orientation of which is controllably adjustable. The shield is sufficiently spaced from the substrate cathode to be substantially outside an area of sparging and is fixed between the anode and cathode.

Abstract: A process with the following process steps is used to electrolytically deposit copper layers, especially on printed circuit boards. An electrically-conductive substrate and anodes that decompose upon electrolytic deposition are brought into contact with a deposition bath. The deposition bath contains copper ions, compounds that increase the electrical conductivity of the deposition bath, additives to influence the material properties of the copper layers, additional compounds of an electrochemically reversible redox system, and solvents or solvent mixtures. The substrate and the electrodes are connected to a power supply. The copper layers are deposited on the substrate using a pulsed current or a pulsed voltage process. When this process is used, metal layers with favorable visual and mechanical material properties are deposited after a brief bath preparation time.

Abstract: A method of providing an electrically conductive polymer coating on a copper clad circuit board prior to electroplating is disclosed. The method teaches the application of certain organic solvents to a conductive polymer composition already applied to the board but before drying the conductive polymer composition to remove liquids therefrom to form a conductive polymer film.

Abstract: The present invention relates to a bipolar electrochemical process for toposelective electrodeposition of a substance on a substrate comprising (a) placing the substrate and at least one of the substance and a source of the substance into an environment capable of conducting electricity and containing electrodes; (b) aligning the substrate on which the substance is to be deposited with respect to the electrodes such that the electrodes are not in contact with the substrate and the substance will be deposited in a predetermined location on the substrate when an electric field is applied; and (c) applying a voltage to the electrodes to create an electric field of a sufficient strength between the electrodes and for a time sufficient to deposit the substance on the substrate at the predetermined location in substantial alignment with the electric field.

Abstract: There is provided a method of fabricating a multi-layered printed wiring board, including the steps of (a) forming a multi-layered substrate with a hole which will make a blind via-hole, (b) plating the multi-layered substrate, (c) forming an internal layer circuit pattern and an external layer circuit pattern, (d) laying one multi-layered substrate on another, (e) forming a product of the step (d) with a through-hole, (f) covering surfaces of a product of the step (e) including an inner wall surface of the through-hole with an electrically conductive film, (g) forming a resist in an area other than the through-hole, (h) plating the inner wall surface of the through-hole, (i) removing the resist, and (j) removing the electrically conductive film formed on the surfaces of the product of the step (e).

Abstract: A method of forming circuit lines on a substrate by applying a roughened conductive metal layer using a copper foil carrier. The copper foil is etched away, leaving the roughened conductive metal embedded in the surface of the substrate. The conductive metal may be treated to remove an oxide layer. A photoresist may also be applied over the treated conductive metal layer to define a fine line circuit pattern. The photoresist defining the fine line circuit pattern is then removed to expose trenches in accordance with the desired circuit pattern. Copper is applied into the trenches over the exposed conductive metal, and the remaining photoresist, and conductive metal underlying the remaining photoresist, is removed to finish the fine line circuit pattern.

Abstract: Methods of electroplating solder bumps of uniform height on integrated circuit substrates include the steps of drawing plating current through an integrated circuit wafer by electrically shorting an integrated circuit's ground, power and signal pads together using an ultra-thin plating base layer (e.g., <0.075 .mu.m thick) and then using a backside wafer contact to draw electroplating current along parallel paths which extend through the ground and signal pads and into the substrate. The ground pads are preferably electrically coupled to the substrate at substrate contact regions (e.g., N + or P + diffusion regions) and the signal pads are preferably electrically coupled to the substrate through active semiconductor devices (e.g., FETs, BJTs, . . . ) to which the signal pads are attached. Plating current is preferably drawn in parallel through an integrated circuit's active semiconductor devices and substrate contact regions.

Abstract: Erosion of high density metallization areas associated with conventional damascene-CMP processing is avoided and greater planarity achieved by selectively increasing the metal overburden layer thickness at high density metallization regions. Embodiments include initially filling recesses formed in the substrate surface with a metal forming a blanket or overburden layer of the metal thereon. Regions of the blanket or overburden layer overlying regions of high density metallization are selectively electroplated to a greater thickness. The surface is then planarized by CMP, with the selectively increased thickness areas of the overburden layer compensating for greater erosion rates thereat during CMP, thereby resulting in greater planarity of the polished surface.

Abstract: Described herein is an improved process for electroplating a conductive metal layer to the surface of a nonconductive material comprising pretreating the material with a carbon black dispersion followed by a graphite dispersion before the electroplating step.