Product Is Circuit Board Or Printed Circuit Patents (Class 205/125)
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Patent number: 5690805Abstract: A method of applying a conductive carbon coating to a non-conductive layer, conductive carbon compositions, and a printed wiring board having through holes or other surfaces treated with such carbon compositions are disclosed. A board or other substrate including at least first and second electrically conductive metal layers separated by a non-conductive layer is provided. The board has a recess extending through at least one of the metal layers into the non-conductive layer. The recess has a non-conductive surface which is desired to be made electrically conductive. The carbon in the dispersion has a mean particle size no greater than about 50 microns. The method is carried out by applying the carbon dispersion to a non-conductive surface of the recess to form a substantially continuous, electrically conductive carbon coating. Optionally, the coating is then fixed, leaving the carbon deposit as a substantially continuous, electrically conductive layer. Chemical and physical fixing steps are disclosed.Type: GrantFiled: June 7, 1995Date of Patent: November 25, 1997Assignee: Electrochemicals Inc.Inventors: Charles Edwin Thorn, Frank Polakovic, Charles A. Mosolf
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Patent number: 5683565Abstract: A process for electroplating a substrate by coating the substrate with a coating of conductive particles. The coating of conductive particles is applied to the substrate from an aqueous dispersion containing a dissolution agent for metallic regions of the substrate. The dissolution agent removes the top surface of the metal as the conductive particle coating is formed thereby facilitating removal of the same from the metallic regions of the substrate.Type: GrantFiled: May 23, 1996Date of Patent: November 4, 1997Assignee: Shipley Company, L.L.C.Inventors: Steven M. Florio, Jeffrey P. Burress, Carl J. Colangelo, Edward C. Couble, Mark J. Kapeckas
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Patent number: 5681443Abstract: An electrolytic cell comprised of a tank for holding electrolytic solution, and a drum rotatable about a horizontal axis having a non-conductive cylindrical outer surface disposed within the tank, and a plurality of elongated, like anodes arranged about the outer surface of the drum. The anodes together form a generally continuous cylindrical surface spaced from, and generally conforming to, the outer surface of the drum. Each of the anodes has at least one end projecting through the tank. A plurality of power sources is provided together with connection means for connecting groups of one or more of the projecting ends of the anodes to each power source.Type: GrantFiled: February 21, 1996Date of Patent: October 28, 1997Assignee: Gould Electronics Inc.Inventors: Thomas J. Ameen, Robert D. DeWitt, Peter Peckham, Ronald K. Haines, Adam G. Bay
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Patent number: 5681444Abstract: Electrical feedthroughs in printed circuit board support substrates for use in making double sided ceramic multilayer printed circuit boards are made by insulating the feedthrough openings with a first layer of nickel oxide and one or more layers of glass, and then filling the remainder of the feedthroughs with a conductive metal via fill ink. After firing, the resultant structure provides insulated electrical feedthroughs through the support substrate.Type: GrantFiled: July 3, 1996Date of Patent: October 28, 1997Assignee: David Sarnoff Research Center, Inc.Inventors: Thomas Peter Azzaro, Barry Jay Thaler, Edward James Conlon, Ananda Hosakere Kumar
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Patent number: 5681441Abstract: A method for the electroplating of conductive metal onto a substrate containing at least one hole and an electroplateable surface which is conducive to subsequent metal deposition comprises placing the substrate in close proximity to an electrode but such that there is no substantial electrical continuity between the electroplateable surface and the electrode prior to electroplating. The electroplateable surface is preferably an electroplateable pattern which comprises either a conductive metal pattern or a catalytic pattern for subsequent plating. This process can be employed with any electroplateable pattern technique which is recognized in the art such as, for example, printing, stamping, plating, photographic or electrophotographic processes. In one embodiment, this process can be employed in the production of Plated Wire, i.e., a product which can be effectively employed as a replacement for drawn wires in power distribution applications.Type: GrantFiled: December 22, 1992Date of Patent: October 28, 1997Assignee: ELF Technologies, Inc.Inventors: Leo Gulvad Svendsen, Clifford James Walker, James Leborn Lykins, II
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Patent number: 5679230Abstract: A electrolytically deposited copper foil has a roughening treatment of copper on the shiny side and on the matte side a fine nodular metal deposit preferably copper or a copper alloy which improves adhesion to a substrate, but is insufficient to increase the measured surface roughness Rz.Type: GrantFiled: August 21, 1995Date of Patent: October 21, 1997Assignee: Oak-Mitsui, Inc.Inventors: John Francis Fatcheric, Derek Charles Carbin
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Patent number: 5679502Abstract: An X-ray source such as a synchrotron which provides a significant spectral content of hard X-rays is used to expose relatively thick photoresist such that the portions of the photoresist at an exit surface receive at least a threshold dose sufficient to render the photoresist susceptible to a developer, while the entrance surface of the photoresist receives an exposure which does not exceed a power limit at which destructive disruption of the photoresist would occur. The X-ray beam is spectrally shaped to substantially eliminate lower energy photons while allowing a substantial flux of higher energy photons to pass through to the photoresist target. Filters and the substrate of the X-ray mask may be used to spectrally shape the X-ray beam. Machining of photoresists such as polymethylmethacrylate to micron tolerances may be obtained to depths of several centimeters, and multiple targets may be exposed simultaneously.Type: GrantFiled: March 15, 1995Date of Patent: October 21, 1997Assignee: Wisconsin Alumni Research FoundationInventors: David Peter Siddons, Erik D. Johnson, Henry Guckel, Jonathan L. Klein
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Patent number: 5674372Abstract: A process is disclosed for the direct electroplating of a non-conductive material comprising non-conductive surfaces and metallic surfaces. The process involves contacting the non-conductive material with a compound capable of selectively forming a sacrificial layer on the metallic surfaces which sacrificial layer is substantially insoluble in alkaline or neutral media but soluble in acidic media. The foregoing step is followed by deposition of carbon onto the surfaces followed by contact with an acidic solution and subsequent electroplating.Type: GrantFiled: September 24, 1996Date of Patent: October 7, 1997Assignee: Mac Dermid, IncorporatedInventors: Peter Kukanskis, Kathleen Yocis, Christopher Larson
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Patent number: 5667662Abstract: A process for electroplating a nonconducting substrate comprising formation of a film of a conductive polymer on the surface of a nonconducting substrate and electrolytic deposition of metal thereover. The conductive film is formed by deposition of the conductive polymer onto said surface from an aqueous suspension of said polymer containing a polymeric stabilizer having repeating alkylene oxide groups and a hydrophilic--lipophilic balance of at least 10.Type: GrantFiled: April 1, 1996Date of Patent: September 16, 1997Assignee: Shipley Company, L.L.C.Inventors: Wade Sonnenberg, Patrick J. Houle, Thong B. Luong, James G. Shelnut, Gordon Fisher
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Patent number: 5632927Abstract: The modification of carbon particles is disclosed for achieving enhanced plating upon a non-conductive surface which has been previously treated with said modified carbon particles. The invention is particularly useful in plating through holes of printed circuit boards.Type: GrantFiled: February 21, 1996Date of Patent: May 27, 1997Assignee: MacDermid, IncorporatedInventors: Donald Ferrier, Rosa Martinez, Eric Yakobson
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Patent number: 5626736Abstract: A process for electroplating a metal clad substrate by forming a sacrificial coating over the metal cladding and then coating the substrate with a coating of carbonaceous particles. The coating of particles is applied to the substrate from an aqueous dispersion and then the coating is contacted with an etchant for the sacrificial coating to undercut the carbonaceous coating and facilitate its removal from areas where plating is undesired.Type: GrantFiled: January 19, 1996Date of Patent: May 6, 1997Assignee: Shipley Company, L.L.C.Inventors: Steven M. Florio, Jeffrey P. Burress, Carl J. Colangelo, Edward C. Couble, Mark J. Kapeckas
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Patent number: 5622895Abstract: Multilayer circuit devices include a plurality of metallized patterns thereon, said patterns being separated by a polymeric dielectric film. The various metallized patterns are interconnected by means of microvias through the polymeric film or films. Each of the metallizations is a composite including in succession from the substrate or from the polymeric film, a layer of titanium (Ti), a layer of titanium and palladium alloy (Ti/Pd), a layer of copper (Cu), and a layer of titanium and palladium alloy (Ti/Pd). The Ti-Ti/Pd-Cu-Ti/Pd composite is hereinafter referred to as TCT. The adhesion between the polymeric film and the top Ti/Pd layer is better than that between the polymer and gold (Au) and comparable to that between the polymer and an adhesion promoted Au layer. Use of the TCT metallization also results in additional cost reduction due to the elimination of Ni and Au layers on top of the Cu layer.Type: GrantFiled: August 4, 1995Date of Patent: April 22, 1997Assignee: Lucent Technologies Inc.Inventors: Aaron L. Frank, Ajibola O. Ibidunni, Douglas B. Johnson, Dennis L. Krause, Trac Nguyen
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Patent number: 5620800Abstract: A laminated structure (1) comprising a substrate (3) and a polymer layer (5) is provided. The polymer layer consists of conductive areas (7) having a sheet resistance of maximally 1000 .OMEGA./square. The adjacent parts of the polymer layer are substantially non-conductive and have a sheet resistance which is a factor of 10.sup.6 higher. An electrodeposited metal layer (9), for example of copper, is present on the conductive areas (7).A simple method of photochemically generating the conductive pattern (7) which can be reinforced in an aqueous metal-salt solution by electrodeposition of a metal layer (9) is also provided and most preferably the conductive pattern is inter alia, the patterned exposure of a layer of 3,4-ethylene dioxythiophene or polyaniline. The method can very suitably be used for the manufacture of metal patterns on insulating substrates, such as printed circuit boards.Type: GrantFiled: March 30, 1995Date of Patent: April 15, 1997Assignee: U.S. Philips CorporationInventors: Dagobert M. De Leeuw, Cornelius M. J. Mutsaers
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Patent number: 5618400Abstract: A process for electroplating a substrate by coating the substrate with a coating of conductive particles. The coating of conductive particles is applied to the substrate from an unstable aqueous dispersion essentially free of a dispersing agent using physical dispersion means to maintain the stability of the dispersion.Type: GrantFiled: September 19, 1995Date of Patent: April 8, 1997Assignee: Shipley Company, L.L.C.Inventors: Steven M. Florio, Jeffrey P. Burress, Carl J. Colangelo, Edward C. Couble, Mark J. Kapeckas
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Patent number: 5616230Abstract: A process for plating an electrically nonconductive substrate by the following sequence of steps:(1) a step of treating an electrically nonconductive substrate with a solution containing a silane coupling agent;(2) a step of treating the electrically nonconductive substrate from said step (1) with a solution containing an anionic surfactant;(3) a step of the electrically nonconductive substrate from said step (2) with a solution containing a palladium compound and at least one nitrogen-containing sulfur compound selected from among thiourea and its derivatives;(4) a step of treating the electrically nonconductive substrate from said step (3) with a reducing solution containing at least one member selected from among sodium borohydride, sodium hypophosphite, hydrazine, dimethylaminoborane, hydroxylamine and glyoxylic acid; and(5) a step of forming an electroplating layer on the electrically nonconductive substrate from said step (4).Type: GrantFiled: January 20, 1995Date of Patent: April 1, 1997Assignee: Okuno Chemical Industries Co., Ltd.Inventors: Kuniaki Otsuka, Kazue Yamamoto, Satoshi Konishi, Shigeru Yamato
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Patent number: 5611905Abstract: A process for electroplating a substrate by coating the substrate with a coating of conductive particles. The coating of conductive particles is applied to the substrate from an aqueous dispersion containing a dissolution agent for metallic regions of the substrate. The dissolution agent removes the top surface of the metal as the conductive particle coating is formed thereby facilitating removal of the same from the metallic regions of the substrate.Type: GrantFiled: June 9, 1995Date of Patent: March 18, 1997Assignee: Shipley Company, L.L.C.Inventors: Steven M. Florio, Jeffrey P. Burress, Carl J. Colangelo, Edward C. Couble, Mark J. Kapeckas
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Patent number: 5609746Abstract: In the manufacture of a printed circuit board a sacrificial tin-lead layer is deposited on the surface of the board by electroplating. Holes are then formed in the board by UV laser ablation. Debris from the ablation process is adsorbed on the sacrificial layer. The sacrificial layer is then removed by means of a chemical stripping process, along with the debris.Type: GrantFiled: October 3, 1995Date of Patent: March 11, 1997Assignee: International Computers LimitedInventors: Simon Farrar, Neil Taylor
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Patent number: 5578186Abstract: A method for forming an acrylic resist on a surface of a copper layer includes the steps of processing a surface of the copper layer by an ammonia water, and depositing a layer of acrylic resist on the surface of the copper layer after a processing by the ammonia water.Type: GrantFiled: March 8, 1995Date of Patent: November 26, 1996Assignee: Fujitsu LimitedInventor: Norikazu Ozaki
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Patent number: 5575898Abstract: Process for through-hole plating of printed circuit boards and multilayers by applying a conductive layer of a polythiophene onto the walls of the through-holes and electrodeposition of copper onto the walls of the through-holes, characterized in that a microemulsion of a monomeric thiophene of the formula (I) is used to form the conductive polythiophene layer, ##STR1## in which X denotes oxygen or a single bond,R.sub.1 and R.sub.2 mutually independently denote hydrogen or a C.sub.1 -C.sub.4 alkyl group or together form an optionally substituted C.sub.1 -C.sub.4 alkylene residue or a 1,2-cyclohexylene residue,and in that the conductive layer of polythiophene is produced on the walls of the through-holes by subsequent or simultaneous treatment with acid and, finally, a metal is electro-deposited on this conductive base.Type: GrantFiled: September 20, 1995Date of Patent: November 19, 1996Assignee: Bayer AGInventors: Gerhard-Dieter Wolf, Friedrich Jonas, Reinhard Schomacker
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Patent number: 5568288Abstract: An electro-optic device featuring an semiconductor device formed by providing an insulator over a gate electrode, and anodic oxidizing only the sides of the gate electrode.Type: GrantFiled: November 16, 1993Date of Patent: October 22, 1996Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Akira Mase, Masaaki Hiroki
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Patent number: 5567295Abstract: An inexpensive method for fabricating a staggered edge connector for a circuit board. The method is cost effective and includes numerous advantages over the prior art, including allowing more area for signal routing and removing the problems associated with capacitive stubs on edge connector traces associated with prior art designs. The method begins with creating a staggered plurality of blades or fingers. A plating bus is formed on these staggered blades by connecting a gold plating bus to one of the contact pads and then shorting together or connecting the signal lines via a shorting bus. The shorting bus is placed flush with the innermost edge of the edge connector well outside of the actual wipe area of the connectors. The board then undergoes a standard semi-additive process, as well as a final etch and subsequent gold plating. The shorting bar is then drilled out.Type: GrantFiled: January 11, 1994Date of Patent: October 22, 1996Assignee: Dell USA L.P.Inventors: Deepak N. Swamy, Victor K. Pecone
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Patent number: 5546655Abstract: A flex or TAB product suitable for chip carrier applications wherein the flex reliability problems caused by copper dendrite growth and lead bending during power and thermal cycling are reduced by application of special coatings to lead areas of the flex tape.Type: GrantFiled: October 25, 1994Date of Patent: August 20, 1996Assignee: International Business Machines CorporationInventors: Claudius Feger, Teresita O. Graham, Kurt R. Grebe, Alphonso P. Lanzetta, John J. Liutkus, Linda C. Matthew, Michael J. Palmer, Nelson R. Tanner, Ho-Ming Tong, Charles H. Wilson, Helen L. Yeh
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Patent number: 5547559Abstract: The invention described provides a process for direct electroplating on activated surfaces substantially without the formation of a smut layer and thereby improving the adhesion of the plated deposit to the surface. The use of divalent or tetravalent sulfur compounds and/or cathodic electrocleaning is proposed between activation of the surface and electroplating of the surface.Type: GrantFiled: July 10, 1995Date of Patent: August 20, 1996Assignee: MacDermid, IncorporatedInventors: Peter Kukanskis, Ernest Yakobson, Lev Taytsas
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Patent number: 5547558Abstract: The invention relates to a process for directly electroplating a conductive metal to the inner walls of through-holes in printed-wiring boards. The process comprises steps of providing an aqueous dispersion containing graphite particles with an average particle diameter of 2 .mu.m or less or carbon black particles with an average particle diameter of 1 .mu.m or less; applying this aqueous dispersion to a surface of a nonconductive surface substrate; dipping the nonconductive surface in a strong acidic aqueous solution with pH 3 or lower to form a layer of said particles; and electroplating using the particle layer as a conductive layer.Type: GrantFiled: March 15, 1995Date of Patent: August 20, 1996Assignee: MEC Co., Ltd.Inventors: Yoshihiro Sakamoto, Toshio Tanimura
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Patent number: 5545429Abstract: The present invention is directed to a process of a method for the full metallization of thru-holes in a polymer structure comprising the steps of applying a film-forming amount of a conductive polymer-metal composite paste to a metal cathode; bonding a patterned polymer structure to said paste; subjecting said polymer structure to an electrolytic plating bath for a time sufficient to fully metallize thru-hole surfaces in said patterned polymer structure and removing the structure from the cathode assembly. The fully metallized thru-hole polymer structure can then be cleaned and polished to produce a finished product.Type: GrantFiled: July 1, 1994Date of Patent: August 13, 1996Assignee: International Business Machines CorporationInventors: Richard B. Booth, Emanuel I. Cooper, Edward A. Giess, Mark R. Kordus, Sol Krongelb, Steven P. Ostrander, Judith M. Roldan, Carlos J. Sambucetti, Ravi Saraf
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Patent number: 5545308Abstract: The present invention provides electronically conducting polymer films formed from photosensitive formulations of pyrrole and an electron acceptor that have been selectively exposed to UV light, laser light, or electron beams. The formulations may include photoinitiators, flexibilizers, solvents and the like. These solutions can be used in applications including printed circuit boards and through-hole plating and enable direct metallization processes on non-conducting substrates. After forming the conductive polymer patterns, a printed wiring board can be formed by sensitizing the polymer with palladium and electrolytically depositing copper.Type: GrantFiled: June 19, 1995Date of Patent: August 13, 1996Assignee: Lynntech, Inc.Inventors: Oliver J. Murphy, G. Duncan Hitchens, Dalibor Hodko, Eric T. Clarke, David L. Miller, Donald L. Parker
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Patent number: 5543182Abstract: A process for applying a metal coating to a non-conductive substrate without an electroless coating is disclosed. The process includes the step of: a. contacting said substrate with an activator comprising a noble metal/Group IVA metal sol to obtain a treated substrate; b. contacting said treated substrate with a self accelerating and replenishing immersion metal composition comprising a solution of (i) a soluble metal salt whose metal is more noble than said Group IVA metal, (ii) a Group IA metal hydroxide, (iii) a complexing agent comprising an organic material having a cumulative formation constant log K of from about 0.73 to about 21.95 for an ion of the metal of said metal salt. The Group IVA metal is employed in a stoichiometric excess compared to the noble metal, the excess Group IVA metal being in its lowest oxidation state. Self accelerating and replenishing non-formaldehyde immersion metal compositions are also disclosed.Type: GrantFiled: February 16, 1995Date of Patent: August 6, 1996Assignee: Atotech USA, Inc.Inventors: Nayan Joshi, John E. McCaskie, Michael T. Boyle
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Patent number: 5536386Abstract: The modification of carbon particles is disclosed for achieving enhanced plating upon a non-conductive surface which has been previously treated with said modified carbon particles. The invention is particularly useful in plating through holes of printed circuit boards.Type: GrantFiled: February 10, 1995Date of Patent: July 16, 1996Assignee: MacDermid, IncorporatedInventors: Donald Ferrier, Rosa Martinez, Eric Yakobson
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Patent number: 5534127Abstract: A solder bump 3a is formed on an electrode 2 provided on a printed circuit board 1. First, a core 3 is formed on the electrode 2. Then, solder paste 3' is coated on the core 3 so as to cover an entire surface of the core 3. Subsequently, the solder paste 3' is heated until the solder paste 3' fuses together with the core 3, thereby forming the bump 3a on the electrode 2.Type: GrantFiled: January 11, 1995Date of Patent: July 9, 1996Assignee: Matsushita Electric Industrial Co., Ltd.Inventor: Tadahiko Sakai
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Patent number: 5525204Abstract: Fabricating a printed circuit by forming layers of metallization in a predetermined sequence, where each layer is formed in a predetermined pattern, with a layer of plating formed at selected locations of the printed circuit. Subsequently, forming a layer of insulation over the layers of metallization, except at the selected locations.Type: GrantFiled: September 29, 1994Date of Patent: June 11, 1996Assignee: Motorola, Inc.Inventors: John Shurboff, Ang L. Eng
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Patent number: 5525205Abstract: A process for forming an electrical circuit component includes forming an initial metal layer on a surface of a synthetic plastics substrate, and irradiating the initial metal layer with laser light along a closed path so as to remove the initial metal layer therealong. The closed path irradiated by the laser light thereby establishes an insulating region covered by a first portion of the initial metal layer which is bounded by the closed path, and a conducting region covered by a second portion of the initial metal layer which surrounds the closed path and the insulating region established thereby. A further metal layer is then formed over the second portion of the initial metal layer of the conducting region. The first portion of the initial metal layer of the insulating region may thus be removed to thereby expose a corresponding surface portion of the synthetic plastics substrate.Type: GrantFiled: August 19, 1994Date of Patent: June 11, 1996Assignee: Polyplastics Co., Ltd.Inventor: Takayuki Miyashita
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Patent number: 5516416Abstract: An apparatus and a method for electroplating pin grid array (PGA) packaging modules by utilizing a compressible member and an electrically conductive foil for providing electrical connections to the pins such that all the critical areas of the pins, the wire bond pads, the seal band and the die cavity are electroplated simultaneously through the connection to the pins.Type: GrantFiled: December 14, 1994Date of Patent: May 14, 1996Assignee: International Business Machines CorporationInventors: Donald F. Canaperi, Kim H. Ruffing
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Patent number: 5480835Abstract: A method for forming an electrical interconnect on a substrate. At least one pad (14) is formed on a substrate (11). The pad (14) is formed having a non-wetting surface (12) and a wettable surface (13). Photoresist (44) is patterned on a substrate (41) forming a cavity on a pad (46) leaving a non-wetting surface (42) and a wettable surface (43) exposed. Interconnect material (56) is formed on a non-wetting surface (52) and a wettable surface (53) of pad 57. Interconnect material (56) is reflowed forming an interconnect ball (74) on a wettable surface (73). Surface tension causes interconnect material (56) when reflowed to flow from a non-wetting surface (72) to the wettable surface (73) and ball up to form the interconnect ball (74).Type: GrantFiled: December 5, 1994Date of Patent: January 2, 1996Assignee: Motorola, Inc.Inventors: Francis J. Carney, George F. Carney, Douglas G. Mitchell
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Patent number: 5476580Abstract: A composition and process for preparing a non-conductive substrate for electroplating. The composition comprises 0.1 to 20% by weight carbon (e.g. graphite or carbon black) having a mean particle size within the range of 0.05 to 50 microns; optionally, 0.01 to 10% by weight of a water soluble or dispersible binding agent for binding to the carbon particles; optionally, an effective amount of an anionic dispersing agent for dispersing the bound carbon particles; optionally, an amount of a surfactant that is effective for wetting the through hole; a pH within the range of 4-14; and an aqueous dispersing medium. Improved methods of applying the composition to a through hole, a printed wiring board having a through hole treated with the composition, and a method of fixing a carbon coating deposited on a through hole using an acid solution are also disclosed.Type: GrantFiled: May 3, 1994Date of Patent: December 19, 1995Assignee: Electrochemicals Inc.Inventors: Charles E. Thorn, Frank Polakovic, Charles A. Mosolf
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Patent number: 5474798Abstract: The present invention relates to a process for the manufacture of printed circuit boards. The method contemplates the use of electroless nickel as the primary medium for interconnection, for building circuitry to the desired thickness and as an etch resist. The method is particularly versatile in reducing the number of steps and variety of chemicals currently necessary to produce these circuit boards.Type: GrantFiled: August 26, 1994Date of Patent: December 12, 1995Assignee: MacDermid, IncorporatedInventors: Gary B. Larson, Donna Kologe, Cynthia Retallick, Jon Bengston
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Patent number: 5474666Abstract: Water spotting which occurs during rinsing of an electrodeposited photosensitive resist composition on a copper layer of a printed circuit board is reduced by applying an aqueous solution containing a surfactant. The surfactant is preferably a salt of an acylated polypeptide which is solid at ambient room temperature and forms a thin uniform film when the solution is dried.Type: GrantFiled: November 24, 1993Date of Patent: December 12, 1995Assignee: Nippon Paint Co., Ltd.Inventors: Mamoru Seio, Kazuyuki Suga, Kanji Nishijima
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Patent number: 5458763Abstract: A wiring pattern forming method in which side etch of a wiring pattern at the time of etching the substrate copper foil of a copper plating pattern is reduced to hold down an increase in line resistance, the wiring pattern forming method including the steps of: providing a plating resist pattern of which open area comprises a wiring pattern on the surface of a copper-clad laminate which is obtained by providing a copper foil on an insulating substrate; plating such open area with copper to form a copper plating pattern; then plating a crevice between the copper plating pattern and the plating resist pattern with a solder film by alternately repeating application of a current for a predetermined time period and suspension of the current application for a predetermined time period; and etching away the copper foil by using the solder film as an etching resist to form the wiring pattern.Type: GrantFiled: November 12, 1993Date of Patent: October 17, 1995Assignee: Hitachi, Ltd.Inventors: Shiro Kobayashi, Toshinari Takada, Haruo Akahoshi, Tomoyuki Miyazaki, Kanji Yamamoto
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Patent number: 5456817Abstract: There is disclosed a treating process whereby the thermal oxidation resistance on the shiny side of a copper foil is enhanced so that the shiny side will not discolor on heating to higher temperatures than usual, without impairing the foil's solder wettability, adhesion to resist, and other properties. A Zn-Ni alloy layer which comprises 50-97 wt % Zn and 3-50 wt % Ni or a Zn-Co alloy layer which comprises 50-97 wt % Zn and 3-50 wt % Co is formed on the shiny side of a copper foil at a deposition quantity of 100-500 .mu.g/dm.sup.2 and then the alloy surface is treated for Cr-base corrosion-preventive coating. The Cr-base corrosion-preventive treatment comprises (1) a treatment for forming a coating film of chromium oxide alone, (2) a treatment for forming a mixed coating film of chromium oxide and zinc and/or zinc oxide or (1)+(2). The roughened side of the copper foil may be treated to form thereon a layer of single metal or alloy of two or more metals chosen from among Cu, Cr, Ni, Fe, Co, and Zn.Type: GrantFiled: October 21, 1994Date of Patent: October 10, 1995Assignee: Nikko Gould Foil Co., Ltd.Inventors: Eiji Hino, Keisuke Yamanishi, Kazuhiko Sakaguchi
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Patent number: 5454928Abstract: A method of forming solid metal vias extending between the top and bottom surfaces of a substrate with the ends of the vias being substantially coplanar with the top and bottom surfaces. The method includes the steps of forming holes through the substrate, plating the interior of the holes with excess metal to fill the holes and extend beyond the ends of the holes, heating the substrate to cause the metal to melt and consolidate to form solid vias with domed ends, and lapping the top and bottom surfaces of the substrate to remove the domes. Conductive layers may then be formed over the vias. These layers may have windows over a portion of each via to provide an escape route for expanding fluids during further processing of the substrate.Type: GrantFiled: January 14, 1994Date of Patent: October 3, 1995Assignee: Watkins Johnson CompanyInventors: Michael R. Rogers, Theodore E. Washburn, Michael A. Novice, Ronald S. Besser, Brian S. White
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Patent number: 5454930Abstract: An electrolytic copper plating method using a reducing agent is provided, wherein a catalyzed, electrically nonconductive substrate is dipped in a solution, which contains a copper salt, a copper-reducing agent for the acceleration of copper deposition and a copper-complexing agent and has a pH value of about 6 to 7.5, for electrolysis at a temperature of about 15.degree. C. to 50.degree. C., thereby forming an electrically conductive film of copper on said electrically nonconductive substrate. This method can be used in place of conventional electroless copper plating, dispense with any harmful substance such as formaldehyde, be easily analyzed and controlled, form an electrically conductive film of copper on an electrically nonconductive substrate with improved adhesion thereto, and is effectively applicable to making printed circuit boards in particular.Type: GrantFiled: July 28, 1994Date of Patent: October 3, 1995Assignee: Learonal Japan Inc.Inventors: Takeshi Miura, Masaru Seita
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Patent number: 5429738Abstract: A method and apparatus for continuously forming primed circuits, the apparatus including a cylindrical drum rotatable about a generally vertical axis and a tank for holding an electrolytic plating solution. The tank is dimensioned to surround a lower portion of the drum and immerse the lower portion of the drum in the electrolytic plating solution. Means for introducing electrolytic solution into the tank are provided, and a plurality of metallic anodes are disposed within the tank surrounding and facing the lower portion of the drum defining a generally uniform gap therebetween. A plurality of cathodes are disposed above the tank and facing an upper portion of the drum, the cathodes being biased toward the drum. The apparatus is adapted to receive a movable continuous flexible web having a thin layer of conductive metal on one side thereof. The metal layer is masked to expose a plurality of patterns aligned along the web and a continuous strip of exposed metal along one edge of the web.Type: GrantFiled: May 27, 1993Date of Patent: July 4, 1995Assignee: Gould Inc.Inventors: Richard A. Beyerle, Robert J. Plascak
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Patent number: 5407557Abstract: A multi-layer wiring board where a plurality of wiring boards are laminated. The wiring board comprises a flexible insulating layer having a through hole and a wiring pattern formed on the flexible insulating layer. The wiring pattern is composed at least of two conductive layers. The first conductive layer formed on the insulating layer is made of a non-metallic conductor and the first wiring pattern is formed by a laser beam. The second conductive layer is an electroplated layer formed on the first wiring pattern. The first and second conductive layers have different reflectance for a beam.Type: GrantFiled: February 24, 1994Date of Patent: April 18, 1995Assignee: Kabushiki Kaisha ToshibaInventors: Atsuko Iida, Hiroshi Odaira, Yoshizumi Sato, Yuichi Yamamoto
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Patent number: 5403467Abstract: A process for through-hole plating of two-layer circuit boards and multilayers using polythiophenes as a conductive agent on the side walls of through-holes for the direct through-hole plating and to the circuit boards and multilayers thus produced.Type: GrantFiled: January 19, 1993Date of Patent: April 4, 1995Assignee: Bayer AGInventors: Friedrich Jonas, Gerhard-Dieter Wolf
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Patent number: 5393406Abstract: A thin film multilayer wiring board-producing method of the present invention is intended to decrease thermal stresses developing during the formation of the multilayer construction, and also to greatly reduce the number of the steps of the process, as compared with a conventional method. A film material can be used as an insulating film of the multilayer wiring board, and is adhesively bonded to a predetermined portion. Wiring conductors are formed by electroplating. The wiring layers are repeated laminated to form the multilayer construction. A metallic film serving as an electrode is formed on one of upper and lower surfaces of a substrate, the metallic film being removed after a multilayer wiring is formed. A soluble insulating film is formed on a metallic undercoat film on the substrate, and grooves are formed in the soluble insulating film, and wiring conductors are formed in the grooves, using either electroplating or both electroplating and electroless plating.Type: GrantFiled: March 4, 1992Date of Patent: February 28, 1995Assignee: Hitachi, Ltd.Inventors: Hitoshi Yokono, Hideo Arima, Takashi Inoue, Naoya Kitamura
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Patent number: 5387332Abstract: A method for the direct metallization of non-conductors and printed circuit boards is disclosed wherein the non-conductive substrate or printed circuit board is treated with an aqueous cleaner/conditioner composition comprising a cationic surfactant, said surfactant is a quaternary ammonium ion having a molecular weight of below 1,000, thereby rendering the substrate of a printed circuit board receptive to the uniform adherence and adsorption of the noble metal catalyst deposited thereafter, which catalysts are used, directly or indirectly, as the sites of direct electroplating without the need of using electroless plating. The cleaner/conditioner is particularly useful because it does not require the use of chelating agent(s) which are commonly used in the art and thereby eliminates waste treatment problems prevalent in the industry.Type: GrantFiled: July 14, 1993Date of Patent: February 7, 1995Inventor: Martin Straus
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Patent number: 5381946Abstract: An integrated circuit chip having solder bumps thereon may be tested using a temporary substrate having substrate pads corresponding to locations of the input/output pads on the chip and having a sacrificial conductor layer on the temporary substrate pads. The solder bumps are placed adjacent the corresponding sacrificial metal layer and heated to form an electrical and mechanical connection between the chip and the temporary substrate. The chip is then tested and/or burned-in on the temporary substrate. After testing/burn-in, the sacrificial metal layer is dissolved into the solder bumps by heating. The integrated circuit chip, including a solder bump having the dissolved sacrificial metal layer therein, may be easily removed from the temporary substrate. Solder bumps may also be formed on the temporary substrate and transferred to unbumped chips.Type: GrantFiled: September 27, 1993Date of Patent: January 17, 1995Assignee: MCNCInventors: Nicholas G. Koopman, Glenn A. Rinne, Iwona Turlik, Edward K. Yung
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Patent number: 5379515Abstract: A process for preparing an electrical connecting member having a holding member comprising an electrically insulating material and a plurality of electroconductive members equipped in the holding member under the state mutually insulated from each other, one end of the each electroconductive member being exposed at one surface of the holding member, and the other end of the each electroconductive member being exposed at the other surface of the each holding member, the process having the following steps, namely the step of forming a matrix having the state where the holding member is in contact with a base member for supporting the holding member the step of irradiating a high energy beam on the matrix from the holding member side to remove the holding member, thereby forming a plurality of holes the step of filling an electroconductive material which becomes the electroconductive member into the plurality of holes formed and the step of removing the base member.Type: GrantFiled: February 16, 1994Date of Patent: January 10, 1995Assignees: Canon Kabushiki Kaisha, Sumitomo Metal IndustriesInventors: Hiroshi Kondo, Tetsuo Yoshizawa, Toyohide Miyazaki, Takashi Sakaki, Yoshimi Terayama, Yoichi Tamura, Takahiro Okabayashi, Kazuo Kondo, Yasuo Nakatsuka, Yuichi Ikegami
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Patent number: 5374346Abstract: A process of electroplating comprising formation of a semiconductive coating over an article having both metallic and non-metallic portions, dissolving the metal surface underlying the semiconductive coating and removing the semiconductive coating by a high pressure water spray. The process is useful for the formation of printed circuit boards.Type: GrantFiled: August 9, 1993Date of Patent: December 20, 1994Assignee: Rohm and Haas CompanyInventors: John J. Bladon, Carl Colangelo, John Robinson, Michael Rousseau
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Patent number: 5374344Abstract: Disclosed is a multi-compartment electroplating tank and a process for using the tank to simultaneously plate dissimilar materials onto a substrate.Type: GrantFiled: July 27, 1993Date of Patent: December 20, 1994Assignee: International Business Machines, Inc.Inventors: Thomas P. Gall, James Wilcox
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Patent number: 5358622Abstract: A procedure for producing printed circuit boards with pads for insertion of SMDs. A copper lined base plate is provided with a positive photoprotective layer with a coating thickness lesser or equal to the depth of the pads to be built up for the connection of SMD components. The positive photoprotective layer is exposed using a primary film with a window mask corresponding to the desired pad arrangement, and the exposed base plate is developed in a developing bath such that the photoprotective layer is removed in the area of the exposed windows, exposing open copper areas there. The base plate developed in this way is exposed with a secondary film with a mask for the strip conductors, whereby the strip conductors are modeled as opaque areas.Type: GrantFiled: June 16, 1993Date of Patent: October 25, 1994Assignee: Firma Korsten & GoossensInventor: Gunter Korsten