Etching Of A Compound Containing At Least One Oxygen Atom And At Least One Metal Atom Patents (Class 216/101)
  • Patent number: 5976396
    Abstract: Method for etching metal oxide films, especially tin oxide on a substrate in which a metal (Zn) is deposited on said film and etching is performed by a mixture of an acid, such as hydrochloric acid (HCl) and a metal dissolution agent, such as ferric chloride. The hydrochloric acid reacts with the zinc to produce active hydrogen which reduces the tin oxide to tin, which in turn is etched with the hydrochloric acid.
    Type: Grant
    Filed: February 10, 1998
    Date of Patent: November 2, 1999
    Assignee: Feldman Technology Corporation
    Inventors: Douglas McLean, Bernard Feldman
  • Patent number: 5976988
    Abstract: An alumina film, a silicon oxide film, and a silicon nitride film formed on a substrate containing a large amount of alumina are etched by using an etching material in which the concentration of ammonium fluoride, which is a component of BHF, is set low. Etching is performed by using an etching material that is an aqueous solution produced by mixing hydrofluoric acid, ammonium fluoride and water at a weight ratio of x:y:(100-x-y) where x and y satisfy a relationship y<-2x+10 (0<x.ltoreq.5, 0<y.ltoreq.10). 50% hydrofluoric acid on the market and 40% aqueous solution of ammonium fluoride are used.
    Type: Grant
    Filed: April 26, 1996
    Date of Patent: November 2, 1999
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Toshimitsu Konuma, Akira Sugawara, Takeshi Nishi, Yukiko Uehara, Satoshi Murakami, Misako Nakazawa
  • Patent number: 5888411
    Abstract: An inductive pinched-gap thin film head (TFH) device having pole-tips which are in substantial contact along their side-edges, thereby precisely defining a pinched-gap segment. The substantial contact between the pole-tips' side-edges effectively eliminates all flux lines emanating from the edges and corners during the write operation. The write magnetic field is thus precisely confined to across the pinched-gap segment. As a result, the written medium track width is accurately defined by the width of the pinched-gap segment with high degree of magnetization coherency and virtual elimination of the track-edge noise. The improved (medium) signal-to-noise ratio facilitates substantial increase of the track density. Photolithographic definition and etching of the gap-vias to the bottom pole-tip, followed by deposition of the top pole-tip, facilitates precise and consistent control of the width of the pinched-gap segment (and the written track) drawn to .ltoreq.1 .mu.m.
    Type: Grant
    Filed: November 13, 1996
    Date of Patent: March 30, 1999
    Inventor: Uri Cohen
  • Patent number: 5880038
    Abstract: After a resist mask is selectivity formed on an upper portion of a gate electrode containing mainly aluminum. At this state an anodization process is performed using an electrolytic solution, to form an anodic oxide film in a region other than a region of the upper portion on which the resist mask is formed. A silicon oxide film is formed to cover the gate electrode or the like Since an anodic oxide film is not formed on the region of the upper portion, contact holes for a wiring or an electrode made of aluminum are formed by etching the silicon oxide film using a hydrofluoric acid system etchant.
    Type: Grant
    Filed: March 7, 1996
    Date of Patent: March 9, 1999
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Toshimitsu Konuma, Yasuhiko Takemura
  • Patent number: 5880069
    Abstract: A desired pattern is formed on a non-superconducting oxide film after the non-superconducting oxide film has been formed on a magnesia substrate. A superconducting oxide film is formed over the exposed parts of the substrate and the non-superconducting oxide film. The epitaxial orientation of the superconducting oxide film section on the non-superconducting oxide film is different from that of the superconducting oxide film section on the substrate. A tilt-boundary junction is produced at a boundary between the superconducting film sections which are different in epitaxial orientation from each other. Thus, a Josephson junction having a desired pattern can be obtained.
    Type: Grant
    Filed: February 1, 1994
    Date of Patent: March 9, 1999
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Masao Nakao, Hiroaki Furukawa, Ryohkan Yuasa, Shuji Fujiwara
  • Patent number: 5876614
    Abstract: The method of wet etching an aluminum oxide substrate deposits a thin layer of titanium film or chromium film on the aluminum oxide surface prior to the application of the photo-resist coating to form a barrier between the aluminum oxide and the photo-resist. This barrier layer inhibits the reaction between the aluminum oxide and the photo-resist during the photolithographic process. The undercutting of the aluminum oxide in the wet etching process is therefore controlled by the deposition of the barrier layer comprising the thin layer of titanium film or chromium film. The titanium film used is nominally 30 .ANG. thick to obtain the beneficial effects noted above while the chromium film would be approximately 1000 .ANG. thick.
    Type: Grant
    Filed: April 18, 1997
    Date of Patent: March 2, 1999
    Assignee: Storage Technology Corporation
    Inventors: Bo Zhou, Barry Allen McPherron, Subrata Dey, Yi-Shung Chaug
  • Patent number: 5868948
    Abstract: A method for fabricating a dielectric device including a capacitor, a pyroelectric infrared detector, and the like is disclosed. The method comprises the steps of etching a dielectric substance film formed on a substrate to form a predetermined pattern with an etchant comprised of hydrofluoric acid and an oxidizing agent, and removing residues resulting from the etching by treating the etched layer with a first treating solution containing a reducing agent and subsequently with a second treating solution containing an acid.
    Type: Grant
    Filed: October 1, 1996
    Date of Patent: February 9, 1999
    Assignee: Matsushita Electric Industrial Co. Ltd.
    Inventors: Satoru Fujii, Ryoichi Takayama, Takeshi Kamada, Atsushi Tomozawa
  • Patent number: 5795494
    Abstract: Semiconductor substrates are immersed in pure water having a lowered dissolved-oxygen concentration and heated to a temperature above 60.degree. C., in an atmosphere which keeps the dissolved oxygen concentration in pure water, in order to etch oxide films on surfaces of the semiconductor substrates for cleaning the surfaces of the semiconductor substrates. According to the present invention, contaminants and residual chemicals can be effectively removed without adding any chemical treating step. The cleaning can be effective without increasing the number of chemicals, and improved throughputs of the cleaning step can be obtained.
    Type: Grant
    Filed: August 10, 1995
    Date of Patent: August 18, 1998
    Assignee: Fujitsu Limited
    Inventors: Yuka Hayami, Miki T. Suzuki, Hiroki Ogawa, Shuzo Fujimura, Haruhisa Mori, Yoshiko Okui
  • Patent number: 5792354
    Abstract: In a filter well having an inlet portion and an outlet portion and a filter arranged between these, the filter is carried by a support surface having a number of flow channels, extending radially towards an outlet. The ridges between the flow channels have a width of not more than about 0.2 mm whereby essentially the entire upper surface of the filter becomes active at filtration. The filter well is formed by forming of plastic in a forming device, whereby the flow channel pattern in the support surface for the filter is formed by a forming part in the forming device, wherein a negative corresponding to the flow channel pattern has been made in the surface of the forming part by a photolithographic etching process or by laser machining.
    Type: Grant
    Filed: August 9, 1996
    Date of Patent: August 11, 1998
    Assignee: Pharmacia Biotech AB
    Inventor: Arvi Aksberg
  • Patent number: 5746930
    Abstract: An array of thermal sensitive elements (16) may be formed from a pyroelectric substrate (46) having an infrared absorber and common electrode assembly (18) attached thereto. A first layer of electrically conductive contacts (60) is formed to define in part masked (61) and unmasked (68) regions of the substrate (46). A second layer of electrically conductive contacts (62) may be formed on the first layer of contacts (60). A mask layer (66) is formed to encapsulate the exposed portions of the second layer of contacts (62). The unmasked regions (68) are exposed to an etchant (70) and irradiated to substantially increase the reactivity between the unmasked regions (68) and the etchant (70) such that during irradiation, the etchant (70) removes the unmasked regions (68) substantially faster than the first layer of contacts (60) and the mask layer (66).
    Type: Grant
    Filed: January 3, 1995
    Date of Patent: May 5, 1998
    Assignee: Texas Instruments Incorporated
    Inventors: James F. Belcher, Howard R. Beratan, Scott R. Summerfelt
  • Patent number: 5679270
    Abstract: A method of removing ceramic material, such as for example a ceramic core, from a metallic cast or other component involves contacting the metallic cast component and a caustic ceramic leaching medium at elevated temperature for a time effective to substantially remove the ceramic material from the component and providing an oxygen getter in the caustic ceramic leaching medium in an amount effective to avoid deleterious surface corrosion of the component while the ceramic material is being removed therefrom.
    Type: Grant
    Filed: July 1, 1996
    Date of Patent: October 21, 1997
    Assignee: Howmet Research Corporation
    Inventors: Thomas J. Thornton, Julie A. Faison, Neil E. Paton
  • Patent number: 5662818
    Abstract: A pyroelectric infrared radiation detector for detecting the intensity of infrared radiation with a pyroelectric element is provided. The pyroelectric infrared radiation detector comprises a substrate made of a single crystal material such as (100) magnesium oxide and an infrared radiation detecting structure which comprises a first electrode disposed on the substrate, a pyroelectric thin film disposed on the first electrode, and a second electrode disposed on the pyroelectric thin film for absorption of infrared radiation. The substrate has a recess provided in the upper surface thereof where the infrared radiation detecting structure is seated.
    Type: Grant
    Filed: July 31, 1995
    Date of Patent: September 2, 1997
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Koji Nomura, Tutomu Nakanishi, Tokumi Kotani, Keizaburo Kuramasu
  • Patent number: 5646095
    Abstract: A method for selectively etching insulative material composed of SrTiO3 or MgO in the presence of a copper oxide perovskite superconductive material includes treating the insulative material with a liquid selective etchant solution containing hydrogen fluoride in water for a period of time, the insulative material being etched at a substantially faster rate than the superconductive material etch rate, then treating the superconductive material exposed to the insulative selective with another etchant to remove a surface layer.
    Type: Grant
    Filed: October 5, 1994
    Date of Patent: July 8, 1997
    Assignee: International Business Machines Corporation
    Inventors: Walter Eidelloth, William Joseph Gallagher
  • Patent number: 5643474
    Abstract: The invention is directed towards a wet chemical process for removing physical vapor deposited or air plasma sprayed thermal barrier coatings from coated parts without damaging or effecting the bond coat or the base metal substrate. The process entails using an autoclave with an organic caustic solution to fully remove the thermal barrier coating.
    Type: Grant
    Filed: December 26, 1995
    Date of Patent: July 1, 1997
    Assignee: General Electric Company
    Inventor: D. Sangeeta
  • Patent number: 5622634
    Abstract: An electron-emitting device comprising a pair of device electrodes and an electroconductive film including an electron-emitting region is manufactured by a method comprising a process of forming an electroconductive film including steps of forming a pattern on a thin film containing a metal element on the basis of a difference of chemical state, and removing part of the thin film on the basis of the difference of chemical state.
    Type: Grant
    Filed: December 19, 1994
    Date of Patent: April 22, 1997
    Assignee: Canon Kabushiki Kaisha
    Inventors: Takashi Noma, Seijiro Kato, Fumio Kishi, Hisaaki Kawade, Toshikazu Ohnishi, Michiyo Nishimura, Kumiko Uno, Takahiro Horiguchi, Masato Yamanobe
  • Patent number: 5620557
    Abstract: A method of manufacturing two sapphireless layers (3a, 3b) at one time made of Group III nitride compound semiconductor satisfying the formula Al.sub.x Ga.sub.y In.sub.1-x-y N, inclusive of x=0, y=0, and x=y=0, and a LED (10) utilizing one of the semiconductor layers (3a, 3b) as a substrate (3) includes the steps of forming two zinc oxide (ZnO) intermediate layers (2a, 2b) on each side of a sapphire substrate (1), forming two Group III nitride compound semiconductor layers (3a, 3b) satisfying the formula Al.sub.x Ga.sub.y In.sub.1-x-y N, inclusive of x=0, y=0, and x=y=0, each laminated on each of the intermediate ZnO layers (2a, 2b), and separating the intermediate ZnO layers (2a, 2b) from the sapphire substrate (1) by etching with an etching liquid only for the ZnO layers (2a, 2b).
    Type: Grant
    Filed: June 26, 1995
    Date of Patent: April 15, 1997
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Katsuhide Manabe, Masayoshi Koike, Hisaki Kato, Norikatsu Koide, Isamu Akasaki, Hiroshi Amano
  • Patent number: 5609927
    Abstract: Processing techniques for processing high-dielectric-constant material are provided to allow for the formation of an electronic device (10) which comprises a inner electrode (24), a high-dielectric-constant layer (28), and an outer electrode (30). High-dielectric-constant layer (28) is subjected to ultraviolet radiation in an oxygen ozone ambient to eliminate various undesirable hydroxide and carbonate compounds. Layer (28) is further subjected to high pressure isotropic reactive ion etches prior to the deposition of layer (30). The interface between layer (28) and layer (30) is exposed to reactive fluorine and low pressure plasma to improve the fair electric properties and leakage currents associated with layer (28).
    Type: Grant
    Filed: June 6, 1995
    Date of Patent: March 11, 1997
    Assignee: Texas Instruments Incorporated
    Inventors: Scott R. Summerfelt, Howard R. Beratan, Robert Tsu
  • Patent number: 5603848
    Abstract: An etching process is provided using electromagnetic radiation and a selected etchant (52) to selectively remove various types of materials (53) from a substrate (48). Contacts (49, 56, 64) may be formed to shield the masked regions (51) of the substrate (48) having an attached coating (20) during irradiation of the unmasked regions (53) of the substrate (48). The unmasked regions (53) are then exposed to an etchant (52) and irradiated to substantially increase their reactivity with the etchant (52) such that the etchant (52) etches the unmasked regions (53) substantially faster than the masked regions (51) and the contacts (49, 56, 64).
    Type: Grant
    Filed: January 3, 1995
    Date of Patent: February 18, 1997
    Assignee: Texas Instruments Incorporated
    Inventors: Howard R. Beratan, James F. Belcher, Scott R. Summerfelt
  • Patent number: 5599465
    Abstract: A method is provided for producing superconducting Josephson devices using a chemical etching solution which comprises forming a mask on a predetermined portion of a MgO substrate, and immersing the MgO substrate having the mask in an aqueous acid solution in which the volume ratio of phosphoric acid to sulfuric acid is approximately 10:1 or more, so as to form a step at the boundary between the masked region and the unmasked region.
    Type: Grant
    Filed: November 28, 1994
    Date of Patent: February 4, 1997
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Chan H. Park, Jin P. Hong
  • Patent number: 5578226
    Abstract: A multi-layer superconductive interconnect structure includes a first multi-layer substrate with a first superconducting layer (SL) deposited on a first epitaxial substrate and a first glue dielectric layer (GDL) on the first SL. A second multi-layer substrate includes a second SL deposited on a second epitaxial substrate and a second GDL on said second SL. The first GDL and the second GDL are clamped and cured together to form a composite substrate.
    Type: Grant
    Filed: July 18, 1995
    Date of Patent: November 26, 1996
    Assignee: TRW Inc.
    Inventors: Hugo W. Chan, Arnold H. Silver
  • Patent number: 5567332
    Abstract: A gaseous process for removing and vaporizing at least a portion of a silicon oxide film from between a substrate and a superstructure leaving a space between the substrate and the superstructure. The silicon oxide layer is removed in two steps. In the first step the bulk of the silicon oxide layer is removed by a rapid liquid or gaseous etching process, leaving at least a portion of the silicon oxide layer directly underlying the superstructure in place so as to support the superstructure during a wash cycle. In the second silicon oxide removal step the substrate is introduced to a high flow rate gaseous environment containing a relatively high concentration of anhydrous HF to which no, or only a relatively very low amount of, additional water vapor is provided until the silicon oxide directly underlying the superstructure has been removed.
    Type: Grant
    Filed: June 9, 1995
    Date of Patent: October 22, 1996
    Assignee: FSI International
    Inventor: Jitesh Mehta
  • Patent number: 5567659
    Abstract: A method of accurately controlling the depth of etched gratings in uniform or layered quaternary III-V material. A native oxide is selectively grown on the area of the quaternary to be patterned and this native oxide is subsequently removed to engrave the surface. Periodic repetition of the oxide growth/removal steps results in gratings of the desired depths.
    Type: Grant
    Filed: May 25, 1995
    Date of Patent: October 22, 1996
    Assignee: Northern Telecom Limited
    Inventors: Grzegorz Pakulski, Cornelis Blaauw, Agnes Margittai, Ronald Moore
  • Patent number: 5558905
    Abstract: A substrate free single crystal pyroelectric film particularly suited for use in rapid thermal response sensors is made from a single crystal substrate by a method including the steps of:(A) etching a pattern into the substrate;(B) epitaxially growing a highly oriented superconducting material into the etched pattern to fill the etched pattern,(C) epitaxially growing a highly oriented crystalline film of a pyroelectric material over the entire surface of the substrate, and(D) dissolving away the highly oriented superconducting material.
    Type: Grant
    Filed: July 12, 1995
    Date of Patent: September 24, 1996
    Assignee: The United States of America as represented by the Secretary of the Army
    Inventor: Donald W. Eckart
  • Patent number: 5527766
    Abstract: Novel structures and methods utilize layered copper oxide release materials to separate oxide films from growth substrates. Generally, the method comprises the steps of: first, forming a layered copper oxide sacrificial release material on a growth substrate, in the preferred embodiment being the high temperature superconductor YBCO grown on a compatible substrate such as LaAlO3, second, forming an oxide film on the layered copper oxide release material, in the preferred embodiment, a ferroelectric, an optical material or a oxide film compatible with further high temperature superconductor growth, such as SrTiO3 or CeO2, and third, etching the layered copper oxide release material so as to separate the oxide film from the growth substrate. Optionally, additional layers may be grown on the oxide film prior to etching.
    Type: Grant
    Filed: December 13, 1993
    Date of Patent: June 18, 1996
    Assignee: Superconductor Technologies, Inc.
    Inventor: Michael M. Eddy
  • Patent number: 5509555
    Abstract: A method is provided for preparation of a composite including steps of providing a preform and a liquid infiltrant alloy including at least two elements and having a liquid infiltrant alloy composition which is selected so that the liquid infiltrant alloy spontaneously infiltrates the preform and contacting the liquid infiltrant alloy with the preform so that a chemical reaction occurs to form a composite by reactive infiltration, as are composites produced according to the method of the invention.
    Type: Grant
    Filed: June 3, 1994
    Date of Patent: April 23, 1996
    Assignee: Massachusetts Institute of Technology
    Inventors: Yet-Ming Chiang, Jong-Ren Lee, Leszek Hozer
  • Patent number: 5501350
    Abstract: A process for producing a printed wiring board, comprising the steps of forming a photosensitive resist layer on a copper layer provided on an insulating substrate, patterning the photosensitive resist layer, and etching the copper layer made bare from the photosensitive resist layer to form a copper wiring layer, wherein the surface of the copper layer is subjected to pretreatment comprising the steps of black-oxide treating the surface by the use of an alkaline oxidizing solution and subsequently finely surface-roughening the black-oxide treated surface by the use of an acidic treating solution comprised of phosphoric acid or an organic acid, followed by drying in the presence of oxygen, and thereafter the photosensitive resist layer is formed thereon. Such pretreatment enables formation of fine and uniform roughness on the copper layer surface to bring about an improvement in its adhesion to the resist layer, so that ethcing solutions can be prevented from penetrating the interface between these layers.
    Type: Grant
    Filed: January 5, 1995
    Date of Patent: March 26, 1996
    Assignee: Toppan Printing Co., Ltd.
    Inventors: Risaburo Yoshida, Kiyotomo Nakamura, Akitsu Ota, Mitsuaki Taguchi
  • Patent number: 5492595
    Abstract: The present invention is directed to an improved method for treating an oxidized surface of a copper film for bonding to a resinous layer such as in the formation of a single-sided, double-sided, or multi-layered circuit board and to a layered product produced by the method. In particular, the method of the present invention comprises the steps of: contacting the oxidized surface of a copper film, having cupric oxide whiskers protruding therefrom, with an acidic reducing solution having a pH of 1 to 6.5 and having an effective amount of a water soluble thiosulfate reducing agent dissolved therein to provide a reduced copper surface; and rinsing the reduced copper surface with an acidic solution to produce a rinsed and reduced copper surface having reduced whiskers protruding therefrom, said reduced whiskers each being a mix of cuprous oxide and metallic copper. Preferably, the reduced surface is treated with a passivating agent to minimize any reoxidation prior to laminate formation.
    Type: Grant
    Filed: April 11, 1994
    Date of Patent: February 20, 1996
    Assignee: Electrochemicals, Inc.
    Inventors: Michael V. Carano, Therese M. Harryhill
  • Patent number: 5492235
    Abstract: A method for removing Ball Limiting Metallurgy (BLM) layers from the surface of a wafer in the presence of Pb/Sn solder bumps. In one embodiment, the BLM comprises two layers: titanium and copper. After Pb/Sn solder bumps have been formed over the electrical contact pads of the wafer, the BLM copper layer is etched with a H.sub.2 SO.sub.4 +H.sub.2 O.sub.2 +H.sub.2 O solution. While removing the copper layer, the H.sub.2 SO.sub.4 +H.sub.2 O.sub.2 +H.sub.2 O etchant also reacts with the Pb/Sn solder bumps to form a thin PbO protective layer over the surface of the bumps. When the copper layer has been etched away, the titanium layer is etched with a CH.sub.3 COOH+NH.sub.4 F+H.sub.2 O solution. The PbO layer formed over the surface of the Pb/Sn solder bumps remain insoluble when exposed to the CH.sub.3 COOH+NH.sub.4 F+H.sub.2 O etchant, thereby preventing the solder bumps from being etched in the presence of the CH.sub.3 COOH+NH.sub.4 F+H.sub.2 O etchant.
    Type: Grant
    Filed: December 1, 1994
    Date of Patent: February 20, 1996
    Assignee: Intel Corporation
    Inventors: Douglas E. Crafts, Venkatesan Murali, Caroline S. Lee
  • Patent number: 5482174
    Abstract: A method for removing copper oxide on a surface of a copper film is comprising the steps of treating the surface of the copper film with acid, neutralizing the surface of the copper film treated with acid, and washing the neutralized surface of the copper film.
    Type: Grant
    Filed: June 3, 1994
    Date of Patent: January 9, 1996
    Assignee: Fujitsu Limited
    Inventors: Takahisa Namiki, Yasuo Yamagishi, Ei Yano
  • Patent number: 5462634
    Abstract: An aluminum material is surface-treated with an aqueous solution containing 0.005 mol/lit. or more of a chelating agent and 5 g/lit. or more of an organic amine and having 100 ppm or less of phosphoric acid radical ion concentration and 500 ppm or less of sulfuric acid radical ion concentration, until its surface has a color tone (S) of:S=(X.sup.2 +(3.388Z-3Y.sup.2).sup.1/2.gtoreq.70wherein X, Y and Z represent the tristimulus values of color.The aluminum material can be surface-treated while setting the treating conditions on the basis of a specific color tone detectable by colorimetry, without relying on experience and intuition. The surface-treated aluminum material can have a good anticorrosion, have good color change preventive properties, a good adhesion of coatings and a beautiful surface appearance.
    Type: Grant
    Filed: January 31, 1995
    Date of Patent: October 31, 1995
    Assignees: Honda Giken Kogyo Kabushiki Kaisha, Sky Aluminium Co., Ltd.
    Inventors: Shiro Kamiyama, Masanori Kosugi, Masahiro Kurata, Sadao Shiraishi, Nobuyoshi Sasaki
  • Patent number: 5462919
    Abstract: For manufacturing a superconducting thin film having at least one non-superconducting region at and near its surface portion, an oxide superconductor thin film is formed on a surface of the substrate. The oxide superconductor thin film is heated in high vacuum environment so that oxygen of the oxide superconductor crystals escapes from the surface of the oxide superconductor thin film and a surface portion of the oxide superconductor thin film having a substantial thickness changes into non-superconducting layer of a compound oxide which is composed of the same constituent elements as those of the oxide superconductor but includes the oxygen amount less than that of the oxide superconductor and a thin superconducting channel is formed under the non-superconducting layer.
    Type: Grant
    Filed: February 18, 1994
    Date of Patent: October 31, 1995
    Assignee: Sumitomo Electric Industries,Ltd.
    Inventors: So Tanaka, Michitomo Iiyama
  • Patent number: 5456795
    Abstract: An aqueous mixture etchant containing hydroiodic acid and ferric chloride is suitable for etching ITO to form a minute electrode pattern as used in a liquid crystal display device. When the etchant has caused a decrease in etching performance due to a compositional change, it can be effectively regenerated by replenishing appropriate amounts of hydrochloric acid and pure water, or an appropriate amount of a dilute hydrochloric acid at a constant concentration, while minimizing the use of hydroiodic acid and ferric chloride which are rather expensive compared with hydrochloric acid and pure water.
    Type: Grant
    Filed: May 20, 1994
    Date of Patent: October 10, 1995
    Assignee: Canon Kabushiki Kaisha
    Inventors: Keishi Danjo, Takashi Enomoto, Tatsuo Murata, Masayuki Shimamune
  • Patent number: 5445711
    Abstract: An electroluminescent display includes a transparent electrode (4) and a metal assist structure (6) formed over a portion of the transparent electrode (6) such that the metal assist structure (6) is in electrical contact with the transparent electrode (4). The metal assist structure (6) includes a first refractory metal layer (10), a primary conductor layer (12) formed on the first refractory metal layer (10), and a second refractory metal layer (14) formed on the primary conductor layer (12). The first and second refractory metal layers (10, 14) are capable of protecting the primary conductor layer (12) from oxidation when the electroluminescent display is annealed to activate a phosphor layer (18). In an alternate embodiment, an electroluminescent display includes a substrate (2) and a metal electrode (22) formed on the substrate (2).
    Type: Grant
    Filed: May 31, 1994
    Date of Patent: August 29, 1995
    Assignee: Westinghouse Norden Systems
    Inventors: William J. Tanski, Roger Carroll, Emilio J. Branciforte
  • Patent number: 5437761
    Abstract: A lithium niobate crystal wafer wherein the deviations of the maximum and minimum absorption coefficients of the wafer at a wavelength of 2.87 .mu.m from the average absorption coefficient thereof at that wavelength fall within the range of .+-.0.1 cm.sup.-1 exclusive of both borders; a process for the preparation of the same; and a method for the evaluation thereof.
    Type: Grant
    Filed: March 4, 1994
    Date of Patent: August 1, 1995
    Assignee: Nihon Kessho Kogaku Co., Ltd.
    Inventor: Akira Koide
  • Patent number: 5437729
    Abstract: A method for tailoring or patterning the surface of ceramic articles is provided by implanting ions to predetermined depth into the ceramic material at a selected surface location with the ions being implanted at a fluence and energy adequate to damage the lattice structure of the ceramic material for bi-axially straining near-surface regions of the ceramic material to the predetermined depth. The resulting metastable near-surface regions of the ceramic material are then contacted with energy pulses from collapsing, ultrasonically-generated cavitation bubbles in a liquid medium for removing to a selected depth the ion-damaged near-surface regions containing the bi-axially strained lattice structure from the ceramic body.
    Type: Grant
    Filed: April 8, 1993
    Date of Patent: August 1, 1995
    Assignee: Martin Marietta Energy Systems, Inc.
    Inventors: Lynn A. Boatner, Janet Rankin, Paul Thevenard, Laurence J. Romana
  • Patent number: 5417804
    Abstract: An optical waveguide includes a substrate in the form of either a silicon substrate with a silicon oxide layer formed at its upper surface or a quartz substrate, a first waveguide layer extending over the entire upper surface of the substrate, a layer having a low refractive index and a tapered end disposed over part of an upper surface of the first waveguide layer, and a second waveguide layer of the same refractive index as that of the first waveguide layer extending over an exposed surface of the first waveguide layer and an upper surface of the layer of low refractive index.
    Type: Grant
    Filed: October 25, 1993
    Date of Patent: May 23, 1995
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Munekazu Nishihara, Youichi Ohnishi, Mikio Takebayashi
  • Patent number: 5413667
    Abstract: A pyroelectric infrared detector includes a substrate having a recess. A pyroelectric portion substantially aligns with the recess. A resin film is located between the substrate and the pyroelectric portion. The recess faces the resin film. First and second electrodes are connected to first and second surfaces of the pyroelectric portion respectively. The pyroelectric portion may include a pyroelectric film of Pb.sub.x La.sub.y Ti.sub.z Zr.sub.w O.sub.3 where atomic fractions "w", "x", "y", and "z" satisfy one of following conditions a), b), and c):a) 0.7.ltoreq.x.ltoreq.1, x+y=1, 0.925.ltoreq.z.ltoreq.1, w=0b) x=1, y=0, 0.45.ltoreq.z<1, z+w=1c) 0.75.ltoreq.x<1, x+y=1, 0.5.ltoreq.z<1, z+w=1.
    Type: Grant
    Filed: October 13, 1993
    Date of Patent: May 9, 1995
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Satoru Fujii, Ryoichi Takayama, Yoshihiro Tomita, Masayuki Okano, Hideo Torii