Etchant Contains Acid Patents (Class 216/106)
  • Patent number: 11830785
    Abstract: A semiconductor device has a substrate and a first semiconductor die disposed over the substrate. A subpackage is also disposed over the substrate. A stiffener is disposed over the substrate around the first semiconductor die and subpackage. A heat spreader is disposed over the stiffener. The heat spreader is thermally coupled to the first semiconductor die. The heat spreader has an opening over the subpackage.
    Type: Grant
    Filed: October 6, 2021
    Date of Patent: November 28, 2023
    Assignee: STATS ChipPAC Pte. Ltd.
    Inventors: TaeKeun Lee, Youngmin Kim, Yongmin Kim
  • Patent number: 10941495
    Abstract: A build piece is made from a build plan by an additive metal deposition process, the build plan created from a three dimensional definition of a desired part, the build plan having a first set of dimensions corresponding to the desired part and includes a support structure. The build piece is to a chemical etchant such that the support structure is removed from the build piece and the dimensions of the build piece corresponding to the desired part are reduced to a second set of dimensions.
    Type: Grant
    Filed: February 9, 2018
    Date of Patent: March 9, 2021
    Assignee: Incodema3D, LLC
    Inventors: Kevin Engel, Scott Volk, Jerry Rushak, Peter Engel
  • Patent number: 10577696
    Abstract: Provided is a copper etchant composition including: a first organic acid containing one or more amine groups, and one or more carboxylic acid groups; a second organic acid; an amine compound; hydrogen peroxide; and a phosphate compound, which has the increased number of processing sheets and etching uniformity, when etching copper.
    Type: Grant
    Filed: December 21, 2016
    Date of Patent: March 3, 2020
    Assignee: ENF Technology CO., LTD.
    Inventors: Seul Ki Kim, Se Hoon Kim
  • Patent number: 10483404
    Abstract: A transistor having high field-effect mobility is provided. In order that an oxide semiconductor layer through which carriers flow is not in contact with a gate insulating film, a buried channel structure in which the oxide semiconductor layer through which carriers flow is separated from the gate insulating film is employed. Specifically, an oxide semiconductor layer having high conductivity is provided between two oxide semiconductor layers. Further, an impurity element is added to the oxide semiconductor layer in a self-aligned manner so that the resistance of a region in contact with an electrode layer is reduced. Further, the oxide semiconductor layer in contact with the gate insulating layer has a larger thickness than the oxide semiconductor layer having high conductivity.
    Type: Grant
    Filed: July 19, 2018
    Date of Patent: November 19, 2019
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki
  • Patent number: 10335850
    Abstract: A method of making a light weight component is provided. The method including the steps of: forming a metallic foam core into a desired configuration; inserting a pre-machined component into an opening in the metallic foam core; applying an external metallic shell to an exterior surface of the metallic foam core after it has been formed into the desired configuration and after the pre-machined component has been inserted into the metallic foam core; introducing an acid into an internal cavity defined by the external metallic shell; dissolving the metallic foam core; and removing the dissolved metallic foam core from the internal cavity, wherein the component and the external metallic shell are resistant to the acid.
    Type: Grant
    Filed: April 12, 2016
    Date of Patent: July 2, 2019
    Assignee: UNITED TECHNOLOGIES CORPORATION
    Inventor: Gary D. Roberge
  • Patent number: 10158061
    Abstract: In one embodiment, a method to form a superconductor device includes depositing a crystalline layer having a preferred crystallographic orientation on a substrate and forming an oriented superconductor layer comprising an oriented superconductor material on the crystalline layer. A metallic layer is formed on the superconductor layer and a mask is provided proximate the substrate to define a protected portion of the oriented superconductor layer and an exposed portion of the oriented superconductor layer. The exposed portion of the oriented superconductor layer is removed without etching the protected portion of the oriented superconductor layer.
    Type: Grant
    Filed: January 24, 2014
    Date of Patent: December 18, 2018
    Assignee: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC
    Inventors: Connie P. Wang, Paul Murphy, Paul Sullivan
  • Patent number: 10032926
    Abstract: A transistor having high field-effect mobility is provided. In order that an oxide semiconductor layer through which carriers flow is not in contact with a gate insulating film, a buried channel structure in which the oxide semiconductor layer through which carriers flow is separated from the gate insulating film is employed. Specifically, an oxide semiconductor layer having high conductivity is provided between two oxide semiconductor layers. Further, an impurity element is added to the oxide semiconductor layer in a self-aligned manner so that the resistance of a region in contact with an electrode layer is reduced. Further, the oxide semiconductor layer in contact with the gate insulating layer has a larger thickness than the oxide semiconductor layer having high conductivity.
    Type: Grant
    Filed: August 23, 2016
    Date of Patent: July 24, 2018
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki
  • Patent number: 9881833
    Abstract: A method for forming interconnect structures includes forming a barrier material over a dielectric layer having a trench, the barrier layer being disposed on sidewalls and horizontal surfaces of the trench, depositing an interconnect layer over the barrier layer to form an interconnect structure, recessing the interconnect layer down to a surface of the barrier layer using a chemical mechanical planarization process, and planarizing the barrier layer and the interconnect layer using a wet etch process to form a coplanar surface to prevent dishing or divots in the interconnect structure.
    Type: Grant
    Filed: October 26, 2016
    Date of Patent: January 30, 2018
    Assignee: International Business Machines Corporation
    Inventors: Benjamin D. Briggs, Elbert E. Huang, Takeshi Nogami, Raghuveer R. Patlolla, Cornelius B. Peethala, David L. Rath
  • Patent number: 9822455
    Abstract: A regular metallic, cylindrical tubular needle cannula (1) is subjected to a metal etching liquid (21) in the inside lumen (4) thereby increasing the inside diameter and enhancing the flow properties while maintaining the outside appearance. The inside diameter is only increased over a controlled length (7) of the full length of the needle cannula (1) leaving sufficient length and wall thickness to also taper the outside diameter.
    Type: Grant
    Filed: September 20, 2010
    Date of Patent: November 21, 2017
    Assignee: Novo Nordisk A/S
    Inventors: Andre Larsen, Lasse Wengel Christoffersen, Mikael Andersen, Jan Harald Preuthun
  • Patent number: 9580818
    Abstract: The present invention relates to an etching solution for a multilayer thin film containing a copper layer and a molybdenum layer, and a method of etching a multilayer thin film containing a copper layer and a molybdenum layer using the etching solution. There are provided an etching solution for a multilayer thin film containing a copper layer and a molybdenum layer, including (A) an organic acid ion supply source containing two or more carboxyl groups and one or more hydroxyl groups in a molecule thereof, (B) a copper ion supply source and (C) an ammonia and/or ammonium ion supply source, the etching solution having a pH value of from 5 to 8, and an etching method using the etching solution.
    Type: Grant
    Filed: May 27, 2011
    Date of Patent: February 28, 2017
    Assignee: MITSUBISHI GAS CHEMICAL COMPANY, INC.
    Inventors: Satoshi Tamai, Satoshi Okabe, Masahide Matsubara, Kunio Yube
  • Patent number: 9514934
    Abstract: Antimony oxide thin films are deposited by atomic layer deposition using an antimony reactant and an oxygen source. Antimony reactants may include antimony halides, such as SbCl3, antimony alkylamines, and antimony alkoxides, such as Sb(OEt)3. The oxygen source may be, for example, ozone. In some embodiments the antimony oxide thin films are deposited in a batch reactor. The antimony oxide thin films may serve, for example, as etch stop layers or sacrificial layers.
    Type: Grant
    Filed: March 13, 2015
    Date of Patent: December 6, 2016
    Assignee: ASM International N.V.
    Inventors: Raija H. Matero, Linda Lindroos, Hessel Sprey, Jan Willem Maes, David De Roest, Dieter Pierreux, Kees Van Der Jeugd, Lucia D'Urzo, Tom E. Blomberg
  • Patent number: 9437442
    Abstract: A slurry for polishing a phase change material, such as Ge—Sb—Te, or germanium-antimony-tellurium (GST), includes abrasive particles of sizes that minimize at least one of damage to (e.g., scratching of) a polished surface of phase change material, an amount of force to be applied during polishing, and a static etch rate of the phase change material, while optionally providing selectivity for the phase change material over adjacent dielectric materials. A polishing method includes applying a slurry with one or more of the above-noted properties to a phase change material, as well as bringing the polishing pad into frictional contact with the phase change material. Polishing systems are disclosed that include a plurality of sources of solids (e.g., abrasive particles) and provide for selectivity in the solids that are applied to a substrate or polishing pad.
    Type: Grant
    Filed: June 24, 2013
    Date of Patent: September 6, 2016
    Assignee: Micron Technology, Inc.
    Inventors: Zhenyu Lu, Jun Liu
  • Patent number: 9127368
    Abstract: An etchant includes, based on a total amount of the etchant, from about 0.5 to about 20 wt % of a persulfate, from about 0.01 to about 2 wt % of a fluorine compound, from about 1 to about 10 wt % of an inorganic acid, from about 0.5 to about 5 wt % of an azole compound, from about 0.1 to about 5 wt % of an electron-donating compound, from about 0.1 to about 5 wt % of a chlorine compound, from about 0.05 to about 3 wt % of a copper salt, from about 0.1 to about 10 wt % of an organic acid or an organic acid salt, and a remaining amount of water.
    Type: Grant
    Filed: June 30, 2014
    Date of Patent: September 8, 2015
    Assignees: SAMSUNG DISPLAY CO., LTD., DONGWOO FINE-CHEM CO., LTD.
    Inventors: Seon-il Kim, In-Bae Kim, Hongsick Park, Jong-Hyun Choung, Inseol Kuk, Suckjun Lee, Giyong Nam, Youngchul Park, Inho Yu, Youngjin Yoon
  • Patent number: 9029268
    Abstract: Processes are described to etch metals. In an embodiment, a process may include contacting a substrate with a stripping solution to remove photoresist from the substrate to produce a stripped substrate. The stripped substrate may include a plurality of solder pillars and a plurality of metal-containing field regions disposed around the plurality of solder pillars. In an illustrative embodiment, the plurality field regions may include copper. Additionally, the process may include rinsing the stripped substrate to produce a rinsed substrate. The rinsed substrate may be substantially free of a Sn layer or a Sn oxide layer. Further, the process may include contacting the rinsed substrate with an etch solution that is capable of removing an amount of one or more metals from the plurality of field regions.
    Type: Grant
    Filed: November 21, 2012
    Date of Patent: May 12, 2015
    Assignee: Dynaloy, LLC
    Inventors: Richard Dalton Peters, Travis Acra, Spencer Erich Hochstetler, Kimberly Dona Pollard
  • Patent number: 9011712
    Abstract: Disclosed is a microetching solution, a replenishment solution added to said microetching solution and a method for production of a wiring board using said microetching solution. The microetching solution for copper consists of an aqueous solution containing a cupric ion, an organic acid, a halide ion, a polymer and a nonionic surfactant. The polymer is a water-soluble polymer including a polyamine chain and/or a cationic group and having a weight average molecular weight of 1000 or more. In the microetching solution of the present invention, a value of A/B is 2000 to 9000 and a value of A/D is 500 to 9000, where a concentration of the halide ion is A % by weight, a concentration of the polymer is B % by weight and a concentration of the nonionic surfactant is D % by weight. Using this microetching solution, adhesion to a resin or the like can be uniformly maintained even with a low etching amount.
    Type: Grant
    Filed: June 25, 2013
    Date of Patent: April 21, 2015
    Assignee: Mec Company Ltd.
    Inventors: Masayo Kurii, Kiyoto Tai, Mami Nakamura, Yuki Ogino
  • Patent number: 9006112
    Abstract: Antimony oxide thin films are deposited by atomic layer deposition using an antimony reactant and an oxygen source. Antimony reactants may include antimony halides, such as SbCl3, antimony alkylamines, and antimony alkoxides, such as Sb(OEt)3. The oxygen source may be, for example, ozone. In some embodiments the antimony oxide thin films are deposited in a batch reactor. The antimony oxide thin films may serve, for example, as etch stop layers or sacrificial layers.
    Type: Grant
    Filed: October 11, 2012
    Date of Patent: April 14, 2015
    Assignee: ASM International N.V.
    Inventors: Raija H. Matero, Linda Lindroos, Hessel Sprey, Jan Willem Maes, David de Roest, Dieter Pierreux, Kees van der Jeugd, Lucia D'Urzo, Tom E. Blomberg
  • Patent number: 8968583
    Abstract: A method for cleaning a dielectric and metal structure within a microelectronic structure uses an oxygen containing plasma treatment, followed by an alcohol treatment, in turn followed by an aqueous organic acid treatment. Another method for cleaning a dielectric and metal structure within a microelectronic structure uses an aqueous surfactant treatment followed by an alcohol treatment and finally followed by an aqueous organic acid treatment. The former method may be used to clean a plasma etch residue from a dual damascene aperture. The second method may be used to clean a chemical mechanical polish planarizing residue from a dual damascene structure. The two methods may be used sequentially, absent any intervening or subsequent sputtering method, to provide a dual damascene structure within a microelectronic structure.
    Type: Grant
    Filed: July 25, 2007
    Date of Patent: March 3, 2015
    Assignee: International Business Machines Corporation
    Inventors: Mary Beth Rothwell, Roy Rongqing Yu
  • Patent number: 8945415
    Abstract: A method is described for etching ceramic phosphor converters. The method includes contacting a surface of the converter with a solution of phosphor acid for a time sufficient to etch the converter. The method is applicable to ceramic phosphor converters comprising a phosphor having a general formula MxAlyOz:RE wherein M is a metal and RE is a rare earth element.
    Type: Grant
    Filed: June 14, 2013
    Date of Patent: February 3, 2015
    Assignee: OSRAM SYLVANIA Inc.
    Inventor: Alan Piquette
  • Patent number: 8932476
    Abstract: Apparatuses and methods are provided where porous metal is deposited on a substrate, a mask is provided on the porous metal and then an etching is performed.
    Type: Grant
    Filed: February 7, 2013
    Date of Patent: January 13, 2015
    Assignee: Infineon Technologies AG
    Inventors: Thomas Kunstmann, Stefan Willkofer, Anja Gissibl, Johann Strasser, Matthias Mueller, Eva-Maria Hess
  • Patent number: 8921230
    Abstract: An etchant composition includes about 25 percent by weight to about 35 percent by weight of phosphoric acid, about 3 percent by weight to about 9 percent by weight of nitric acid, about 10 percent by weight to about 20 percent by weight of acetic acid, about 5 percent by weight to about 10 percent by weight of a nitrate, about 6 percent by weight to about 15 percent by weight of a sulfonic acid, about 1 percent by weight to about 5 percent by weight of an amine compound including a carboxyl group, about 0.1 percent by weight to about 1 percent by weight of a water-soluble amino acid, about 0.01 percent by weight to about 1 percent by weight of an azole compound, and water.
    Type: Grant
    Filed: August 12, 2013
    Date of Patent: December 30, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Hong-Sick Park, Young-Jun Kim, Young-Woo Park, Wang-Woo Lee, Won-Guk Seo, Sam-Young Cho, Seung-Yeon Han, Gyu-Po Kim, Hyun-Cheol Shin, Ki-Beom Lee
  • Patent number: 8889555
    Abstract: A polishing agent for copper polishing, comprising (A) an inorganic acid with divalent or greater valence, (B) an amino acid, (C) a protective film-forming agent, (D) an abrasive, (E) an oxidizing agent and (F) water, wherein the content of the component (A) is at least 0.08 mol/kg, the content of the component (B) is at least 0.20 mol/kg, the content of the component (C) is at least 0.02 mol/kg, and either or both of the following conditions (i) and (ii) are satisfied. (i): The proportion of the content of the component (A) with respect to the content of the component (C) is 2.00 or greater. (ii): It further comprises (G) at least one kind selected from among organic acids and their acid anhydrides.
    Type: Grant
    Filed: February 12, 2010
    Date of Patent: November 18, 2014
    Assignee: Hitachi Chemical Co., Ltd.
    Inventors: Hiroshi Ono, Takashi Shinoda, Yuuhei Okada
  • Patent number: 8859429
    Abstract: A polishing agent for copper polishing, comprising (A) an inorganic acid with divalent or greater valence, (B) an amino acid, (C) a protective film-forming agent, (D) an abrasive, (E) an oxidizing agent and (F) water, wherein the content of the component (A) is at least 0.08 mol/kg, the content of the component (B) is at least 0.20 mol/kg, the content of the component (C) is at least 0.02 mol/kg, and either or both of the following conditions (i) and (ii) are satisfied. (i): The proportion of the content of the component (A) with respect to the content of the component (C) is 2.00 or greater. (ii): It further comprises (G) at least one kind selected from among organic acids and their acid anhydrides.
    Type: Grant
    Filed: March 6, 2012
    Date of Patent: October 14, 2014
    Assignee: Hitachi Chemical Co., Ltd.
    Inventors: Hiroshi Ono, Takashi Shinoda, Yuuhei Okada
  • Patent number: 8845909
    Abstract: A process of fabricating a heat dissipation substrate is provided. A metal substrate having an upper surface, a lower surface, first recesses located on the upper surface and second recesses located on the lower surface is provided. The metal substrate is divided into carrier units and connecting units connecting the carrier units. A first and a second insulating materials are respectively filled into the first and the recesses. A first conductive layer is formed on the upper surface and the first insulating material. A second conductive layer is formed on the lower surface and the second insulating material. The first and the second conductive layers are patterned to form a first and a second patterned conductive layers. The first and the second insulating materials are taken as an etching mask to etch the connecting units of the metal substrate so as to form a plurality of individual heat dissipation substrates.
    Type: Grant
    Filed: May 30, 2013
    Date of Patent: September 30, 2014
    Assignee: Subtron Technology Co., Ltd.
    Inventor: Tzu-Shih Shen
  • Patent number: 8834734
    Abstract: One aspect of the invention is a method of surface alloying stainless steel, In one embodiment, the method includes providing a stainless steel surface having an initial amount of iron and an initial amount of chromium; and preferentially removing iron from the stainless steel surface to obtain a surface having an amount of iron less than the initial amount of iron and an amount of chromium greater than the initial amount of chromium. Another aspect of the invention is a unitary stainless steel article.
    Type: Grant
    Filed: June 6, 2011
    Date of Patent: September 16, 2014
    Assignee: GM Global Technology Operations LLC
    Inventors: Mahmoud H. Abd Elhamid, Gayatri Vyas Dadheech
  • Patent number: 8758634
    Abstract: Disclosed is a composition for and applying said method for micro etching of copper or copper alloys during manufacture of printed circuit boards. Said composition comprises a copper salt, a source of halide ions, a buffer system and a benzothiazole compound as an etch refiner. The inventive composition and method is especially useful for manufacture of printed circuit boards having structural features of ?100 ?m.
    Type: Grant
    Filed: May 26, 2010
    Date of Patent: June 24, 2014
    Assignee: Atotech Deutschland GmbH
    Inventors: Dirk Tews, Christian Sparing, Martin Thoms
  • Patent number: 8728336
    Abstract: A method of chemically milling a workpiece includes the step of depositing a masking material on portions of a workpiece according to a predefined masking pattern such that other portions of the workpiece that are desired to be milled are unmasked. The masking material is deposited using a masking printer that moves in three dimensions to deposit the masking material onto the workpiece. The method also includes the step of chemically removing material from unmasked desired milling areas of the workpiece.
    Type: Grant
    Filed: August 20, 2012
    Date of Patent: May 20, 2014
    Assignee: United Technologies Corporation
    Inventor: Edris Raji
  • Patent number: 8716146
    Abstract: Provided are methods for processing semiconductor substrates. The methods involve etching silicon nitride structures using phosphoric acid solutions maintained at low temperatures, such as between about 110° C. and 130° C. These temperatures provide adequate etching rates and do not damage surrounding metal silicide and silicon oxide structures. The etching rates of silicon nitride may be 10 Angstroms per minute and greater. Lower temperatures also allow decreasing concentrations of phosphoric acid in the etching solutions, which in some embodiments may be less than 90 weight percent. As a result, more selective etching of the silicon nitride structures may be achieved. This selectivity may be as high as hundred times relative to the silicide and silicon oxide structures. The surface conductivity of the silicide structures may remain substantially unchanged by this etching process.
    Type: Grant
    Filed: July 3, 2012
    Date of Patent: May 6, 2014
    Assignee: Intermolecular, Inc
    Inventors: Gregory Nowling, John Foster
  • Patent number: 8641829
    Abstract: Disclosed is a substrate processing system, including: a processing chamber to process a substrate; a vaporizing unit to vaporize a material of liquid; a supply system to supply the processing chamber with gas of the material vaporized by the vaporizing unit; an exhaust system to exhaust an atmosphere in the processing chamber; and a cleaning liquid supply system to supply the vaporizing unit with cleaning liquid for cleaning a product deposited in the vaporizing unit, wherein the cleaning liquid supply system supplies at least two kinds of cleaning liquids into the vaporizing unit so that the product can be removed from the vaporizing unit by action of the two kinds of cleaning liquids on the product.
    Type: Grant
    Filed: July 15, 2013
    Date of Patent: February 4, 2014
    Assignee: Hitachi Kokusai Electric Inc.
    Inventors: Tomoki Horita, Kazuhiro Hirahara, Hironobu Miya, Atsuhiko Suda, Hirohisa Yamazaki
  • Patent number: 8586481
    Abstract: Embodiments described herein relate to removing material from a substrate. More particularly, the embodiments described herein relate to polishing or planarizing a substrate by a chemical mechanical polishing process. In one embodiment, a method of chemical mechanical polishing (CMP) of a substrate is provided. The method comprises exposing a substrate having a conductive material layer formed thereon to a polishing solution comprising phosphoric acid, one or more chelating agents, one or more corrosion inhibitors, and one or more oxidizers, forming a passivation layer on the conductive material layer, providing relative motion between the substrate and a polishing pad and removing at least a portion of the passivation layer to expose a portion of the underlying conductive material layer, and removing a portion of the exposed conductive material layer.
    Type: Grant
    Filed: May 11, 2011
    Date of Patent: November 19, 2013
    Assignee: Applied Materials, Inc.
    Inventors: You Wang, Wen-Chiang Tu, Feng Q. Liu, Yuchun Wang, Lakshmanan Karuppiah, William H. McClintock, Barry L. Chin
  • Patent number: 8580136
    Abstract: The problem of the present invention is to provide an etching solution composition that can etch with high accuracy a metal-laminated film pattern comprising thin films of copper and a copper alloy, can form an excellent pattern shape, and has practically excellent and stable characteristics with long solution life, and to provide an etching method using such etching solution composition. The present invention relates to an etching method for etching a metal-laminated film having a layer consisting of copper and a layer consisting of a copper alloy containing copper, using an etching solution composition comprising phosphoric acid, nitric acid, acetic acid and water, as well as to said etching solution composition.
    Type: Grant
    Filed: January 25, 2012
    Date of Patent: November 12, 2013
    Assignee: Kanto Kagaku Kabushiki Kaisha
    Inventors: Kenji Ohshiro, Ryou Kouno, Hideki Takahashi
  • Patent number: 8510951
    Abstract: The present disclosure generally relates to a method for producing lens patterns on a roll which is used to produce optical films wherein the method comprises forming a resin film on a roll comprising a plated layer which has been surface-plated with copper (Cu) or nickel (Ni); producing a preliminary lens pattern by striking the surface of the resin film on the roll with a chisel; etching with an etching solution the roll having the preliminary lens pattern formed thereon; and removing the resin film, and a roll for producing optical films comprising lens patterns formed thereon by the same method.
    Type: Grant
    Filed: August 28, 2009
    Date of Patent: August 20, 2013
    Assignee: Toray Advanced Materials Korea Inc.
    Inventors: Hee-Cheong Lee, Sang-Hoon Lee, Jun-Sang Park, Tae-Yong Ryu
  • Patent number: 8486282
    Abstract: Surface texturing of the transparent conductive oxide (TCO) front contact of a thin film photovoltaic (TFPV) solar cell is needed to enhance the light-trapping capability of the TFPV solar cells and thus improving the solar cell efficiency. Embodiments of the current invention describe chemical formulations and methods for the wet etching of the TCO. The formulations and methods may be optimized to tune the surface texturing of the TCO as desired.
    Type: Grant
    Filed: March 22, 2010
    Date of Patent: July 16, 2013
    Assignee: Intermolecular, Inc.
    Inventors: Zhi-Wen Sun, Nitin Kumar, Guizhen Zhang, Minh Anh Nguyen, Nikhil Kalyankar
  • Publication number: 20130142691
    Abstract: Provided is a method for preventing the elution of Bi from copper alloy, in which the elution of Bi is prevented in leadless copper-alloy plumbing equipment and the like containing a trace of lead and a predetermined amount of Bi. The present invention relates to a method for preventing the elution of Bi from copper alloy in which at least Bi present on the surface of copper alloy containing Bi is selectively removed by preferentially dissolving Bi in a 4 to 20 mass % concentration of nitric acid while suppressing Cu dissolution. Furthermore, elution of Pb is suppressed using a 10-20 mass % concentration of nitric acid. In this case, by removing at least Bi present on the surface of copper alloy containing Bi using nitric acid and then treating the surface of the copper alloy by shot-blasting corrosive products, such as oxides, produced from the nitric acid are removed, and gloss is imparted to the surface.
    Type: Application
    Filed: August 24, 2011
    Publication date: June 6, 2013
    Applicant: KITZ CORPORATION
    Inventor: Tomoyuki Ozasa
  • Patent number: 8257600
    Abstract: A method of chemically milling a workpiece includes depositing a masking material on portions of the workpiece according to a predefined masking pattern such that other portions of the workpiece that are desired to be milled are unmasked. Material from the unmasked desired milling areas of the workpiece is chemically removed.
    Type: Grant
    Filed: March 1, 2010
    Date of Patent: September 4, 2012
    Assignee: United Technologies Corporation
    Inventor: Edris Raji
  • Patent number: 8192636
    Abstract: The present invention relates to a method for treating copper or copper alloy surfaces for tight bonding to polymeric substrates, for example solder masks found in multilayer printed circuit boards. The substrate generally is a semiconductor-device, a lead frame or a printed circuit board.
    Type: Grant
    Filed: October 23, 2006
    Date of Patent: June 5, 2012
    Assignee: Atotech Deutschland GmbH
    Inventors: Dirk Tews, Christian Sparing
  • Patent number: 8182710
    Abstract: A method of structuring multicrystalline silicon surfaces comprises the provision of a texturing solution, the application of the texturing solution to a surface of a semiconductor substrate to be structured and the heating of the texturing solution to a texturing temperature, wherein the texturing solution comprises at least a portion of phosphoric acid.
    Type: Grant
    Filed: November 17, 2008
    Date of Patent: May 22, 2012
    Assignee: Deutsche Cell GmbH
    Inventor: Detlef Sontag
  • Patent number: 8123970
    Abstract: A composition comprising a solution of potassium monopersulfate having an active oxygen content of from about 3.4% to about 6.8% and a process for its preparation including neutralization with an alkaline material is disclosed.
    Type: Grant
    Filed: September 10, 2008
    Date of Patent: February 28, 2012
    Assignee: E.I. du Pont de Nemours and Company
    Inventors: Robert Jeffrey Durante, Harvey James Bohn, Jr.
  • Patent number: 8007594
    Abstract: A method for manufacturing a semiconductor device includes the step of conducting a cleaning process for a wafer formed with copper wiring lines to remove contaminations produced on a back surface of the wafer. The cleaning process is conducted by injecting onto the back surface of the wafer an etchant for removing contaminations and simultaneously injecting onto a front surface of the wafer a reductant containing hydrogen.
    Type: Grant
    Filed: July 12, 2010
    Date of Patent: August 30, 2011
    Assignee: Hynix Semiconductor Inc.
    Inventors: Young Bang Lee, Kwang Kee Chae, Ok Min Moon
  • Patent number: 7998359
    Abstract: A method for selectively etching a silicon-containing film on a silicon substrate is disclosed. The method includes depositing a silicon-containing film on the silicon substrate. The method further includes baking the silicon-containing film to create a densified silicon-containing film, wherein the densified film has a first thickness. The method also includes exposing the silicon substrate to an aqueous solution comprising NH4F and HF in a ratio of between about 6:1 and about 100:1, at a temperature of between about 20° C. and about 50° C., and for a time period of between about 30 seconds and about 5 minutes; wherein between about 55% and about 95% of the densified silicon-containing film is removed.
    Type: Grant
    Filed: September 24, 2010
    Date of Patent: August 16, 2011
    Assignee: Innovalight, Inc.
    Inventors: Elena Rogojina, Eric Rosenfeld, Dmitry Poplavskyy
  • Patent number: 7976723
    Abstract: An etching composition, particularly for kinetically controlled etching of copper and copper alloy surfaces; a process for etching copper and copper alloys, particularly for etching at high rates to provide uniform and smooth, isotropic surfaces; an etched copper or copper alloy surface obtained by the process; and a process for generating copper or copper alloy electrical interconnects or contact pads. The etching composition and etching processes provide a smooth, isotropic fast etch of copper and copper alloys for semiconductor fabrication and packaging.
    Type: Grant
    Filed: May 17, 2007
    Date of Patent: July 12, 2011
    Assignee: International Business Machines Corporation
    Inventors: David L. Rath, Emanuel I. Cooper
  • Patent number: 7968000
    Abstract: An etchant composition is provided. The etchant composition includes about 40 to about 65 wt % of phosphoric acid, about 2 to about 5 wt % of nitric acid, about 2 to about 20 wt % of acetic acid, about 0.1 to about 2 wt % of a compound containing phosphate, about 0.1 to about 2 wt % of a compound simultaneously containing an amino group and a carboxyl group, and a remaining weight percent of water for the total weight of the composition.
    Type: Grant
    Filed: April 29, 2009
    Date of Patent: June 28, 2011
    Assignees: Samsung Electronics, Co., Ltd., Dongwoo Fine-Chem Co., Ltd.
    Inventors: Young-Joo Choi, Bong-Kyun Kim, Byeong-Jin Lee, Jong-Hyun Choung, Sun-Young Hong, Nam-Seok Suh, Hong-Sick Park, Ky-Sub Kim, Seung-Yong Lee, Joon-Woo Lee, Young-Chul Park, Young-Jun Jin, Seung-Jae Yang, Hyun-Kyu Lee, Sang-Hoon Jang, Min-Ki Lim
  • Publication number: 20110049104
    Abstract: An etchant for copper or copper alloy, which contains water as a main component and comprises (1) 1 to 20 mass % of iron (III) chloride and (2) 5 to 100 mass %, based on the iron chloride, of oxalic acid, and an etching method using the above etchant are provided, and the etching method includes pretreatment to be carried out with an aqueous solution containing at least one component selected from a component that dissolves copper or copper alloy and an acid, whereby well yields can be materialized.
    Type: Application
    Filed: January 8, 2009
    Publication date: March 3, 2011
    Inventors: Makoto Kato, Yuji Toyoda, Kunihiro Nakagawa, Mariko Ishida, Yasuo Kaneda
  • Patent number: 7897061
    Abstract: The present invention provides a chemical-mechanical polishing (CMP) composition suitable for polishing a substrate comprising a phase change alloy (PCA), such as a germanium-antimony-tellurium (GST) alloy. The composition comprises not more than about 6 percent by weight of a particulate abrasive material in combination with an optional oxidizing agent, at least one chelating agent, and an aqueous carrier therefor. The chelating agent comprises a compound or combination of compounds capable of chelating a phase change alloy or component thereof (e.g., germanium, indium, antimony and/or tellurium species) that is present in the substrate, or chelating a substance that is formed from the PCA during polishing of the substrate with the CMP composition. A CMP method for polishing a phase change alloy-containing substrate utilizing the composition is also disclosed.
    Type: Grant
    Filed: January 29, 2007
    Date of Patent: March 1, 2011
    Assignee: Cabot Microelectronics Corporation
    Inventors: Jeffrey Dysard, Paul Feeney, Sriram Anjur
  • Patent number: 7875558
    Abstract: The present invention is directed to a microetching composition comprising a source of cupric ions, acid, a nitrile compound, and a source of halide ions. Other additive, including organic solvents, a source of molybdenum ions, amines, polyamines, and acrylamides may also be included in the composition of the invention. The present invention is also directed to a method of microetching copper or copper alloy surfaces to increase the adhesion of the copper surface to a polymeric material, comprising the steps of contacting a copper or copper alloy surface with the composition of the invention, and thereafter bonding the polymeric material to the copper or copper alloy surface.
    Type: Grant
    Filed: August 14, 2007
    Date of Patent: January 25, 2011
    Inventors: Kesheng Feng, Nilesh Kapadia, Steven A. Castaldi
  • Patent number: 7850866
    Abstract: An etchant includes hydrogen peroxide (H2O2), and a mixed solution including at least one of an organic acid, an inorganic acid, and a neutral salt.
    Type: Grant
    Filed: July 13, 2004
    Date of Patent: December 14, 2010
    Assignee: LG Display Co., Ltd.
    Inventors: Gyoo-Chul Jo, Ki-Sung Chae
  • Publication number: 20100288731
    Abstract: The invention concerns processes and solutions for the treatment of copper alloy surfaces, which are subsequently to be firmly bonded to polymeric material. The solution is used, in particular for firmly bonding lead frames to encapsulating molding compounds (polymeric material). The solution contains an oxidant, at least one acid, at least one adhesion-enhancing compound characterized in that the solution additionally contains fluoride ions in an amount of at least 100 mg per litre and chloride ions in an amount of 5 to 40 mg per litre. The solution is particularly useful for treatment of copper alloy surfaces, containing alloying elements selected from the group consisting of Si, Ni, Fe, Zr, P, Sn and Zn.
    Type: Application
    Filed: January 31, 2007
    Publication date: November 18, 2010
    Inventors: Christian Wunderlich, Jürgen Barthelmes, Kiyoshi Watanabe, Din-Ghee Neoh, Patrick Lam
  • Patent number: 7780867
    Abstract: Chemical etching methods and associated modules for performing the removal of metal from the edge bevel region of a semiconductor wafer are described. The methods and systems apply liquid etchant in a precise manner at the edge bevel region of the wafer, so that the etchant is applied on to the front edge, the side edge and the back edge. The etchant thus does not flow or splatter onto the active circuit region of the wafer. An edge bevel removal embodiment involving that is particularly effective at obviating streaking, narrowing the metal taper and allowing for subsequent chemical mechanical polishing, is disclosed.
    Type: Grant
    Filed: October 11, 2005
    Date of Patent: August 24, 2010
    Assignee: Novellus Systems, Inc.
    Inventors: Steven T. Mayer, Seshasayee Varadarajan, Douglas A. Preston
  • Patent number: 7736405
    Abstract: A CMP composition containing a rheology agent, e.g., in combination with oxidizing agent, chelating agent, inhibiting agent, abrasive and solvent. Such CMP composition advantageously increases the materials selectivity in the CMP process and is useful for polishing surfaces of copper elements on semiconductor substrates, without the occurrence of dishing or other adverse planarization deficiencies in the polished copper.
    Type: Grant
    Filed: May 12, 2003
    Date of Patent: June 15, 2010
    Assignee: Advanced Technology Materials, Inc.
    Inventors: Michael Darsillo, Peter Wrschka, Karl Boggs
  • Patent number: 7686899
    Abstract: The invention relates to a process for producing a sliding bearing with a sliding surface, which is made of a copper multicomponent alloy with at least two phase constituents, in which process at least one phase constituent at the sliding surface is dissolved by means of an acid, and at least one further phase constituent is retained in a raised form. The sliding bearing preferably is made of a copper/aluminum multicomponent bronze.
    Type: Grant
    Filed: March 30, 2006
    Date of Patent: March 30, 2010
    Assignee: Wieland-Werke AG
    Inventors: Adolf Grohbauer, Manfred Hage, Michael Scharf
  • Patent number: 7670497
    Abstract: A composition that may be used for cleaning a metal containing conductor layer, such as a copper containing conductor layer, within a microelectronic structure includes an aqueous acid, along with an oxidant material and a passivant material contained within the aqueous acid. The composition does not include an abrasive material. The composition is particularly useful for cleaning a residue from a copper containing conductor layer and an adjoining dielectric layer that provides an aperture for accessing the copper containing conductor layer within a microelectronic structure.
    Type: Grant
    Filed: July 6, 2007
    Date of Patent: March 2, 2010
    Assignees: International Business Machines Corporation, Infineon Technologies AG
    Inventors: John A. Fitzsimmons, David L. Rath, Shom Ponoth, Michael Beck