Etching Of Semiconductor Material To Produce An Article Having A Nonelectrical Function Patents (Class 216/2)
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Patent number: 7824560Abstract: A manufacturing method for a substrate for an ink jet head, including formation of an ink supply port in a silicon substrate, the method includes a step of forming, on one side of the substrate, an etching mask layer having an opening at a position corresponding ink supply port; a step of forming unpenetrated holes through the opening of the etching mask layer in at least two rows in a longitudinal direction of the opening; and a step of forming the ink supply port by crystal anisotropic etching of the substrate in the opening.Type: GrantFiled: February 27, 2007Date of Patent: November 2, 2010Assignee: Canon Kabushiki KaishaInventors: Toshiyasu Sakai, Shuji Koyama, Kenji Ono, Jun Yamamuro
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Patent number: 7824561Abstract: A method for manufacturing a probe structure is disclosed. In accordance with the method, two semiconductor substrates having different crystal directions are bonded and selectively etched utilizing an etch selectivity due to the different crystal directions to form a probe tip region and a probe beam region. A cantilever structure for a probe card is formed by filling the probe tip region and the probe beam region with a conductive material.Type: GrantFiled: July 25, 2007Date of Patent: November 2, 2010Assignee: Will Technology Co., Ltd.Inventors: Bong Hwan Kim, Bum Jin Park, Jong Bok Kim, Chi Woo Lee
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Publication number: 20100272387Abstract: The invention relates to a photonic crystal circuit comprising a guide produced in a photonic crystal membrane on the surface of a substrate and a mode adapter coupled to said guide, wherein the membrane includes a central point constituting the mode adapter having a section gradient as termination of said guide, said point being suspended so as to allow the propagation of modes in a symmetrical manner. It also relates to an optical system incorporating said circuit coupled to an optical fiber.Type: ApplicationFiled: July 8, 2009Publication date: October 28, 2010Applicant: ThalesInventors: Sylvain Combrie, Nguyen Vy Quynh Tran, Alfredo De Rossi
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Patent number: 7820063Abstract: A reflective and deformable micromirror device comprises a reflective micromirror plate attached to a deformable hinge that is formed on and held by a hinge post on a substrate. The substrate has an addressing electrode formed thereon. A selected dielectric material is disposed between the deformable hinge and the addressing electrode.Type: GrantFiled: November 16, 2007Date of Patent: October 26, 2010Assignee: Texas Instruments IncorporatedInventor: Rabah Mezenner
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Patent number: 7817331Abstract: A vertical comb electro-static actuator for rotating a micro-electro-mechanical micro-mirror device about a tilt axis or rotation. The rotor comb fingers of the comb drive extend from a sub-frame of the micro-mirror, which includes a prestressed layer for bending the rotor comb fingers at an angle to the substrate and mirrored platform, enabling the platform, the hinges, the rotor comb fingers and the stator comb fingers to be formed in the same layer, i.e. the same etching step.Type: GrantFiled: March 6, 2008Date of Patent: October 19, 2010Assignee: JDS Uniphase CorporationInventor: Abdul Jaleel. K. Moidu
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Patent number: 7807061Abstract: A method of producing a structure by three-dimensionally processing a flat member includes a preparing, a first forming and a second forming. In the preparing, a substrate is prepared. In the first forming, an etching mask is formed on the substrate. The etching mask has at least two openings, and areas of the two openings are different from each other. In the second forming, at least a part of a three-dimension surface shape of the structure is formed on a surface of the substrate by a dry-etching on the substrate in accordance with the area of the opening of the etching mask.Type: GrantFiled: July 10, 2007Date of Patent: October 5, 2010Assignee: DENSO CORPORATIONInventors: Hiroyuki Wado, Kazuhiko Kanoh
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Patent number: 7799699Abstract: The present invention provides a high yield pathway for the fabrication, transfer and assembly of high quality printable semiconductor elements having selected physical dimensions, shapes, compositions and spatial orientations. The compositions and methods of the present invention provide high precision registered transfer and integration of arrays of microsized and/or nanosized semiconductor structures onto substrates, including large area substrates and/or flexible substrates. In addition, the present invention provides methods of making printable semiconductor elements from low cost bulk materials, such as bulk silicon wafers, and smart-materials processing strategies that enable a versatile and commercially attractive printing-based fabrication platform for making a broad range of functional semiconductor devices.Type: GrantFiled: June 1, 2006Date of Patent: September 21, 2010Assignee: The Board of Trustees of the University of IllinoisInventors: Ralph G. Nuzzo, John A. Rogers, Etienne Menard, Keon Jae Lee, Dahl-Young Khang, Yugang Sun, Matthew Meitl, Zhengtao Zhu, Heung Cho Ko, Shawn Mack
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Patent number: 7795063Abstract: A micro-electro-mechanical systems (MEMS) device includes a back-plate substrate, having an intended region formed with a plurality of perforating holes. A first structural dielectric layer, disposed on the back-plate substrate, wherein the dielectric layer having an opening above the intended region. An etching stop layer, disposed over the first structural dielectric layer. A second structural dielectric layer, formed over the back-plate substrate. The etching stop layer and the second structural dielectric layer form at least a part of a micro-machine diaphragm, and cover over the opening of the first structural dielectric layer to form a chamber between the micro-machine diaphragm and the back-plate substrate.Type: GrantFiled: December 31, 2007Date of Patent: September 14, 2010Assignee: Solid State System Co., Ltd.Inventors: Tsung-Min Hsieh, Chien-Hsing Lee
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Patent number: 7794610Abstract: The invention relates to a method for making an actuation system for an optical component comprising: etching of a first face of a component, to form pads on it, etching of a second face of the component, to expose a membrane made of the same material as the pads, production of the actuation means of the pads and the membrane.Type: GrantFiled: December 23, 2004Date of Patent: September 14, 2010Assignee: Commissariat a l'Energie AtomiqueInventors: Claire Divoux, Marie-Helene Vaudaine, Thierry Enot
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Patent number: 7794611Abstract: A micropump includes a body (10) of semiconductor material, accommodating fluid-tight chambers (32), having an internal preset pressure, lower than atmospheric pressure. The fluid-tight chambers (32), sealed by a diaphragm (35) that can be electrically opened, are selectively openable using a first electrode (37) and second electrodes (38), accommodating between them portions of the diaphragm (35).Type: GrantFiled: January 24, 2008Date of Patent: September 14, 2010Assignee: STMicroelectronics S.r.l.Inventor: Mario Scurati
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Publication number: 20100227018Abstract: The invention concerns a device forming an imprint mould in three dimensions and comprising at least: a substrate, comprising at least one alternation of layers having at least one part perpendicular to the plane of the substrate, in a first type of material and a second type of material which can be etched selectively relative to each other, a surface topology comprising at least: a) first patterns whose top lies at a first level relative to a surface of the substrate located either side of said topology, these first patterns being in a first type of material, b) and second patterns having at least a second level relative to said surface of the substrate, different from and lower than the first level, and these second patterns being in a second type of material.Type: ApplicationFiled: March 2, 2010Publication date: September 9, 2010Applicant: COMMISSARIAT A L' ENERGIE ATOMIQUEInventor: Stèfan LANDIS
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Patent number: 7790045Abstract: The present invention relates to the self-assembly of a spherical-morphology block copolymer into V-shaped grooves of a substrate. Although spherical morphology block copolymers typically form a body-centered cubic system (bcc) sphere array in bulk, the V-shaped grooves promote the formation of a face-centered cubic system (fcc) sphere array that is well ordered. In one embodiment, the (111) planes of the fcc sphere array are parallel to the angled side walls of the V-shaped groove. The (100) plane of the fcc sphere array is parallel to the top surface of the substrate, and may show a square symmetry among adjacent spheres. This square symmetry is unlike the hexagonal symmetry seen in monolayers of spherical domains and is a useful geometry for lithography applications, especially those used in semiconductor applications.Type: GrantFiled: September 13, 2007Date of Patent: September 7, 2010Assignee: Massachusetts Institute of TechnologyInventors: Peng-Wei Chuang, Caroline A. Ross
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Patent number: 7785481Abstract: A method for fabricating micromachined structures is provided. At least one cavity is formed on a substrate and then a dielectric material different from the material of the substrate is filled in the at least one cavity. Next, a circuitry layer including a first etch-resistant layer and a dielectric layer is formed above the at least one cavity filled with the dielectric material. A portion of the circuitry layer exposed by the first etch-resistant layer is then etched. Finally, the dielectric material in the at least one cavity is etched out.Type: GrantFiled: November 21, 2007Date of Patent: August 31, 2010Assignee: PixArt Imaging Inc.Inventor: Chuan Wei Wang
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Patent number: 7785485Abstract: A method for manufacturing blades for surgical and other uses from either a crystalline or polycrystalline material, preferably in the form of a wafer, comprises preparing the crystalline or polycrystalline wafers by mounting them and machining trenches into the wafers. The methods for machining the trenches, which form the bevel blade surfaces, include a diamond blade saw, laser system, ultrasonic machine, a hot forge press and a router. When a router is used, through-holes are drilled in the wafer to define the starting locations of the trenches. After the trenches are formed, the wafers are placed in an etchant solution which isotropically etches the wafers in a uniform manner, such that layers of crystalline or polycrystalline material are removed uniformly, producing single or double bevel blades, with each bevel having one or more facets. Nearly any bevel angle can be machined into the wafer which remains after etching.Type: GrantFiled: September 17, 2004Date of Patent: August 31, 2010Assignee: Becton, Dickinson and CompanyInventors: Vadim M. Daskal, Joseph F. Keenan, James Joseph Hughes
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Patent number: 7785459Abstract: Low cost methods for fabricating microneedles are disclosed. According to one embodiment, the fabrication method includes the steps of: providing a substrate; forming a metal-containing seed layer on the top surface of the substrate; forming a nonconductive pattern on a portion of the seed layer; plating a first metal on the seed layer and over the edge of the nonconductive pattern to create a micromold with an opening that exposes a portion of the nonconductive pattern; plating a second metal onto the micromold to form a microneedle in the opening; separating the micromold with the microneedle formed therein from the seed layer and the nonconductive pattern; and selectively etching the micromold so as to release the microneedle. In another embodiment, the micromold is not required.Type: GrantFiled: May 28, 2006Date of Patent: August 31, 2010Assignee: Hewlett-Packard Development Company, L.P.Inventors: Ramesh S/O Govinda Raju, Ming-Li Tan, Yusua Agabus, Patricia A. Beck
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Patent number: 7776749Abstract: The invention includes optical signal conduits having rare earth elements incorporated therein. The optical signal conduits can, for example, contain rare earth elements incorporated within a dielectric material matrix. For instance, erbium or cerium can be within silicon nanocrystals dispersed throughout dielectric material of optical signal conduits. The dielectric material can define a path for the optical signal, and can be wrapped in a sheath which aids in keeping the optical signal along the path. The sheath can include any suitable barrier material, and can, for example, contain one or more metallic materials. The invention also includes methods of forming optical signal conduits, with some of such methods being methods in which the optical signal conduits are formed to be part of semiconductor constructions.Type: GrantFiled: August 28, 2007Date of Patent: August 17, 2010Assignee: Micron Technology, Inc.Inventor: Chandra Mouli
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Patent number: 7771790Abstract: A method and system for fabricating nano-scale structures, such as channels (i.e., nano-channels) or vias (i.e., nano-vias). An open nano-structure, is formed in a substrate. Thereafter, a conformal material film may be deposited within and over the nano-structure using an optional first deposition process condition, and then the open nano-structure is closed off to form a closed nano-scale structure using a second deposition process condition, including one or more process steps.Type: GrantFiled: August 30, 2006Date of Patent: August 10, 2010Assignee: Tokyo Electron LimitedInventor: Jacques Faguet
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Patent number: 7767101Abstract: A method of fabricating a probe tip for use in a scanning probe microscope, includes the steps of: forming a triangular prism provided with a passivation film by patterning a {111} general silicon wafer, the passivation film being deposited on two sidewalls of the triangular prism; etching the silicon wafer to make the triangular prism into a probe tip of a triangular pyramid shape; and removing the passivation film.Type: GrantFiled: May 24, 2007Date of Patent: August 3, 2010Assignee: M2N Inc.Inventors: Young Geun Park, Hee Ok Jang
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Patent number: 7767099Abstract: The present invention is directed to the formation of sublithographic features in a semiconductor structure using self-assembling polymers. The self-assembling polymers are formed in openings in a hard mask, annealed and then etched, followed by etching of the underlying dielectric material. At least one sublithographic feature is formed according to this method. Also disclosed is an intermediate semiconductor structure in which at least one interconnect wiring feature has a dimension that is defined by a self-assembled block copolymer.Type: GrantFiled: January 26, 2007Date of Patent: August 3, 2010Assignee: International Business Machines CorporaitonInventors: Wai-Kin Li, Haining S. Yang
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Patent number: 7755825Abstract: A method of fabricating an optical modulator on a silicon substrate, comprising: forming a silicon nitride layer on the silicon substrate; forming a first polycrystalline silicon layer (PSL) on the silicon nitride layer; patterning the first PSL; forming a first silicon dioxide layer (SDL) on the first patterned PSL; patterning the first SDL; forming a second PSL on the first patterned SDL; patterning the second PSL; forming a second SDL on the second patterned PSL; patterning the second SDL; forming a third PSL on the second patterned SDL; patterning the third PSL; forming a metal layer on the third patterned PSL; patterning the metal layer; removing the first and second SDLs to effect release of first and second side reflectors; forming an active layer on the metal layer; and patterning the active layer or stack to form a base reflector and associated conductive traces for biasing.Type: GrantFiled: June 13, 2007Date of Patent: July 13, 2010Assignee: The United States of America as represented by the Secretary of the NavyInventors: Rudy S. Padilla, Michael G. Lovern, Stephen D. Russell, Randy L. Shimabukuro
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Patent number: 7736929Abstract: Low temperature, multi-layered microshells for encapsulation of devices such as MEMS and microelectronics. The microshells may include a perforated pre-sealing layer, below which a sacrificial layer is accessed, and a sealing layer to close the perforation in the pre-sealing layer after the sacrificial material is removed. The pre-sealing layer includes a large surface area getter layer to remove contaminants from the space ultimately enclosed by the microshell to improve the pressure control and cleanliness of the microshell.Type: GrantFiled: March 9, 2007Date of Patent: June 15, 2010Assignee: Silicon Clocks, Inc.Inventors: Pezhman Monadgemi, Emmanuel P. Quevy, Roger T. Howe
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Patent number: 7738753Abstract: An optoelectronic circuit fabrication method and integrated circuit apparatus fabricated therewith. Integrated circuits are fabricated with an integral optical coupling transition to efficiently couple optical energy from an optical fiber to an integrated optical waveguide on the integrated circuit. Layers of specific materials are deposited onto a semiconductor circuit to support etching of a trench to receive an optical coupler that performs proper impedance matching between an optical fiber and an on-circuit optical waveguide that extends part way into the transition channel. A silicon based dielectric that includes at least a portion with a refractive index substantially equal to a section of the optical fiber is deposited into the etched trench to create the optical coupler. Silicon based dielectrics with graded indices are also able to be used. Chemical mechanical polishing is used finalize preparation of the optical transition and integrated circuit.Type: GrantFiled: June 30, 2008Date of Patent: June 15, 2010Assignee: International Business Machines CorporationInventors: Solomon Assefa, Christopher Jahnes, Yurii Vlasov
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Publication number: 20100143198Abstract: A sample support structure comprising a sample support manufactured from a semiconductor material and having one or more openings therein. Methods of making and using the sample support structure.Type: ApplicationFiled: November 16, 2007Publication date: June 10, 2010Applicant: PROTOCHIPS, INC.Inventors: John Damiano, JR., Stephen E. Mick, David P. Nackashi
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Patent number: 7728485Abstract: A BAW device includes a semiconductor substrate with a surface region, an insulating layer formed on the surface region and a piezoelectric layer sandwiched by a first and second electrode, wherein the second electrode is formed on the insulating layer. The surface region is performed such that a voltage dependence of a capacitance between the substrate and the second electrode is substantially suppressed.Type: GrantFiled: May 30, 2008Date of Patent: June 1, 2010Assignee: Avago Technologies Wireless IP (Singapore) Pte. Ltd.Inventors: Martin Handtmann, Martin Franosch
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Patent number: 7723143Abstract: A method for manufacturing a cantilever structure of a probe card is disclosed. In accordance with the method of the present invention, a first sacrificial wafer is used as a mold to form a cantilever structure having various shapes, a microscopic pitch and a high aspect ratio. In accordance with the method of the present invention, a probe tip may be formed by using a second sacrificial substrate and a bonding.Type: GrantFiled: June 8, 2007Date of Patent: May 25, 2010Assignee: Will Technology Co., Ltd.Inventors: Bong Hwan Kim, Jong Bok Kim
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Patent number: 7718457Abstract: A method of producing a MEMS device provides an apparatus having structure on a first layer that is proximate to a substrate. The apparatus has a space proximate to the structure. The method adds doped material to the space. The doped material dopes at least a portion of the first layer.Type: GrantFiled: April 5, 2005Date of Patent: May 18, 2010Assignee: Analog Devices, Inc.Inventors: Thomas Chen, Michael Judy
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Patent number: 7718077Abstract: A method of fabricating an article usable in an imprint lithographic process is disclosed. The method includes patterning masking material layers on a substrate thereby forming a multi-layer mask and sequentially removing portions of the substrate based on the multi-layer mask to thereby forming a structure usable in an imprint lithographic process.Type: GrantFiled: July 25, 2006Date of Patent: May 18, 2010Assignee: Hewlett-Packard Development Company, L.P.Inventors: Han-Jun Kim, Carl P. Taussig
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Publication number: 20100110840Abstract: The invention relates to a Breguet overcoil balance spring (1) that includes a hairspring (3) mounted in a single part, made of micro-machinable material, and coaxially with a collet (5). According to the invention, the balance spring has a terminal curve (7) made of micro-machinable material and an elevation device (9) made of micro-machinable material between the outer coil (15) of the hairspring and the terminal curve to improve the concentric development of the balance spring. The invention also relates to the method of manufacturing the balance spring. The invention concerns the field of timepiece making.Type: ApplicationFiled: October 26, 2009Publication date: May 6, 2010Applicant: MONTRES BREGUET S.A.Inventors: Alain Zaugg, Christophe Bifrare
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Publication number: 20100112492Abstract: A method for forming an optical deflection device includes providing a semiconductor substrate comprising an upper surface region and a plurality of drive devices within one or more portions of the semiconductor substrate. The upper surface region includes one or more patterned structure regions and at least one open region to expose a portion of the upper surface region to form a resulting surface region. The method also includes forming a planarizing material overlying the resulting surface region to fill the at least one open region and cause formation of an upper planarized layer using the fill material. The method further includes forming a thickness of silicon material at a temperature of less than 300° C. to maintain a state of the planarizing material.Type: ApplicationFiled: January 20, 2010Publication date: May 6, 2010Applicant: Miradia Inc.Inventors: Xiao Yang, Yuxiang Wang, Wook Ji, Justin Allen Payne, Ye Wang, Howard Woo
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Patent number: 7703313Abstract: Embodiments of the invention relate to a fluid containment structure for a micro analyzer comprising one or more shelled thermal structures in contact with a thermally isolated component of the analyzer and wherein the shelled thermal structure comprises a conformal film and also comprises three walls of a channel and the thermally isolated component forms the fourth wall.Type: GrantFiled: February 14, 2007Date of Patent: April 27, 2010Assignee: Honeywell International Inc.Inventor: Robert E. Higashi
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Patent number: 7686967Abstract: A cooled liquid sample dispensing system comprises a pair of pins for holding a droplet of liquid therebetween and a cooling element. Each pin includes a tip spaced predetermined distance from the other pin to define a sample acquisition region. The pins acquire and hold a droplet of the liquid sample in the sample acquisition region formed in the space between the tips and apply the droplet to a selected sample handing system. The cooling element, when activated, cools the droplet of liquid to reduce evaporation.Type: GrantFiled: June 8, 2007Date of Patent: March 30, 2010Assignee: Cytonome/St, LLCInventors: John R. Gilbert, Sebastian Böhm
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Patent number: 7686970Abstract: A method for manufacturing a working template for use in imprint lithography is disclosed, which in an embodiment, involves contacting a first target region of an imprintable medium on a working template substrate with a master template to form a first imprint in the medium, the imprint defining a part of a working template pattern, separating the master template from the imprinted medium, contacting a second target region of the medium with the master template to form a second imprint in the medium, the second imprint defining a further part of the working template pattern, and separating the master template from the imprinted medium.Type: GrantFiled: December 30, 2004Date of Patent: March 30, 2010Assignee: ASML Netherlands B.V.Inventors: Aleksey Yurievich Kolesnychenko, Helmar Van Santen, Yvonne Kruijt-Stegeman
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Publication number: 20100067084Abstract: A semiconductor structure provided with an insulation structure in a moving unit is manufactured easily. An optical scanning mirror (semiconductor structure) is formed by processing an SOI substrate consists of a first silicon layer, an oxide film and a second silicon layer. A moving unit, which is supported on a fixed frame through first hinges, is formed on the first silicon layer. The moving unit is divided into a plurality of regions by forming trenches (insulation structure). A supporting member formed of the oxide film and the second silicon layer is formed just below the trenches. The plurality of regions of the moving frame divided by the trenches are joined to the supporting member so that the moving unit is swingable with the supporting member. Thereby, the supporting member is formed by simple etching processes, and thus, mechanical strength of the moving unit is ensured.Type: ApplicationFiled: January 23, 2008Publication date: March 18, 2010Applicant: PANASONIC ELECTRIC WORKS CO., LTD.Inventors: Yousuke Hagihara, Kiyohiko Kawano, Hiroshi Noge
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Patent number: 7678289Abstract: A method of indicating the progress of a sacrificial material removal process, the method, comprising; freeing a portion of a member, the member being disposed in a cage and laterally surrounded by the sacrificial material; and preventing the freed portion of the member from floating away by retaining the freed member.Type: GrantFiled: March 11, 2008Date of Patent: March 16, 2010Assignee: Hewlett-Packard Development Company, L.P.Inventors: Stephen Jalrus Potochnik, Kenneth James Faase
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Patent number: 7678587Abstract: Disclosed is a cantilever-type probe and methods of fabricating the same. The probe is comprised of a cantilever being longer lengthwise relative to the directions of width and height, and a tip extending from the bottom of the cantilever and formed at an end of the cantilever. A section of the tip parallel to the bottom of the cantilever is rectangular, having four sides slant to the lengthwise direction of the cantilever.Type: GrantFiled: August 2, 2006Date of Patent: March 16, 2010Assignee: Phicom CorporationInventors: Ki-Joon Kim, Yong-Hwi Jo
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Patent number: 7674389Abstract: Methods of shape modifying a nanodevice by contacting it with a low-energy focused electron beam are disclosed here. In one embodiment, a nanodevice may be permanently reformed to a different geometry through an application of a deforming force and a low-energy focused electron beam. With the addition of an assist gas, material may be removed from the nanodevice through application of the low-energy focused electron beam. The independent methods of shape modification and material removal may be used either individually or simultaneously. Precision cuts with accuracies as high as 10 nm may be achieved through the use of precision low-energy Scanning Electron Microscope scan beams. These methods may be used in an automated system to produce nanodevices of very precise dimensions. These methods may be used to produce nanodevices of carbon-based, silicon-based, or other compositions by varying the assist gas.Type: GrantFiled: October 26, 2005Date of Patent: March 9, 2010Assignee: The Regents of the University of CaliforniaInventors: Alex Zettl, Thomas David Yuzvinsky, Adam Fennimore
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Patent number: 7666319Abstract: A spatial light modulator structure is fabricated by forming moveable reflecting elements through plasma etching of silicon in a chlorine ambient. In accordance with one particular embodiment, a mirror comprising single crystal silicon is released from the surrounding material by plasma etching in an ambient including chlorine (Cl2), sulfur hexafluoride (SF6), and boron trichloride (BCl3). Cl2 serves as a source of reactive chlorine etching species for the plasma. SF6 provides a source of fluorine, a reactive species enhancing the rate of etching single crystal silicon. BCl3 provides boron, which becomes incorporated on the surface of the etched single crystal silicon as a passivation layer controlling etch profile. Plasma etching of the single crystal silicon to release the mirrors takes place in the absence of oxygen, in order to avoid unwanted formation of silicon oxide residue that can adversely affect mechanical and optical properties of the resulting device.Type: GrantFiled: November 1, 2005Date of Patent: February 23, 2010Assignee: Miradia Inc.Inventor: Kegang Huang
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Publication number: 20100025361Abstract: A method of making a planar lightwave circuit (PLC) waveguide capable of being integrated with a surface-mounted component is presented. The method entails etching a silicon substrate to form a slanted wall, forming a nonreflective waveguide portion on the silicon substrate, and depositing a reflective layer on the slanted wall. Light travels through the nonreflective waveguide portion in substantially a first direction, and the light from the nonreflective waveguide portion strikes the reflective layer to be redirected in a second direction. The second direction may be the direction toward the surface-mounted component. A PLC waveguide device made with the above method is also presented.Type: ApplicationFiled: October 12, 2009Publication date: February 4, 2010Inventors: HongZhen WEI, Ray Liang, Wenhua Lin, Ted Chen, Jacob Sun
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Patent number: 7655075Abstract: A method for producing a filter element involving applying a membrane layer to a carrier substrate, etching a membrane chamber, producing pores in the membrane layer, subjecting the membrane layer to an additional treatment to increase the mechanical strength.Type: GrantFiled: July 3, 2004Date of Patent: February 2, 2010Assignee: NFT Nonofiltertechnik Gesellschaft Mit Beschrankter HaftungInventor: Wilfried Hofmann
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Patent number: 7655538Abstract: A method for producing Microelectromechanical Systems (MEMS) and related devices using Silicon-On-Insulator (SOI) wafer includes providing an SOI wafer, performing a mesa etch to at least partially define the MEMS device, bonding the SOI wafer to an interposer by direct boding, removing the handle layer of the SOI wafer, removing the oxide layer of the SOI wafer, and further etching the device layer of the SOI wafer to define the MEMS device. A structure manufactured according to the above described processes includes an interposer comprising an SOI wafer and a MEMS device mounted on the interposer. The MEMS device comprises posts extending from a silicon plate. The MEMS device is directly mounted to the interposer by bonding the posts of the MEMS device to the device layer of the interposer.Type: GrantFiled: September 19, 2007Date of Patent: February 2, 2010Assignee: The Charles Stark Draper Laboratory, Inc.Inventor: William D. Sawyer
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Publication number: 20100007935Abstract: An optical scanning device includes an oscillating mirror portion having a reflection surface, and a frame portion holding the oscillating mirror portion. The optical scanning device reflects an incident optical flux by the reflection surface so as to convert the incident optical flux into a scanned optical flux. The optical scanning device further includes a reflection portion having a first reflection surface and a second reflection surface which are arranged in substantially V-shaped inclined surfaces. The first reflection surface reflects the incident optical flux and radiates the reflected light toward the oscillating mirror portion. The second reflection surface receives the reflected light from the oscillating mirror portion and radiates the reflected light as the scanned optical flux.Type: ApplicationFiled: August 24, 2009Publication date: January 14, 2010Applicant: BROTHER KOGYO KABUSHIKI KAISHAInventor: Yasuo Nishikawa
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Patent number: 7641806Abstract: By steps of forming first masks 13, 14 each having a first pattern on a first surface of a substrate 11 on which a membrane is to be formed, etching the first surface of the substrate 11 by using the first masks 13, 14 to forming first support beams 15, positioning a second surface of the substrate 11 on the basis of the first pattern on the first surface, forming a second mask 17 having a second pattern on the second surface of the substrate 11 based on the alignment and etching the second surface of the substrate 11 in dry by using the second mask 17 to form the second support beams 20, a membrane member 22a where the first and second support beams 15, 20 are formed on both surfaces of the membrane 12 is manufactured. Consequently, it is possible to provide the membrane member that is sufficient in strength and is hard to be deformed by heat.Type: GrantFiled: June 10, 2004Date of Patent: January 5, 2010Assignees: Tokyo Electron Limited, OCTEC Inc.Inventors: Katsuya Okumura, Kazuya Nagaseki, Naoyuki Satoh, Koji Maruyama
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Patent number: 7632417Abstract: Provided is a method of forming a nanostructure having a nano-sized diameter and a high aspect ratio through a simple and economical process. To form the nanostructure, a polymer thin film is formed on a substrate and a mold is brought to contact the polymer thin film. Then, a polymer patterning is formed to contact the background surface of an engraved part of the mold, and then the polymer pattern is extended out by removing the mold out of the polymer thin film. The nanostructure forming method of the present research can reproduce diverse cilia optimized in the natural world. Also, it can be used to develop new materials with an ultra-hydrophobic property or a high adhesiveness. Further, it can be applied to a nanopattern forming process for miniaturizing electronic devices and to various ultra-precise industrial technologies together with carbon nanotube, which stands in the highlight recently.Type: GrantFiled: November 7, 2005Date of Patent: December 15, 2009Assignee: Seoul National University Industry FoundationInventors: Kahp-Yang Suh, Hoon-Eui Jeong
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Patent number: 7630596Abstract: A silicon structure includes a silicon substrate; and an on-substrate structure including a silicon compound film and formed on said silicon substrate. At least one removal section removed through anisotropic etching and at least one supporting column left through the anisotropic etching to support said on-substrate structure are provided for a direct lower portion of said silicon substrate directly beneath said on-substrate structure.Type: GrantFiled: June 27, 2008Date of Patent: December 8, 2009Inventor: Shinya Watanabe
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Patent number: 7625603Abstract: A silicon oxide layer is formed by oxidation or decomposition of a silicon precursor gas in an oxygen-rich environment followed by annealing. The silicon oxide layer may be formed with slightly compressive stress to yield, following annealing, an oxide layer having very low stress. The silicon oxide layer thus formed is readily etched without resulting residue using HF-vapor.Type: GrantFiled: November 14, 2003Date of Patent: December 1, 2009Assignee: Robert Bosch GmbHInventors: Aaron Partridge, Markus Lutz, Silvia Kronmueller
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Patent number: 7618548Abstract: We have developed an uncomplicated method of plasma etching deeply recessed features such as deep trenches, of at least 5 ?m in depth, in a silicon-containing substrate, in a manner which generates smooth sidewalls, having a roughness of less than about 1 ?m, typically less than about 500 nm, and even more typically between about 100 nm and 20 nm. Features having a sidewall taper angle, relative to an underlying substrate, typically ranges from about 85° to about 92° and exhibiting the smooth sidewalls are produced by the method. In one embodiment, a stabilizing etchant species is used constantly during the plasma etch process, while at least one other etchant species and at least one polymer depositing species are applied intermittently, typically periodically, relative to each other. In another embodiment, the stabilizing etchant species is used constantly and a mixture of the other etchant species and polymer depositing species is used intermittently.Type: GrantFiled: August 29, 2005Date of Patent: November 17, 2009Assignee: Applied Materials, Inc.Inventors: Jeffrey D. Chinn, Michael Rattner, Nicholas Pornsin-Sirirak, Yanping Li
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Patent number: 7604749Abstract: Wet anisotropic etching techniques are well known micromachining apparatus in MEMS technology. The wet anisotropic etchant etch some of the material crystal planes faster than the other. For example the (001) planes are etched much faster than the (111) planes. The final shape is dependent upon the etch mask and the crystal planes orientation. A technique is described hereafter where the nature of the wet anisotropic etch process is used for fabrication of electrostatic transducers and in particular electrostatic comb drive actuators and sensors. Using the same anisotropic wet etching technique it is possible to reduce the cross section of suspensions and thus to soften a spring or to change the resonance frequency of mechanical resonators. Final cross section is dependent of the etching time. Under the anisotropic wet etching the cross section of the suspensions is changed rapidly.Type: GrantFiled: December 21, 2006Date of Patent: October 20, 2009Inventor: Omer Cohen
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Patent number: 7606132Abstract: Disclosed are a cantilever-type near-field probe capable of easily improving an optical throughput and being applied to a head of an optical data storage and a method of manufacturing the same. An oxide film is formed on a silicon substrate having dielectric films formed as a mask layer on upper and lower portions thereof, and a circular dielectric film formed on the upper mask layer and providing a function of a holder. A distal end of the probe has a parabolic structure by use of an effect of a bird's peak provided due to a difference of growth rate of the oxide film produced by the dielectric film, thereby forming the initial probe. After the dielectric film is removed from the initial probe, a bottom surface of the silicon substrate is removed, thereby providing the probe with the near-field aperture having a high throughput.Type: GrantFiled: October 12, 2005Date of Patent: October 20, 2009Assignee: Electronics and Telecommunications Research InstituteInventors: Kibong Song, Eunkyoung Kim, Sung Qyu Lee, Kang Ho Park, Jun Ho Kim
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Patent number: 7601620Abstract: Improved nanocoils, systems and methods for fabricating nanocoils. Embodiments enable wet etching techniques for releasing coiling arm structures and forming nanocoils. A method for fabricating nanocoils includes providing a silicon-on-insulator (SOI) wafer in which SOI wafer includes a buried oxide layer, patterning one or more devices onto a silicon device layer on top of the buried oxide layer, depositing a tensile stressed layer on the silicon device layer so that stressed layer and silicon device layer form a stressed coiling bi-layer, patterning a coiling arm structure on the stressed coiling bi-layer, depositing a metal encapsulation layer on the stressed coiling bi-layer, and releasing the coiling arm structure so that coiling arm coils to form nanocoil.Type: GrantFiled: September 21, 2006Date of Patent: October 13, 2009Assignee: Northrop Grumman Systems CorporationInventors: Garrett A. Storaska, Robert S. Howell
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Patent number: 7597819Abstract: Etchant solutions comprising a redox buffer can be used during the release etch step to reduce damage to the structural layers of a MEMS device that has noble material films. A preferred redox buffer comprises a soluble thiophosphoric acid, ester, or salt that maintains the electrochemical potential of the etchant solution at a level that prevents oxidation of the structural material. Therefore, the redox buffer preferentially oxidizes in place of the structural material. The sacrificial redox buffer thereby protects the exposed structural layers while permitting the dissolution of sacrificial oxide layers during the release etch.Type: GrantFiled: December 20, 2004Date of Patent: October 6, 2009Assignee: Sandia CorporationInventor: Matthew G. Hankins