Etching Of Semiconductor Material To Produce An Article Having A Nonelectrical Function Patents (Class 216/2)
  • Publication number: 20080283487
    Abstract: A process for producing a three-dimensional photonic crystal comprises the steps of providing a base material having first and second faces adjoining together at a first angle; forming a first mask on the first face; forming fine holes in the base material by dry-etching on the first face in a direction at a second angle to the first face; forming a second mask on the second face; and forming fine holes in the base material by dry-etching on the second face in a direction at a third angle to the second face; the first mask and the second mask, being formed by implantation of ions by a focused ion beam onto the surface layer of the mask formation face of the base material.
    Type: Application
    Filed: April 24, 2008
    Publication date: November 20, 2008
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Shinan Wang, Kenji Tamamori, Taiko Motoi, Masahiko Okunuki, Haruhito Ono, Toshiaki Aiba
  • Patent number: 7449122
    Abstract: An electrokinetic pump for pumping a liquid includes a pumping body having a plurality of narrow, short and straight pore apertures for channeling the liquid through the body. A pair of electrodes for applying a voltage differential are formed on opposing surfaces of the pumping body at opposite ends of the pore apertures. The pumping body is formed on a support structure to maintain a mechanical integrity of the pumping body. The pump can be fabricated using conventional semiconductor processing steps. The pores are preferably formed using plasma etching. The structure is oxidized to insulate the structure and also narrow the pores. A support structure is formed by etching a substrate and removing an interface oxide layer. Electrodes are formed to apply a voltage potential across the pumping body. Another method of fabricating an electrokinetic pump includes providing etch stop alignment marks so that the etch step self-terminates.
    Type: Grant
    Filed: October 18, 2004
    Date of Patent: November 11, 2008
    Assignee: Cooligy Inc.
    Inventors: David Corbin, Kenneth Goodson, Thomas Kenny, Juan Santiago, Shulin Zeng
  • Patent number: 7445119
    Abstract: Cavities for holding semiconductor chips are etched anisotropically into a semiconductor wafer. An orientation of the wafer in the (100) pulling direction results in geometrically exactly etched sidewalls of the cavities with an angle of 125.3°. What is thereby achieved is that chips can slip into the cavity with a low risk of damage. A transparent cover plate is situated on the cavity plate.
    Type: Grant
    Filed: April 29, 2004
    Date of Patent: November 4, 2008
    Assignee: Osram Opto Semiconductors GmbH
    Inventors: Mathias Kaempf, Frank Singer, Jurgen Dachs, Alfred Bachler
  • Patent number: 7442303
    Abstract: A filter membrane, methods of making such filter membrane and apparatus employing such filter membrane are disclosed, in which the filter membrane is a monolithic polymeric membrane that includes a polymeric filter layer including a micron-scale precision-shaped pores and a polymeric support layer that has a precision-shaped porous support structure for the filter layer. Several methods are disclosed for making such a membrane using micromachining techniques, including lithographic, laser ablation and x-ray treatment techniques. Several filter apparatus employing such a membrane are also disclosed.
    Type: Grant
    Filed: August 2, 2005
    Date of Patent: October 28, 2008
    Assignee: Baxter International Inc.
    Inventor: James D. Jacobson
  • Patent number: 7441444
    Abstract: The invention provides high performance cantilevers with optimal combinations of high resonant frequency and low force constant. In one aspect, AFM cantilevers with spring constants in the range 1-10?6 N/m with (fundamental) resonant frequencies in aqueous solutions of 0.1-100 MHz are provided. A high performance cantilever may be made by focused ion beam milling or electron deposition. The high performance cantilevers allow faster scanning, increase the temporal resolution of force measurement, improve measurement sensitivity by reducing cantilever noise, and improve sensitivity by reducing cantilever spring constant.
    Type: Grant
    Filed: March 19, 2002
    Date of Patent: October 28, 2008
    Assignee: The Johns Hopkins University
    Inventor: Jan H. Hoh
  • Patent number: 7442652
    Abstract: A method for removing contamination on a semiconductor substrate is disclosed. The contamination contains at least one element belonging to one of 3A group, 3B group and 4A group of long-period form of periodic system of elements. The method comprises first and second process steps. The first process is wet processing the semiconductor substrate by first remover liquid that contains one of acid and alkali. The second process is wet processing the semiconductor substrate by second remover liquid that contains oxidizing reagent and one of hydrofluoric acid and salt of hydrofluoric acid.
    Type: Grant
    Filed: February 3, 2003
    Date of Patent: October 28, 2008
    Assignee: NEC Electronics Corporation
    Inventors: Hidemitsu Aoki, Kaori Watanabe
  • Patent number: 7442924
    Abstract: A method of sample extraction entails making multiple, overlapping cuts using a beam, such as a focused ion beam, to create a trench around a sample, and then undercutting the sample to free it. Because the sidewalls of the cut are not vertical, the overlapping cuts impinge on the sloping sidewalls formed by previous cuts. The high angle of incidence provides a greatly enhanced mill rate, so that making multiple overlapping cuts to produce a wide trench can requires less time than making a single, deep cut around the perimeter of a sample.
    Type: Grant
    Filed: February 9, 2006
    Date of Patent: October 28, 2008
    Assignee: FEI, Company
    Inventors: Lucille A. Giannuzzi, Paul Anzalone, Richard Young, Daniel W. Phifer, Jr.
  • Patent number: 7443002
    Abstract: A microstructure including in a first layer insulated from a substrate by an insulator layer at least one sensitive element connected to at least one contact pad by an electrical connection and protected by a package cap. The sensitive element, the electrical connection, and the contact pad form an assembly delimited in the first layer by at least one trench, the assembly being covered by the package cap. The package cap includes at least one opening above the contact pad and is integral with the contact pad on the edges of the opening and with a zone located beyond the trench in relation to the assembly. Such a microstructure can find application in particular in microelectromechanical structures.
    Type: Grant
    Filed: December 18, 2003
    Date of Patent: October 28, 2008
    Assignee: Commissariat a l'Energie Atomique
    Inventors: Bernard Diem, Gilles Delapierre
  • Patent number: 7435355
    Abstract: A liquid-based gravity-driven etching-stop technique for controlling structure dimension is provided, where opposite etching trenches in cooperation with an etching-stop solution are used for controlling the dimension of a microstructure on the wafer level. In an embodiment, opposite trenches surrounding the microstructure are respectively etched on sides of the wafer, and the trench depth on the side of the wafer, on which the microstructure is, is equal to the design dimension of the microstructure. Contrarily, it is unnecessary to define the trench depth on the back-side of the chip. In the final step of the fabrication process, when the device is etched, such that the trenches on the sides communicate with each other to separate the microstructure from the whole wafer automatically and thereby shift from the etchant into the etching-stop solution to stop etching.
    Type: Grant
    Filed: October 5, 2005
    Date of Patent: October 14, 2008
    Assignee: Industrial Technology Research Institute
    Inventors: Wei-Chin Lin, Hui-Ling Chang, Ching-Hsiang Tsai, Chao-Chiun Liang, Gen-Wen Hsieh, Yuh-Wen Lee
  • Publication number: 20080245764
    Abstract: A method for producing a device which is suitable for delivering a substance into or through the skin and includes an array of microneedles developed out of an Si semiconductor substrate, the microneedles being affixed on and/or inside a flexible support made from a polymer material. A device producible by this method.
    Type: Application
    Filed: January 18, 2008
    Publication date: October 9, 2008
    Inventors: Tjalf Pirk, Michael Stumber, Joachim Rudhard, Ando Feyh, Christina Leinenbach, Christian Mauerer
  • Patent number: 7431853
    Abstract: A method and system for release etching a micro-electrical-mechanical-systems (MEMS) device from a substrate. In one aspect, the invention is a method comprising (a) supporting at least one substrate having a sacrificial oxide and a non-sacrificial material in a process chamber at a pressure and at a temperature; (b) introducing a gas phase mixture comprising a halide-containing species and an alcohol vapor selected from a group consisting of ethanol, 1-propanol, and an aliphatic alcohol having four carbon groups into the process chamber, the gas phase mixture having a volumetric ratio of the halide-containing species to the alcohol vapor of approximately 2 or less; and (c) etching the sacrificial oxide with the gas phase mixture. In another aspect, the invention is a system for carrying out the method.
    Type: Grant
    Filed: March 8, 2006
    Date of Patent: October 7, 2008
    Assignee: Primaxx, Inc.
    Inventors: Paul D. Mumbauer, Paul Roman, Robert Grant
  • Publication number: 20080241517
    Abstract: Aluminum-plated components of semiconductor material processing apparatuses are disclosed. The components include a substrate and an optional intermediate layer formed on at least one surface of the substrate. The intermediate layer includes at least one surface. An aluminum plating is formed on the substrate, or on the optional intermediate layer. The surface on which the aluminum plating is formed is electrically-conductive. An anodized layer can optionally be formed on the aluminum plating. The aluminum plating or optional the anodized layer comprises a process-exposed surface of the component. Semiconductor material processing apparatuses including one or more aluminum-plated components, methods of processing substrates, and methods of making the aluminum-plated components are also disclosed.
    Type: Application
    Filed: March 29, 2007
    Publication date: October 2, 2008
    Applicant: Lam Research Corporation
    Inventors: Ian J. Kenworthy, Kelly W. Fong, Leonard J. Sharpless
  • Patent number: 7428094
    Abstract: A method of fabricating a spatial light modulator. The method includes forming cavities in a first substrate and fabricating electrodes on a second substrate. The method also includes bonding the first substrate to the second substrate and forming a mirror plate from a portion of the first substrate. The mirror plate has an upper surface and a lower surface. The method further includes forming a hinge coupled to the mirror plate and forming a reflective surface coupled to the upper surface of the mirror plate.
    Type: Grant
    Filed: July 3, 2007
    Date of Patent: September 23, 2008
    Assignee: Miradia Inc.
    Inventors: Shaoher X Pan, Xiao Yang
  • Patent number: 7425276
    Abstract: The present invention provides for a method for the fabrication of microchannels, and more particularly to the fabrication of microchannels for use in Microelectromechanical (MEMS) devices and MEMS related devices. In accordance with an embodiment of the present invention, microchannels are formed by a microfabrication method utilizing electronic imaging techniques in combination with chemical etching and subsequent metallization. The method of the present invention is effective in producing networks of channels in liquid crystal polymer (LCP) polymeric substrates which are highly defined in terms of their patterns, and thus are able to encompass a wide variety of end uses.
    Type: Grant
    Filed: June 30, 2005
    Date of Patent: September 16, 2008
    Assignee: University of South Florida
    Inventors: David P. Fries, George Steimle, Heather Broadbent
  • Patent number: 7422696
    Abstract: Multicomponent nanorods having segments with differing electronic and/or chemical properties are disclosed. The nanorods can be tailored with high precision to create controlled gaps within the nanorods or to produce diodes or resistors, based upon the identities of the components-making up the segments of the nanorods. Macrostructural composites of these nanorods also are disclosed.
    Type: Grant
    Filed: June 30, 2005
    Date of Patent: September 9, 2008
    Assignee: Northwestern University
    Inventors: Chad A. Mirkin, Lidong Qin, Sungho Park, Ling Huang, Sung-Wook Chung
  • Patent number: 7418166
    Abstract: Optical devices having integrated waveguide and active areas are realized using a crystallization approach involving the inhibition of defects typically associated with liquid-phase crystalline growth of lattice mismatched materials. According to one example embodiment, a growth region is formed such that the region is isolated from a silicon portion of silicon material. The region extends from a silicon-based seeding area of the substrate. A semiconductor material is deposited on a Silicon-based seeding area and in the growth region. A single crystalline material is formed from the deposited semiconductor material by heating and cooling the deposited semiconductor material while directing growth of the semiconductor material from the Silicon-based seeding area and through an opening sufficiently narrow to mitigate crystalline defects. A light-communicating device is formed by etching the silicon material over an insulator layer and etching the single crystalline material.
    Type: Grant
    Filed: February 23, 2007
    Date of Patent: August 26, 2008
    Assignee: The Board of Trustees of the Leland Stanford Junior University
    Inventors: Pawan Kapur, Yu-Hsuan Kuo, Michael West Wiemer, David A. B. Miller
  • Publication number: 20080197106
    Abstract: A method for manufacturing semiconical microneedles in an Si-semiconductor substrate and a semiconical microneedles manufacturable made by this method.
    Type: Application
    Filed: January 28, 2008
    Publication date: August 21, 2008
    Inventor: Ando Feyh
  • Patent number: 7410901
    Abstract: A method for fabricating substrate material to include trenches and unreleased beams with submicron dimensions includes etching a first oxide layer on the substrate to define a first set of voids in the first oxide layer to expose the substrate. A second oxide layer is accreted to the first oxide layer to narrow the first set of voids to become a second set of voids on the substrate. A polysilicon layer is deposited over the second oxide layer, the first oxide layer and the substrate. A third set of voids is etched into the polysilicon layer. Further etching widens the third set of voids to define a fourth set of voids to expose the first oxide layer and the substrate. The first oxide layer and the substrate is deeply etched to define beams and trenches in the substrate.
    Type: Grant
    Filed: April 27, 2006
    Date of Patent: August 12, 2008
    Assignee: Honeywell International, Inc.
    Inventor: Jorg Pilchowski
  • Patent number: 7410590
    Abstract: A method for mounting the micro spring structures onto cables or contact structures includes forming a spring island having an “upside-down” stress bias on a first release material layer or directly on a substrate, forming a second release material over at least a portion of the spring island, and then forming a base structure over the second release material layer. The micro spring structure is then transferred in an unreleased state, inverted such that the base structure contacts a surface of a selected apparatus, and then secured (e.g., using solder reflow techniques) such that the micro spring structure becomes attached to the apparatus. The spring structure is then released by etching or otherwise removing the release material layer(s).
    Type: Grant
    Filed: December 19, 2003
    Date of Patent: August 12, 2008
    Assignee: Palo Alto Research Center Incorporated
    Inventors: Koenraad F. Van Schuylenbergh, Thomas Hantschel
  • Publication number: 20080185286
    Abstract: The invention describes a sample carrier (3) for thinning a sample (1) taken from e.g. a semiconductor wafer. The sample carrier comprises a ridged part (5), e.g. made of e.g. copper, with an outer boundary (6), and a supporting film (4), e.g. made of carbon, extending beyond the outer boundary. By placing the sample on the supporting film, the sample can be attached to the rigid structure using e.g. IBID. The supporting film aligns the samples when they are placed onto it. After attaching the sample to the rigid structure the sample can be thinned with e.g. an ion beam, during which thinning the supporting film is locally removed as well. The invention results in better alignment of the sample to the sample carrier, and also in more freedom how the sample is transported from the wafer to the sample carrier, e.g. with the help of an electrically charged glass needle (2). The latter eliminates the attaching/severing steps that are normally associated with the transport of a sample to a sample carrier.
    Type: Application
    Filed: February 5, 2008
    Publication date: August 7, 2008
    Applicant: FEI COMPANY
    Inventor: RALF LEHMANN
  • Publication number: 20080182424
    Abstract: A method for selectively controlling lengths of nanowires in a substantially non-uniform array of nanowires includes establishing at least two different catalyzing nanoparticles on a substrate. A nanowire from each of the at least two different catalyzing nanoparticles is substantially simultaneously grown. At least one of the nanowires has a length different from that of at least another of the nanowires.
    Type: Application
    Filed: December 9, 2005
    Publication date: July 31, 2008
    Inventors: Philip J. Kuekes, Theodore I. Kamins
  • Publication number: 20080179613
    Abstract: The present invention deals with a process for the manufacturing of reflecting optical barriers comprising silicon and useful in combination with light emitting devices, wherein the process comprises anisotropic wet etching of the silicon material in such a manner that the rate of etching along the crystallographic (111) plane of the silicon material is slower than the rate of etching along the (110) and (100) planes. The present invention further comprises a reflecting optical barrier useful in combination with light emitting devices and a system containing at least one light emitting device comprising a reflecting optical barrier.
    Type: Application
    Filed: May 31, 2006
    Publication date: July 31, 2008
    Applicant: KONINKLIJKE PHILIPS ELECTRONICS, N.V.
    Inventors: Matthias Wendt, Gilles Ferru
  • Patent number: 7399652
    Abstract: A method for manufacturing a micro-electro-mechanical device, which has supporting parts and operative parts, includes providing a first semiconductor wafer, having a first layer of semiconductor material and a second layer of semiconductor material arranged on top of the first layer, forming first supporting parts and first operative parts of the device in the second layer, forming temporary anchors in the first layer, and bonding the first wafer to a second wafer, with the second layer facing the second wafer. After bonding the first wafer and the second wafer together, second supporting parts and second operative parts of said device are formed in the first layer. The temporary anchors are removed from the first layer to free the operative parts formed therein.
    Type: Grant
    Filed: April 8, 2004
    Date of Patent: July 15, 2008
    Assignee: STMicroelectronics S.R.L.
    Inventors: Simone Sassolini, Mauro Marchi, Marco Del Sarto, Lorenzo Baldo
  • Patent number: 7399422
    Abstract: A system and method form a nanodisk that can be used to form isolated data bits on a memory disk. The imprint stamp is formed from first and second overlapping patterns, where the patterns are selectively etched. The selective etching leaves either pits or posts on the imprint stamp. The pits or posts are imprinted on the memory disk, leaving either pits or posts on the memory disk. The pits or posts on the memory disk are processed to form relatively small and dense isolated data bits. Instability of the isolated data bits caused by outside magnetic and thermal influences is substantially eliminated.
    Type: Grant
    Filed: November 29, 2005
    Date of Patent: July 15, 2008
    Assignee: ASML Holding N.V.
    Inventor: Harry Sewell
  • Patent number: 7396477
    Abstract: An exemplary method for manufacturing a thermal interface material includes the steps of: providing a first substrate having a first surface and an opposite second substrate having an opposite second surface spaced apart a predetermined distance; forming a number of carbon nanotubes from one of the first the second surfaces; forming a composite material by filling interstices between the carbon nanotubes with a liquid state base material; curing the liquid state base material filled in the interstices between the carbon nanotubes; and removing the first and the second substrates from the composite material.
    Type: Grant
    Filed: May 12, 2006
    Date of Patent: July 8, 2008
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventor: Bor-Yuan Hsiao
  • Patent number: 7396476
    Abstract: Methods of fabricating comb drive devices utilizing one or more sacrificial etch-buffers are disclosed. An illustrative fabrication method may include the steps of etching a pattern onto a wafer substrate defining one or more comb drive elements and sacrificial etch-buffers, liberating and removing one or more sacrificial etch-buffers prior to wafer bonding, bonding the etched wafer substrate to an underlying support substrate, and etching away the wafer substrate. In some embodiments, the sacrificial etch-buffers are removed after bonding the wafer to the support substrate. The sacrificial etch-buffers can be provided at one or more selective regions to provide greater uniformity in etch rate during etching. A comb drive device in accordance with an illustrative embodiment can include a number of interdigitated comb fingers each having a more uniform profile along their length and/or at their ends, producing less harmonic distortion during operation.
    Type: Grant
    Filed: January 17, 2006
    Date of Patent: July 8, 2008
    Assignee: Honeywell International Inc.
    Inventors: Jeffrey A. Ridley, James A. Neus
  • Patent number: 7396475
    Abstract: The present invention provides a method for forming a stepped structure on a substrate that features transferring, into the substrate, an inverse shape of the stepped structure disposed on the substrate.
    Type: Grant
    Filed: April 25, 2003
    Date of Patent: July 8, 2008
    Assignee: Molecular Imprints, Inc.
    Inventor: Sidlgata V. Sreenivasan
  • Patent number: 7396478
    Abstract: A Multiple Internal Seal Ring (MISR) Micro-Electro-Mechanical System (MEMS) vacuum packaging method that hermetically seals MEMS devices using MISR. The method bonds a capping plate having metal seal rings to a base plate having metal seal rings by wafer bonding the capping plate wafer to the base plate wafer. Bulk electrodes may be used to provide conductive paths between the seal rings on the base plate and the capping plate. All seals are made using only metal-to-metal seal rings deposited on the polished surfaces of the base plate and capping plate wafers. However, multiple electrical feed-through metal traces are provided by fabricating via holes through the capping plate for electrical connection from the outside of the package through the via-holes to the inside of the package. Each metal seal ring serves the dual purposes of hermetic sealing and providing the electrical feed-through metal trace.
    Type: Grant
    Filed: September 5, 2007
    Date of Patent: July 8, 2008
    Assignees: California Institute of Technology, The Boeing Company
    Inventors: Ken J. Hayworth, Karl Y. Yee, Kirill V. Shcheglov, Youngsam Bae, Dean V. Wiberg, A. Dorian Challoner, Chris S. Peay
  • Patent number: 7387737
    Abstract: A method for fabricating an electrically isolated MEMS device having an outer stationary MEMS element and an inner movable MEMS element is provided that does not use a sacrificial layer. Rather, a pair of spacers are defined on the outer portions of the upper surface of a conductive wafer, and an insulating material is deposited thereon. The spacers are attached to a substrate to define an internal void therein. The wafer is then patterned to form the outer MEMS element as well as a conductive member for the inner MEMS element, separated from the outer MEMS element by a gap. A portion of the insulating layer that is disposed in the gap is then removed, thereby releasing the inner MEMS element from the stationary MEMS element.
    Type: Grant
    Filed: December 9, 2005
    Date of Patent: June 17, 2008
    Assignee: Rockwell Automation Technologies, Inc.
    Inventors: Richard D. Harris, Robert J. Kretschmann, Michael J. Knieser, Mark A. Lucak
  • Patent number: 7387742
    Abstract: Ophthalmic surgical blades are manufactured from either a crystalline or polycrystalline material, preferably in the form of a wafer. The method comprises preparing the crystalline or polycrystalline wafers by mounting them and machining trenches into the wafers. Methods for machining the trenches, which form the bevel blade surfaces, include a diamond blade saw, laser system, ultrasonic machine, a hot forge press and a router. The wafers are then placed in an etchant solution which isotropically etches the wafers in a uniform manner, such that layers of crystalline or polycrystalline material are removed uniformly, producing single, double or multiple bevel blades. Nearly any bevel angle can be machined into the wafer which remains after etching. The resulting radii of the blade edges is 5-500 nm, which is the same caliber as a diamond edged blade, but manufactured at a fraction of the cost.
    Type: Grant
    Filed: September 17, 2004
    Date of Patent: June 17, 2008
    Assignee: Becton, Dickinson and Company
    Inventors: Vadim M. Daskal, Joseph F. Keenan, James Joseph Hughes, Attila E. Kiss, Susan M. Chavez
  • Publication number: 20080131325
    Abstract: A dispensing device has a cantilever comprising a plurality of thin films arranged relative to one another to define a microchannel in the cantilever and to define at least portions of a dispensing microtip proximate an end of the cantilever and communicated to the microchannel to receive material therefrom. The microchannel is communicated to a reservoir that supplies material to the microchannel. One or more reservoir-fed cantilevers may be formed on a semiconductor chip substrate. A sealing layer preferably is disposed on one of the first and second thin films and overlies outermost edges of the first and second thin films to seal the outermost edges against material leakage. Each cantilever includes an actuator, such as for example a piezoelectric actuator, to impart bending motion thereto. The microtip includes a pointed pyramidal or conical shaped microtip body and an annular shell spaced about the pointed microtip body to define a material-dispensing annulus thereabout.
    Type: Application
    Filed: June 19, 2007
    Publication date: June 5, 2008
    Inventors: Horacio D. Espinosa, Nicolaie A. Moldovan, Keun-Ho Kim
  • Patent number: 7381344
    Abstract: The invention teaches a multi-step method for shutting down the dry-etch process. The ICP rf power is reduced between each of these consecutive power-down steps of the dry-etch process, the complete power-down sequence consists of six steps. These six steps are executed in sequence and without interruption and form the totality of the dry-etch chamber power-down procedure.
    Type: Grant
    Filed: May 12, 1999
    Date of Patent: June 3, 2008
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Sheng-Chi Chin, Shy-Jay Lin
  • Patent number: 7380320
    Abstract: A piezoelectric device includes a substrate, a buffer layer on the substrate, a lower electrode layer on the buffer layer, a piezoelectric layer on the lower electrode layer, and an upper electrode layer on the piezoelectric layer. The piezoelectric layer has a base portion extending outwardly at its lower portion of its periphery. The piezoelectric device provides enhanced bonding strength between the substrate and the stacked structure including the upper electrode layer, the lower electrode layer, and the piezoelectric layer.
    Type: Grant
    Filed: December 4, 2006
    Date of Patent: June 3, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Masaya Nakatani
  • Patent number: 7378346
    Abstract: A method is provided for forming a monolithically integrated optical filter, for example, a Fabry-Perot filter, over a substrate (10). The method comprises forming a first mirror (16) over the substrate (10). A plurality of etalon material layers (32, 34, 36, 38) are formed over the mirror (16), and a plurality of etch stop layers (42, 44, 46) are formed, one each between adjacent etalon material layers (32, 34, 36, 38). A photoresist is patterned to create an opening (54) over the top etalon material layer (38) and an etch (56) is performed down to the top etch stop layer (46). An oxygen plasma (58) may be applied to convert the etch stop layer (46) within the opening (54) to silicon dioxide (57). The photoresist patterning, etching, and applying of an oxygen plasma may be repeated as desired to obtain the desired number of levels (82, 84, 86, 88). A second mirror (72) is then formed on each of the levels (82, 84, 86, 88).
    Type: Grant
    Filed: March 22, 2006
    Date of Patent: May 27, 2008
    Assignee: Motorola, Inc.
    Inventors: Ngoc V. Le, Jeffrey H. Baker, Diana J. Convey, Paige M. Holm, Steven M. Smith
  • Patent number: 7375874
    Abstract: Described are MEMS mirror arrays monolithically integrated with CMOS control electronics. The MEMS arrays include polysilicon or polysilicon-germanium components that are mechanically superior to metals used in other MEMS applications, but that require process temperatures not compatible with conventional CMOS technologies. CMOS circuits used with the polysilicon or polysilicon-germanium MEMS structures use interconnect materials that can withstand the high temperatures used during MEMS fabrication. These interconnect materials include doped polysilicon, polycides, and tungsten metal.
    Type: Grant
    Filed: June 21, 2006
    Date of Patent: May 20, 2008
    Assignee: Active Optical MEMS Inc.
    Inventors: Vlad Novotny, Bharat Sastri, Chitranjan N. Reddy
  • Publication number: 20080102380
    Abstract: A method is provided for patterning monolithically integrated features having a 1:1 ratio. The method comprises forming a first etch barrier layer (18) over a base layer (14) and applying (52) a template (20) to pattern (52) first printed features (26) in the first etch barrier layer (18). The first etch barrier layer (18) is etched (54) to form second printed features (32) in the base layer (14). A second etch barrier layer (34) is formed over the base layer (14) and the template (20) is applied to pattern (58) third printed features (38) in the second etch barrier layer (34). The second etch barrier layer (34) is etched (60) to form fourth printed features (42) in the base layer (14).
    Type: Application
    Filed: October 30, 2006
    Publication date: May 1, 2008
    Inventor: Pawitter S. Mangat
  • Publication number: 20080099425
    Abstract: The invention relates to a method for producing a slotted guide, in which: a) a layer of a material having a refractive index less than that of silicon, for example Material having a refractive index less than that of silicon (26), is formed on an etching barrier layer (22), b) two parallel trenches are etched into said material having a refractive index less than that of silicon, with the etching barrier on said etching barrier layer, these two trenches being separated by a wall of said material having a refractive index less than that of silicon (36), c) the trenches thus made are filled with silicon (42, 44).
    Type: Application
    Filed: October 31, 2007
    Publication date: May 1, 2008
    Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE
    Inventors: Emmanuel Jordana, Jean-Marc Fedeli, Loubna El Melhaoui
  • Patent number: 7365012
    Abstract: An etching method of subjecting a base material to an etching process using an etching agent containing hydrogen fluoride and ozone is disclosed. The base material has a first region constituted from silicon as a main material and a second region constituted from SiO2 as a main material. The etching method includes the steps of: preparing the base material; and supplying the etching agent onto the base material to form a step between the first and second regions using a feature that an etching rate of silicon by the etching agent is higher than an etching rate of SiO2 by the etching agent, so that the height of the surface of the first region is lower than the height of the surface of the second region.
    Type: Grant
    Filed: August 10, 2005
    Date of Patent: April 29, 2008
    Assignee: Seiko Epson Corporation
    Inventors: Hiroyuki Matsuo, Toshiki Nakajima, Kunihiro Miyazaki
  • Patent number: 7365405
    Abstract: A method of indicating the progress of a sacrificial material removal process, the method, comprising; freeing a portion of a member, the member being disposed in a cage and laterally surrounded by the sacrificial material; and preventing the freed portion of the member from floating away by retaining the freed member.
    Type: Grant
    Filed: April 27, 2004
    Date of Patent: April 29, 2008
    Inventors: Stephen J. Potochnik, Kenneth Faase
  • Patent number: 7361524
    Abstract: A method of manufacturing a floating structure capable of providing increased device yield. The method includes: a) forming an insulation film, a predetermined area of which is removed, between a first substrate and a second substrate; and b) forming a floating structure in the removed predetermined area.
    Type: Grant
    Filed: January 30, 2006
    Date of Patent: April 22, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Seok-jin Kang
  • Patent number: 7361278
    Abstract: A process for producing a mass transfer device is provided which enables packing of a packing material uniformly in a flow channel, and transfers a specified substance by flowing a fluid containing the specified substance through a flow channel on a substrate. A mass transfer device produced by the process is also provided. The process for producing a mass transfer device comprises steps of preparing a substrate, forming a flow channel on the surface of the substrate, applying a liquid drop composed of a packing material and a liquid medium, and packing the packing material in the flow channel by removing the liquid medium.
    Type: Grant
    Filed: January 7, 2005
    Date of Patent: April 22, 2008
    Assignee: Canon Kabushiki Kaisha
    Inventors: Takeo Yamazaki, Naoto Mihashi, Takeshi Imamura, Satoko Omizu
  • Patent number: 7357873
    Abstract: The invention presents a novel polyimide-based thin film self-assembly technology, including five process steps described as follows: (1) deposits a sacrificial layer and a low-stress microstructure layer on a silicon substrate; (2) patterns and etches the low-stress microstructure layer to provide a stationary part and a movable part of the microstructure; (3) coats a photosensitive polyimide thin film as elastic joint of the microstructure layer and defines the shape by using photolithography technique; (4) releases the sacrificial layer beneath the movable part of microstructure layer by wet etching; (5) lastly proceeds the reflow process of polyimide to result in the contraction of the elastic joint further to rotate and lift the movable part in completion of the self-assembly of the microstructure. As the invention can be extensively applied to a myriad of miniaturizing industries, it can solve all the drawbacks of the prior art manufacturing process and miniaturization.
    Type: Grant
    Filed: October 13, 2005
    Date of Patent: April 15, 2008
    Assignee: Sunonwealth Electric Machine Industry Co., Ltd.
    Inventors: Alex Hong, I Yu Huang, Chih Hung Wang
  • Patent number: 7357874
    Abstract: The invention relates to a method of fabrication of staggered vertical comb drive actuators with relaxed lateral alignment tolerances. A device layer of a wafer is first etched from a front side using a self-aligned two-layer mask to define interdigited fingers of both moving and stationary combs. A second etch step is used for vertically thinning one of the two sets of fingers by selectively removing their top portions. The front side of the wafer is then bonded to a carrier wafer. The wafer is then selectively etched from the back side of the device layer so as to remove lower portions of the second set of fingers, thereby forming interdigited moving and stationary combs having vertically offset fingers.
    Type: Grant
    Filed: April 11, 2007
    Date of Patent: April 15, 2008
    Assignee: JDS Uniphase Corporation
    Inventors: Steven H. Moffat, John M. Miller
  • Patent number: 7354522
    Abstract: A method of etching a substrate and an article(s) formed using the method are provided. The method includes providing a substrate; coating a region of the substrate with a temporary material having properties that enable the temporary material to remain substantially intact during subsequent processing and enable the temporary material to be removed by a subsequent process that allows the substrate to remain substantially unaltered; removing a portion of the substrate to form a feature, at least some of the removed portion of the substrate overlapping at least a portion of the coated region of the substrate while allowing the temporary material substantially intact; and removing the temporary material while allowing the substrate to remain substantially unaltered.
    Type: Grant
    Filed: August 4, 2004
    Date of Patent: April 8, 2008
    Assignee: Eastman Kodak Company
    Inventors: Gary A. Kneezel, John A. Lebens, Christopher N. Delametter, David P. Trauernicht, James M. Chwalek
  • Patent number: 7345289
    Abstract: A sample support of the present invention is prepared such that a silicon substrate is used as a raw material, the thickness structure having a shape and a thickness of 10 ?m or less is prepared using a semiconductor silicon process technique. The sample support of the present invention is adhered to a partially-cut mesh in a state that a sample portion is not adhered. Further, a plurality of portions where the samples are mounted is arranged on the same substrate.
    Type: Grant
    Filed: February 17, 2006
    Date of Patent: March 18, 2008
    Assignee: SII NanoTechnology Inc.
    Inventors: Kouji Iwasaki, Masanso Munekane
  • Patent number: 7329361
    Abstract: A method and apparatus for fabricating or altering a microstructure use means for heating to facilitate a local chemical reaction that forms or alters the submicrostructure.
    Type: Grant
    Filed: October 29, 2003
    Date of Patent: February 12, 2008
    Assignee: International Business Machines Corporation
    Inventors: Supratik Guha, Hendrik F. Hamann, Herschel M. Marchman, Robert J. Von Gutfeld
  • Patent number: 7323111
    Abstract: A method of making a mold includes forming spaced mold cavities in a mold body. The mold cavities include geometrically similar portions, but have respective depths below an initial reference surface that vary as a function of position along a particular direction. The mold cavities can be formed using anisotropic etching of preferred crystal directions in single crystal materials such as silicon. A portion of the mold material adjacent the initial reference surface is removed to expose a new reference surface at a tilt angle with respect to the initial reference surface. The modified mold cavities have their respective axes at a new desired tilt angle relative to the new reference surface.
    Type: Grant
    Filed: January 31, 2005
    Date of Patent: January 29, 2008
    Assignee: Metadigm LLC
    Inventor: Victor B. Kley
  • Patent number: 7318903
    Abstract: The invention is related to optical particles (10), use of optical particles in sensing applications, and methods of fabricating optical particles that can target a desired analyte. The invention is also related to the self assembly of individual optical particles. An advantage of the invention is that it includes self-assembling individual photonic crystal sensors onto a target. In an embodiment of the invention, a processed sensor structure having two generally opposing surfaces is provided, wherein each of the opposing surfaces have different surface affinities, with a first optical structure formed on one of the opposing surfaces, and a second optical structure formed on the other of the opposing surfaces. The chemically and optically asymmetric opposing surfaces will spontaneously align at an organic liquid/water interface. Changes in the optical response of at least one of the opposing surfaces indicate the presence of a particular analyte for sensing applications.
    Type: Grant
    Filed: August 13, 2004
    Date of Patent: January 15, 2008
    Assignee: The Regents of the University of California
    Inventors: Jamie R. Link, Michael J. Sailor
  • Publication number: 20080000872
    Abstract: In a method for forming micro lenses, a lens material layer made of an inorganic material is formed on a substrate, and an intermediate layer made of an organic material is formed on the lens material layer. Then, a mask layer made of an organic material is formed on the intermediate layer, and lens shapes are formed in the mask layer. The lens shapes of the mask layer are transcribed to the intermediate layer by etching the mask layer and the intermediate layer. Thereafter, the lens shapes of the intermediate layer are transcribed to the lens material layer to form micro lenses by etching the intermediate layer and the lens material layer using a processing gas containing SF6 gas and CHF3 gas.
    Type: Application
    Filed: June 12, 2007
    Publication date: January 3, 2008
    Applicant: TOKYO ELECTRON LIMITED
    Inventor: Hiroki Amemiya
  • Patent number: 7311503
    Abstract: The fluid-flow device (100) of the invention comprises a stack (30) covered by a closure wafer (20), said stack (30) comprising a support wafer (36), a layer of insulating material (34), and a silicon layer (32). The closure wafer (20) and/or said silicon layer (32) are machined so as to define a cavity (38) between said closure wafer (20) and said silicon layer (32), said support wafer (36) has at least one duct (102) passing right through it, said layer of insulating material (34) presenting at least one zone (35) that is entirely free of material placed at least in line with said duct (102) so as to co-operate with said cavity (38) to define a moving member (40) in said silicon layer (32), the moving member being suitable under the pressure of liquid in said cavity (38) for reversibly moving towards said support wafer (36) until contact is made between said moving member (40) and said support wafer (36).
    Type: Grant
    Filed: September 26, 2005
    Date of Patent: December 25, 2007
    Assignee: Debiotech S.A.
    Inventors: Harald T. Van Lintel, Didier Maillefer, Stephan Gamper