Abstract: A plasma processing apparatus includes a first and a second electrode disposed to face each other in a processing chamber, the second electrode supporting a substrate; a first RF power supply for applying a first RF power of a higher frequency to the second electrode; a second RF power supply for applying a second RF power of a lower frequency to the second electrode; and a DC power source for applying a DC voltage to the first electrode. In a plasma etching method for etching a substrate by using the plasma processing apparatus, the first and the second radio frequency power are applied to the second electrode to convert a processing gas containing no CF-based gas into a plasma and a DC voltage is applied to the first electrode, to thereby etch an organic film or an amorphous carbon film on the substrate by using a silicon-containing mask.

Abstract: Provided are an optical waveguide and a production method thereof which can constrict both the width and thickness of the SOI optical waveguide core layer in the same process and at the same time, simplify production process, and reduce optical losses. An optical waveguide includes a first clad layer formed on a semiconductor substrate; a first core layer formed on the upper side of the first clad layer with the use of a semiconductor material the refractive index of which is higher than that of the first clad layer; and a second clad layer formed on the upper side of the first core layer with the use of a material the refractive index of which is lower than that of the first core layer. The width of the first core layer is defined based on the width of an unoxidized semiconductor material sandwiched between oxide films the parts of which are thermally oxidized.

Abstract: A self-aligned fabrication process for three-dimensional non-volatile memory is disclosed. A double etch process forms conductors at a given level in self-alignment with memory pillars both underlying and overlying the conductors. Forming the conductors in this manner can include etching a first conductor layer using a first repeating pattern in a given direction to form a first portion of the conductors. Etching with the first pattern also defines two opposing sidewalls of an underlying pillar structure, thereby self-aligning the conductors with the pillars. After etching, a second conductor layer is deposited followed by a semiconductor layer stack. Etching with a second pattern that repeats in the same direction as the first pattern is performed, thereby forming a second portion of the conductors that is self-aligned with overlying layer stack lines. These layer stack lines are then etched orthogonally to define a second set of pillars overlying the conductors.

Abstract: A method for controlling ADI-AEI CD difference ratios of openings having different sizes is provided. First, a first etching step using a patterned photoresist layer as a mask is performed to form a patterned Si-containing material layer and a polymer layer on sidewalls thereof. Next, a second etching step is performed with the patterned photoresist layer, the patterned Si-containing material layer and the polymer layer as masks to at least remove an exposed portion of a etching resistive layer to form a patterned etching resistive layer. A portion of a target material layer is removed by using the patterned etching resistive layer as an etching mask to form a first and a second openings in the target material layer. The method is characterized by controlling etching parameters of the first and second etching steps to obtain predetermined ADI-AEI CD difference ratios.

Abstract: Methods of forming metal oxide structures and methods of forming metal oxide patterns on a substrate using a block copolymer system formulated for self-assembly. The metal oxide structures and patterns may be used, for example, as a mask for sublithographic patterning during various stages of semiconductor device fabrication. A block copolymer at least within a trench in the substrate and including at least one soluble block and at least one insoluble block may be annealed to form a self-assembled pattern including a plurality of repeating units of the at least one soluble block laterally aligned with the trench and positioned within a matrix of the at least one insoluble block. The self-assembled pattern may be exposed to a metal oxide precursor that impregnates the at least one soluble block. The metal oxide precursor may be oxidized to form a metal oxide. The self-assembled pattern may be removed to form a pattern of metal oxide lines on the substrate surface.

Abstract: A microfluidic device for nucleic acid analysis includes a monolithic semiconductor body (13), a microfluidic circuit (10), at least partially accommodated in the monolithic semiconductor body (13), and a micropump (11). The microfluidic circuit (10) includes a sample preparation channel (18) formed on the monolithic semiconductor body (13) and at least one microfluidic channel (20, 22) buried in the monolithic semiconductor body (13). The micropump (11), includes a plurality of sealed chambers (40) provided with respective openable sealing elements (41) and having a first pressure therein that is different from a second pressure in the microfluidic circuit (10). In addition, the micropump (11) and the microfluidic circuit (10) are configured so that opening the openable sealing elements (41) provides fluidic coupling between the respective chambers (40) and the microfluidic circuit (10). The openable sealing elements (41) are integrated in the monolithic semiconductor body (13).

Abstract: The present invention relates to a method for adjusting the resonant frequencies of a vibrating microelectromechanical (MEMS) device. In one embodiment, the present invention is a method for adjusting the resonant frequencies of a vibrating mass including the steps of patterning a surface of a device layer of the vibrating mass with a mask, etching the vibrating mass to define a structure of the vibrating mass, determining a first set of resonant frequencies of the vibrating mass, determining a mass removal amount of the vibrating mass and a mass removal location of the vibrating mass to obtain a second set of resonant frequencies of the vibrating mass, removing the mask at the mass removal location, and etching the vibrating mass to remove the mass removal amount of the vibrating mass at the mass removal location of the vibrating mass.

Abstract: Methods of preparing graphene nano ribbons may include forming a graphene sheet on at least one surface of a substrate, forming a plasma mask having a nano pattern on the graphene sheet, and forming a nano pattern on the graphene sheet by plasma treating a stack structure on which the plasma mask is formed.

Abstract: A method for manufacturing a magnetic recording medium (30) having magnetically separate magnetic recording patterns on at least one surface of a nonmagnetic substrate (1), includes the steps of forming a magnetic layer (2) on the nonmagnetic substrate, forming a mask layer (3) on the magnetic layer, forming a resist layer (4) on the mask layer, transferring negative patterns of the magnetic recording patterns to the resist layer using a stamp (5), removing portions of the mask layer which correspond to the negative patterns of the magnetic recording patterns, implanting ions in the magnetic layer from a resist layer-side surface to partly demagnetize the magnetic layer, and removing the resist layer and the mask layer.

Abstract: The method of manufacturing a nozzle plate which includes a nozzle having a tapered section and a linear section includes the steps of: forming an etching stopper layer for stopping dry etching of a silicon substrate, on a first surface of the silicon substrate; forming a mask layer on a second surface of the silicon substrate reverse to the first surface; performing a first patterning process with respect to the mask layer so that an opening section is formed in the mask layer; carrying out the dry etching of the silicon substrate through the opening section in the mask layer so that the tapered section of the nozzle is formed in the silicon substrate; carrying out dry etching of the etching stopper layer through the opening section in the mask layer so that at least a part of the linear section of the nozzle is formed in the etching stopper layer; and removing the mask layer.

Abstract: A patterned sapphire substrate manufacturing method uses two-section dip etching procedure to improve the lateral etching rate at each etching position, so as to produce a concave-convex pattern composed of a plurality of triangular pyramid structures protruded from a surface onto an upper surface of a sapphire substrate, such that less planar area of the sapphire substrate surface will remain, and a mixed solution of sulfuric acid and phosphoric acid is used in a first dip etching step, and pure phosphoric acid or a mixed solution of sulfuric acid and phosphoric acid is used in a second dip etching step for etching the sapphire substrate to control the inclination of each triangular pyramid structure precisely, and providing a better light extraction rate for later manufactured light emitting diodes.

Abstract: A method for processing a sample using an electrically neutral reactive cluster is provided. The surface of a sample is processed by jetting out a mixed gas that is composed of a reactive gas and a gas with a boiling point lower than that of the reactive gas from a gas jetting part of a vacuum process room in which the sample is placed by a pressure in a range in which the mixed gas is not liquefied, in a predetermined direction, while adiabatically-expanding the mixed gas, thereby generating a reactive cluster and jetting the reactive cluster against the sample in the vacuum process room.

Abstract: By incorporating a material exhibiting a high adhesion on chamber walls of a process chamber during sputter etching, the defect rate in a patterning sequence on the basis of an ARC layer may be significantly reduced, since the adhesion material may be reliably exposed during a sputter preclean process. The corresponding adhesion layer may be positioned within the ARC layer stack so as to be reliably consumed, at least partially, while nevertheless providing the required optical characteristics. Hence, a low defect rate in combination with a high process efficiency may be achieved.

Abstract: There is provided a method for pattern formation, including a step of coating a composition comprising a block copolymer, a silicon compound, and a solvent for dissolving these components onto an object to form a layer of the composition on the object, a step of subjecting the layer of the composition to self-organization of the block copolymer to cause phase separation into a first phase, in which the silicon compound is localized, having higher etching resistance by heat treatment or/and oxygen plasma treatment, and a second phase comprising a polymer phase and having lower etching resistance by heat treatment or/and oxygen plasma treatment, and thereby forming a pattern layer with a fine pattern, and a step of etching the object using as a mask the thus formed pattern layer.

Abstract: A semiconductor device includes at least two adjacent memory cell blocks, each of the memory cell blocks having a plurality of memory cell units, each of memory cell units having a plurality of electrically reprogrammable and erasable memory cells connected in series, a plurality of cell gates for selecting the plurality of memory cells within the two adjacent memory cell blocks, each of the plurality of cell gates being formed with roughly rectangular closed loops or roughly U shaped open loops, each of the loops being connected to a corresponding cell of the memory cells in a corresponding memory cell unit of the plurality of memory cell units within one of the two adjacent memory cell blocks and being connected to a corresponding memory cell of the memory cells in a corresponding memory cell unit of the plurality of memory cell units within the other memory cell block of the two adjacent memory cell blocks and a plurality of pairs of first and second selection gates for selecting the memory cell block, the

Abstract: An inorganic membrane device is provided. The device comprises a substrate having a network of pores, and a membrane layer at least partially coupled to the substrate and having a plurality of pores, wherein the pores have an aspect ratio in a range from about 1:2 to about 1:100.

Abstract: The present invention illustrates a bulk silicon etching technique that yields straight sidewalls, through wafer structures in very short times using standard silicon wet etching techniques. The method of the present invention employs selective porous silicon formation and dissolution to create high aspect ratio structures with straight sidewalls for through wafer MEMS processing.

Abstract: A method of correcting for pattern run out in a desired pattern in directional deposition or etching comprising the steps of providing a test substrate; providing a stencil of known thickness on the test substrate; providing a stencil pattern extending through the stencil to the test substrate.

Abstract: Provided are a near field exposure mask which can suppress heat generation of a mask during exposure and can also suppress variation in size of a resist pattern for each shot, and a resist pattern forming method using the same.

Abstract: A method for manufacturing a micro/nano three-dimensional structure including the following steps is described. A mold is provided, and a pattern structure including a plurality of convex portions and concave portions is set in the mold. A transfer material layer including a first portion on the convex portions and a second portion on the concave portions is formed. A flexible substrate is disposed on the mold and contacts with the first portion of the transfer material layer. A heating step is performed to partially heat the flexible substrate through the first portion. A pressure is applied on the flexible substrate to adhere or press the first portion to the flexible substrate. The mold is removed. An etching step is performed on the flexible substrate by using the first portion of the transfer material layer as a mask to form a micro/nano three-dimensional structure in the flexible substrate.

Abstract: An optical element manufacturing method includes: disposing a light-shielding layer (14) that includes at least an Si layer as an uppermost layer, on a substrate (12) used as a base member, forming an optical aperture (14a) at the light-shielding layer (14) and forming a fine recession/projection structure (MR) at a surface of the uppermost layer through dry etching.

Abstract: A method for etching silicon carbide, a mask being produced on a silicon carbide layer, the unmasked areas of the silicon carbide layer being etched using a fluorine-containing compound, which is selected from the group including interhalogen compounds of fluorine and/or xenon difluoride. The use of chlorine trifluoride, chlorine pentafluoride, and/or xenon difluoride for structuring silicon carbide layers covered with masks containing silicon dioxide and/or silicon oxide carbide; a structured silicon carbide layer obtained by the method, and a microstructured electromechanical component or a microelectronic component including a structured silicon carbide layer obtained by the method.

Abstract: Provided are an optical waveguide and a production method thereof which can constrict both the width and thickness of the SOI optical waveguide core layer in the same process and at the same time, simplify production process, and reduce optical losses. An optical waveguide includes a first clad layer formed on a semiconductor substrate; a first core layer formed on the upper side of the first clad layer with the use of a semiconductor material the refractive index of which is higher than that of the first clad layer; and a second clad layer formed on the upper side of the first core layer with the use of a material the refractive index of which is lower than that of the first core layer. The width of the first core layer is defined based on the width of an unoxidized semiconductor material sandwiched between oxide films the parts of which are thermally oxidized.

Abstract: A method of fabricating a stacked structure for forming a damascene process is described. A doped dielectric layer is formed on a substrate. A surface treatment is performed to the dielectric layer to make the dopant concentration in an upper surface layer of the dielectric layer lower than that in the other portions of the dielectric layer. A metal hard mask is then formed on the dielectric layer. Since the dopant conc. in the upper surface layer of the dielectric layer is lowered, the reaction between the metal hard mask and the dopant in the dielectric layer can be inhibited.

Abstract: The present invention relates to a process for forming an reverse tone image on a device comprising; a) forming an absorbing underlayer on a substrate; b) forming a coating of a positive photoresist over the underlayer; c) forming a photoresist pattern; d) treating the first photoresist pattern with a hardening compound, thereby forming a hardened photoresist pattern; e) forming a silicon coating over the hardened photoresist pattern from a silicon coating composition; f) dry etching the silicon coating to remove the silicon coating till the silicon coating has about the same thickness as the photoresist pattern; and, g) dry etching to remove the photoresist and the underlayer, thereby forming a trench beneath the original position of the photoresist pattern. The invention further relates to a product of the above process and to a microelectronic device made from using the above process.

Abstract: A patterning method is provided. First, a substrate having an objective material layer thereon is provided. Thereafter, a mask layer is formed on the objective material layer. Afterwards, a patterned layer is formed over the mask layer, wherein a material of the patterned layer includes a metal-containing substance. Then, the mask layer is patterned to form a patterned mask layer. Further, the objective material layer is patterned, using the patterned mask layer as a mask.

Abstract: An oxide material (102) is used as masking for patterning by etching which is performed with respect to a substrate or a material laminated on the substrate (101). The oxide material is also used in a multi-step etching which is performed by using a resist (103) formed on the oxide material as a mask. The etching rate of the oxide material for a reaction gas containing an inert gas or hydrogen is higher than the etching rate of the resist for the reaction gas containing an inert gas or hydrogen, while the etching rate of the oxide material for a fluorine-containing gas is lower than the etching rate of the material, which is to be patterned by using the oxide material as a mask, for the fluorine-containing gas. In addition, the oxide material is soluble in a weak acid.

Abstract: A method of etching a dielectric layer includes providing a substrate, which includes a dielectric layer and a metal layer, performing a first etching process on the metal layer, and performing a second etching process on the dielectric layer to form a opening in the dielectric layer. The first etching process and the second etching process are in-situ carried out in the same reaction chamber without a vent. Since the first and second etching processes are not performed in different reaction chambers respectively, the cycle time can therefore be improved in the present invention. Because the first and second etching processes are performed without a vent, the substrate is protected from the pollution existing in surrounding.

Abstract: A method for manufacturing a semiconductor device is provided. The method includes forming a polysilicon layer on a semiconductor substrate, forming an anti-reflection coating on the polysilicon layer, forming a photoresist (PR) layer pattern on the anti-reflection coating, etching the anti-reflection coating using the PR layer pattern as a mask in capacitive coupled plasma (CCP) equipment using CF4, Ar, and O2, so as to cause a reaction by-product generated by etching the anti-reflect coating to be deposited on sidewalls of the PR layer pattern, thereby forming spacers, and etching the polysilicon layer using the PR layer pattern and the spacers as a mask.

Abstract: A method of cleaning a wafer after an etching process is provided. A substrate having an etching stop layer, a dielectric layer, a patterned metal hard mask sequentially formed thereon is provided. Using the patterned metal hard mask, an opening is defined in the dielectric layer. The opening exposes a portion of the etching stop layer. A dry etching process is performed in the environment of helium to remove the etching stop layer exposed by the opening. A dry cleaning process is performed on the wafer surface using a mixture of nitrogen and hydrogen as the reactive gases. A wet cleaning process is performed on the wafer surface using a cleaning solution containing a trace amount of hydrofluoric acid.

Abstract: A substrate processing method that processes a substrate on which a plurality of patterns adjacent to each other are formed, has: supplying a first processing liquid to a principal surface of the substrate that is dry and has the patterns formed thereon to make the first processing liquid adhere to the principal surface of the substrate; and supplying a second processing liquid having a higher surface tension than the first processing liquid to the principal surface of the substrate in the state where the first processing liquid adheres to the principal surface of the substrate to process the principal surface of the substrate with the second processing liquid.

Abstract: A method and an apparatus for forming a structure on a component made of a material composed of silicon oxide, especially of silicate glass, glass ceramic or quartz, wherein in accordance with the process at least a first surface of the component a partial removal of the material by plasma etching takes place and during the plasma etching at least at the surface to be etched a substrate temperature is established which is substantially greater than 90° C. but less than the softening temperature of the material. The apparatus is equipped for this purpose with a heater for generating the substrate temperature.

Abstract: A method of trimming hard mask is provided. The method includes providing a substrate, a hard mask layer, and a tri-layer stack on the substrate. The tri-layer stack includes a top photo resist layer, a silicon photo resist layer, and a bottom photo resist layer. The top photo resist layer, the silicon photo resist layer, the bottom photo resist layer, and the hard mask layer are patterned sequentially. A trimming process is performed on the hard mask layer. The bottom photo resist layer of the present invention is thinner and loses some height in the etching process, so the bottom photo resist layer will not collapse.

Abstract: A method for fabricating diamond nanopillars includes forming a diamond film on a substrate, depositing a metal mask layer on the diamond film, and etching the diamond film coated with the metal mask layer to form diamond nanopillars below the mask layer. The method may also comprise forming diamond nuclei on the substrate prior to forming the diamond film. Typically, a semiconductor substrate, an insulating substrate, a metal substrate, or an alloy substrate is used.

Abstract: A method for forming a gate and a method for etching a conductive layer are provided. First, a substrate is provided, including a dielectric layer and a conductive layer on its surface in order. Subsequently, a patterned silicon nitride layer is formed on the conductive layer as a hard mask, and the hydrogen concentration of the patterned silicon nitride layer is more than 1022 atoms/cm3. Thereafter, the conductive layer and the dielectric layer are etched utilizing the hard mask as a mask. Finally, an etching solution is utilized to remove the hard mask.

Abstract: A liquid discharge head includes, on a same substrate, pressure generating chambers, nozzle apertures communicating with the pressure generating chambers through nozzle communicating pans, and a reservoir, wherein a cross-section area of the nozzle communicating part is larger, along a direction parallel to a nozzle aperture face of the substrate, than a cross-section area of the nozzle aperture, and the cross-section area of the nozzle aperture in such direction remains constant over the entire length of the nozzle aperture.

Abstract: This method for making a nano-contact on a spin valve for the purposes of constituting a radio-frequency oscillator, consists, after deposition of the magnetic stack constituting the spin valve on a lower electrode in depositing on said magnetic stack a metal layer known as a “barrier” layer; in depositing on this “barrier” layer another metal layer; in depositing locally on this metal layer a hard mask; in subjecting the assembly to a first selective etching step of the metal layer constituting the injector through the hard mask, said metal layer being over-etched during this step under the hard mask in order to give the nano-contact its final dimension; in subjecting the assembly so obtained to a second selective etching step, able to induce the partial removal of the barrier layer and of the magnetic stack substantially on the periphery of the hard mask; in encapsulating the assembly obtained in a dielectric; in planarizing the encapsulated assembly so obtained until ending plumb with the residual layer of

Abstract: A method according to one embodiment comprises forming a thin film layer; forming a hardmask layer above the thin film layer, the hardmask layer comprising laminated layers of diamond-like carbon; removing a portion of the hardmask layer; and removing a portion of the thin film layer that is unprotected by the hardmask layer. A method according to another embodiment comprises forming a thin film layer; forming a patterned hardmask layer above the thin film layer, the hardmask layer comprising laminated layers of diamond-like carbon; and implanting a material into a portion of the thin film layer that is unprotected by the patterned hardmask layer. Additional methods are disclosed.

Abstract: A method of micro- and nanotexturing of various solid surfaces in plasma where carbon nanotubes are used as an etch mask. The method allows obtaining textures with feature sizes that can be controlled with the nanotube dimensions and the density of coating the treated surface.

Abstract: A method of fabricating a mask which can endure use for a long time and can be used for forming an isolated pattern with a high aspect ratio. The method includes the steps of: forming a soft material layer by disposing a soft material having positive photo sensitivity and adhesion or adhesiveness on a material as a target of machining; forming a hard material layer by disposing an opaque hard material in which a desired mask pattern has been formed in advance on the soft material layer; and forming the mask pattern in the soft material layer by performing exposure to light and development on the soft material layer by using the hard material layer as a photomask.

Abstract: The method of making a diamond product in accordance with the present invention comprises the steps of forming a diamond substrate (50) with a mask layer (52), and etching the diamond substrate (50) formed with the mask layer (52) with a plasma of a mixed gas composed of a gas containing an oxygen atom and a gas containing a fluorine atom, whereas the fluorine atom concentration is within the range of 0.04% to 6% with respect to the total number of atoms in the mixed gas.

Abstract: A mask forming method forms an A mask forming functional layer with an amorphous structure so as to cover an etched body, forms a B mask forming functional layer so as to cover the formed A mask forming functional layer, forms a convex/concave pattern in the formed B mask forming functional layer by carrying out a predetermined process to form a B mask on the A mask forming functional layer, and forms an A mask on the etched body by forming a convex/concave pattern in the A mask forming functional layer by dry etching the A mask forming functional layer using the B mask. By doing so, a convex/concave pattern with extremely small pattern fluctuations can be formed in the A mask forming functional layer.

Abstract: A method for controlling ADI-AEI CD difference ratios of openings having different sizes is provided. First, a first etching step using a patterned photoresist layer as a mask is performed to form a patterned Si-containing material layer and a polymer layer on sidewalls thereof. Next, a second etching step is performed with the patterned photoresist layer, the patterned Si-containing material layer and the polymer layer as masks to at least remove an exposed portion of a etching resistive layer to form a patterned etching resistive layer. A portion of a target material layer is removed by using the patterned etching resistive layer as an etching mask to form a first and a second openings in the target material layer. The method is characterized by controlling etching parameters of the first and second etching steps to obtain predetermined ADI-AEI CD difference ratios.

Abstract: The invention provides a dry etching method for processing a wafer having an Ru film formed on a thick Al2O3 film to be used for a magnetic head, capable of realizing high selectivity. In the etching of a wafer having disposed on an NiCr film 15 an Al2O3 film 14, an Ru film 13, an SiO2 film 12 and a resist mask 11, the Ru film 13 is etched via plasma using a processing gas containing Cl2 and O2 (FIG. 1(c)), and thereafter, the Ru film 13 is used as a mask to etch the Al2O3 film 14 via plasma using a gas mixture mainly containing BCl3 and also containing Cl2 and Ar (FIG. 1(d)).

Abstract: The invention relates to an imaging device to be used with millimeter and/or sub-millimeter radiation comprising at least a pair of substrates, at least one of which is patterned on at least one surface with a patterning defining at least one radiation detector, each radiation detector comprising: an antenna adapted to receive millimeter and/or sub-millimeter electromagnetic radiation, a mixer channel coupled to said antenna and in communication with a via extending through a substrate for connection to a signal output, a mixer comprising filters being mounted in the mixer channel for extracting an intermediate frequency signal in dependence upon said radiation received by the antenna, a waveguide structure coupled to said mixer and having a signal input for connection to a local oscillator.

Abstract: Provided is a method of fabricating hierarchical articles that contain nanofeatures and microstructures. The method includes providing a substrate that includes nanofeatures and then creating microstructures adding a layer, removing at least a portion of the layer to reveal at least a portion of the substrate.

Abstract: A method for etching an AlTiC workpiece comprises forming a copper mask layer on the AlTiC, lithographically patterning said copper mask layer to thereby expose portions of the AlTiC, reactive ion etching the AlTiC using a process gas comprising argon and fluorine, and removing the mask layer. The walls of the portions of the AlTiC covered by the copper mask layer are vertical, even when etching is to a substantial depth.

Abstract: A method is proposed which will enable cavities having optically transparent walls to be produced simply and cost-effectively in a component by using standard methods of microsystems technology. For this purpose, a silicon region is first produced, which is surrounded on all sides by at least one optically transparent cladding layer. At least one opening is then produced in the cladding layer. Over this opening, the silicon surrounded by the cladding layer is dissolved out, forming a cavity within the cladding layer. In this context, the cladding layer acts as an etch barrier layer.

Abstract: A method for forming a deep trench includes providing a substrate with a bottom layer and a top layer; performing a first etching process to etch the top layer, the bottom layer and the substrate so as to form a recess; selectively depositing a liner covering the top layer, the bottom layer and part of the substrate in the recess; using the liner as an etching mask to perform a second dry etching to etch the recess unmasked by the liner so as to form a deep trench; performing a selective wet etching to remove the top layer; and performing a post wet etching to enlarge the deep trench.

Abstract: A method for forming an etching mask comprises the steps of: irradiating focus ion beam to a surface of a substrate and forming an etching mask used for oblique etching including an ion containing portion in the irradiated region. A method for fabricating a three-dimensional structure comprises the steps of: preparing a substrate; irradiating focus ion beam to a surface of the substrate and forming an etching mask including an ion containing portion in the irradiated region; and dry-etching the substrate from a diagonal direction using the etching mask and forming a plurality of holes.