Abstract: A reactive correction to chamber impedance changes without the need to change the process recipe is disclosed. The reactive correction may be done automatically and repeatedly during processing. A control of RF power application to a plasma processing chamber is performed, so as to minimize reflected power and efficiently apply the RF power to the plasma. Autotuning of the RF power application is enabled without modifying a qualified process recipe. The autotuning can be applied using frequency matching and RF matching network tuning.

Abstract: A method for etching a target layer of a semiconductor device in an etching apparatus is provided. To form an element, the method includes forming a photoresist pattern on the target layer of the semiconductor device, in which the photoresist pattern has an after-develop-inspection critical dimension (ADI CD). A target after-etch-inspection critical dimension (AEI CD) of the element is provided, as well as a trim time of the target layer. The etching apparatus is provided and a formation time of a protective layer on an inner wall of the etching apparatus is determined based on the ADI CD, the target AEI CD and the trim time. The protective layer for the predetermined formation time is formed to perform a trimming process on the target layer for the trim time by using the photoresist pattern as a mask, so as to form the element.

Abstract: A method is described for improving the uniformity over a predetermined substrate area of a spectral response of photonic devices fabricated in a thin device layer. The method includes (i) establishing an initial device layer thickness map for the predetermined area, (ii) establishing a linewidth map for the predetermined area, and (iii) establishing an etch depth map for the predetermined area. The method further includes, based on the initial device layer thickness map, the linewidth map and the etch depth map, calculating an optimal device layer thickness map and a corresponding thickness correction map for the predetermined substrate area taking into account photonic device design data. Still further, the method includes performing a location specific corrective etch process in accordance with the thickness correction map.

Abstract: A semiconductor processing apparatus includes a semiconductor processing station for a semiconductor wafer, and an endpoint detector associated with the semiconductor processing station. The endpoint detector includes a non-contact probe configured to probe the semiconductor wafer, an optical transmitter configured to transmit an optical signal to the non-contact probe, and an optical receiver configured to receive a reflected optical signal from the non-contact probe. The controller controls the semiconductor processing station based on the reflected optical signal.

Abstract: Methods and apparatus for modifying RF current path lengths are disclosed. Apparatus includes a plasma processing system having an RF power supply and a lower electrode having a conductive portion. There is included an insulative component disposed in an RF current path between the RF power supply and the conductive portion. There are included a plurality of RF path modifiers disposed within the insulative component, the plurality of RF path modifiers being disposed at different angular positions relative to a reference angle drawn from a center of the insulative component, whereby at least a first one of the plurality of RF path modifiers is electrically connected to the conductive portion and at least a second one of the plurality of the plurality of RF path modifiers is not electrically connected to the conductive portion.

Abstract: The present invention is to achieve a reduction both in size of a plasma processing apparatus and an installation area thereof. A dry etching apparatus includes a stock unit that includes a cassette storing a tray that can be conveyed and that stores substrates. In a conveying unit storing a conveying apparatus of the tray, a rotary stage is provided. Rotational angular position adjustment of the tray is performed by rotating the rotary stage placed on the tray before being subjected to dry etching and detecting a notch by a notch detecting sensor.

Abstract: Methods are disclosed for depositing material onto and/or etching material from a substrate in a surface processing tool having a processing chamber, a controller and one or more devices for adjusting the process parameters within the chamber. The method comprises: the controller instructing the one or more devices according to a series of control steps, each control step specifying a defined set of process parameters that the one or more devices are instructed to implement, wherein at least one of the control steps comprises the controller instructing the one or more devices to implement a defined set of constant process parameters for the duration of the step, including at least a chamber pressure and gas flow rate through the chamber, which duration is less than the corresponding gas residence time (Tgr) of the processing chamber for the step.

Abstract: A processing method and apparatus uses at least one electric field applicator (34) biased to produce a spatial-temporal electric field to affect a processing medium (26), suspended nano-objects (28) or the substrate (30) in processing, interacting with the dipole properties of the medium (26) or particles to construct structure on the substrate (30). The apparatus may include a magnetic field, an acoustic field, an optical force, or other generation device. The processing may affect selective localized layers on the substrate (30) or may control orientation of particles in the layers, control movement of dielectrophoretic particles or media, or cause suspended particles of different properties to follow different paths in the processing medium (26). Depositing or modifying a layer on the substrate (30) may be carried out.

Abstract: An arrangement for performing pressure control within a processing chamber substrate processing is provided. The arrangement includes a peripheral ring configured at least for surrounding a confined chamber volume that is configured for sustaining a plasma for etching the substrate during substrate processing. The peripheral ring includes a plurality of slots that is configured at least for exhausting processed byproduct gas from the confined chamber volume during substrate processing. The arrangement also includes a conductive control ring that is positioned next to the peripheral ring and is configured to include plurality of slots. The pressure control is achieved by moving the conductive control ring relative to the peripheral ring such that a first slot on the peripheral ring and a second slot on the conductive control ring are offset with respect to one another in a range of zero offset to full offset.

Abstract: A method for etching a layer is provided. A substrate is provided in a chamber. An etch plasma for etching a layer on the substrate is generated. Light from a first region of the chamber is measured to provide a first signal. Light from a second region of the chamber is measured to provide a second signal. The first signal with the second signal are compared to determine an etch endpoint.

Abstract: A method and apparatus for etching a photomask substrate with enhanced process monitoring is provided. In one embodiment, a method of determining an etching endpoint includes performing an etching process on a first tantalum containing layer through a patterned mask layer, directing a radiation source having a first wavelength from about 200 nm and about 800 nm to an area uncovered by the patterned mask layer, collecting an optical signal reflected from the area covered by the patterned mask layer, analyzing a waveform obtained the reflected optical signal reflected from the substrate from a first time point to a second time point, and determining a first endpoint of the etching process when a slope of the waveform is changed about 5 percent from the first time point to the second time point.

Abstract: An arrangement within a plasma reactor for detecting a plasma unconfinement event is provided. The arrangement includes a sensor, which is a capacitive-based sensor implemented within the plasma reactor. The sensor is implemented outside of a plasma confinement region and is configured to produce a transient current when the sensor is exposed to plasma associated with the plasma unconfinement event. The sensor has at least one electrically insulative layer oriented toward the plasma associated with the plasma unconfined event. The arrangement also includes a detection circuit, which is electrically connected to the sensor for converting the transient current into a transient voltage signal and for processing the transient voltage signal to ascertain whether the plasma unconfinement event exists.

Abstract: Method for carrying out plasma processing on a wafer under Run-to-Run control by using a plasma processing apparatus having a plasma processing chamber, a process monitor which monitors a condition in the plasma processing chamber, and an actuator which controls parameters which are constituent elements of a plasma processing condition. The method includes the steps of making one of the parameters a (N?1)th manipulated variable, calculating a first difference between a process monitor value in the plasma processing obtained by the process monitor and a desired value of the process monitor value in the plasma processing, calculating a correction amount of the (N?1)th manipulated variable on the basis of the first difference and a previously obtained correlation between the process monitor value in the plasma processing and the (N?1)th manipulated variable, wherein N is a natural number equal to or larger than 2.

Abstract: A sensing device for measuring a plasma process parameter in a plasma chamber for processing workpieces may include a substrate with one or more sensor embedded in the substrate. The substrate can have a surface made of substantially the same material as workpieces that are plasma processed in the plasma chamber. Each sensor can include a collector portion made of substantially the same material as the substrate surface. The collector portion includes a surface that is level with the surface of the substrate. Sensor electronics are embedded into the substrate and coupled to the collector portion. When the substrate surface is exposed to a plasma one or more signals resulting from the plasma can be measured with the sensor(s).

Abstract: The invention provide apparatus and methods for creating gate structures on a substrate in real-time using Vacuum Ultra-Violet (VUV) data and Electron Energy Distribution Function (EEDƒ) data and associated (VUV/EEDƒ)-related procedures in (VUV/EEDƒ) etch systems. The (VUV/EEDƒ)-related procedures can include multi-layer-multi-step processing sequences and (VUV/EEDƒ)-related models that can include Multi-Input/Multi-Output (MIMO) models.

Abstract: A semiconductor device wafer includes a test structure. The test structure includes a layer of material having an angle-shaped test portion disposed on at least a portion of a surface of the semiconductor wafer. A ruler marking on the surface of the semiconductor wafer proximate the test portion is adapted to facilitate measurement of a change in length of the test portion.

Abstract: The invention provides an apparatus and methods for creating gate structures on a substrate in real-time using Vacuum Ultra-Violet (VUV) data and Electron Energy Distribution Function (EEDf) data and associated (VUV/EEDf)-related procedures in (VUV/EEDf) etch systems. The (VUV/EEDf)-related procedures can include multi-layer-multi-step processing sequences and (VUV/EEDf)-related models that can include Multi-Input/Multi-Output (MIMO) models.

Abstract: The present invention relates to a method of manufacturing a semiconductor device wherein etching is performed on films on a wafer using a plasma treatment apparatus. In the manufacturing method according to the present invention, a change in the difference between the emission intensities of a first wavelength component and a second wavelength component in plasma is monitored during etching. If the amount of change in the difference per unit time exceeds a predetermined threshold a given number of times in a row, then the flow rate of oxygen introduced to the plasma treatment apparatus is increased or, if the amount of change exceeding the predetermined threshold has not been seen, then the oxygen flow rate is set back to the original value thereof. This series of actions is repeated all the time during a set period of time.

Abstract: Disclosed are a method and a system for processing a semiconductor structure of the type including a substrate, a dielectric layer, and a TaN—Ta liner on the dielectric layer. The method comprises the step of using XeF2 to remove at least a portion of the TaN—Ta liner completely to the dielectric layer. In the preferred embodiments, the present invention uses XeF2 selective gas phase etching as alternatives to Ta—TaN Chemical Mechanical Polishing (CMP) as a basic “liner removal process” and as a “selective cap plating base removal process.” In this first use, XeF2 is used to remove the metal liner, TaN—Ta, after copper CMP. In the second use, the XeF2 etch is used to selectively remove a plating base (TaN—Ta) that was used to form a metal cap layer over the copper conductor.

Abstract: The invention relates to an apparatus for surface processing on a substrate, for example for applying a coating to the substrate or for removing a coating from the substrate, wherein the apparatus comprises: a chamber enclosing an interior and serving for arranging the substrate for the surface processing, a process gas analyser for detecting at least one gaseous constituent of a residual gas atmosphere formed in the interior, wherein the process gas analyser comprises an ion trap for storing the gaseous constituent to be detected, and an ionization device for ionizing the gaseous constituent. The invention also relates to an associated method for monitoring surface processing on a substrate.

Abstract: An ion radiation damage prediction method includes a parameter computation step of computing the incidence energy and incidence angle of an incident ion hitting a fabricated object, and a step of searching for data in databases created in advance on the basis of the computed incidence energy and angle, the databases storing distributions of quantities of crystalline defects having an effect on the fabricated object, ion reflection probabilities and ion penetration depths. The method also includes finding the penetration depth and location of the incident ion based on the data found in the searching step and based on the computed incidence energy and angle, and computing a quantity of defects in the fabricated object from the penetration depth and location. A distribution of defects may be computed by performing the aforementioned steps for many incident ions.

Abstract: A plasma processing apparatus includes a heater in thermal contact with a showerhead electrode, and a temperature controlled top plate in thermal contact with the heater to maintain a desired temperature of the showerhead electrode during semiconductor substrate processing. A gas distribution member supplies a process gas and radio frequency (RF) power to the showerhead electrode.

Abstract: A method for automatically performing power matching using a mechanical RF match during substrate processing is provided. The method includes providing a plurality of parameters for the substrate processing wherein the plurality of parameters including at least a predefined number of learning cycles. The method also includes setting the mechanical RF match to operate in a mechanical tuning mode. The method further includes providing a first set of instructions to the substrate processing to ignore a predefined number of cycles of Rapid Alternating Process RAP steps. The method yet also includes operating the mechanical RF match in the mechanical tuning mode for the predefined number of learning cycles. The method yet further includes determining a set of optimal capacitor values. The method moreover includes providing a second set of instructions to a power generator to operate in a frequency tuning mode.

Abstract: An aspect of the present invention relates to a method of etching a surface layer portion of a silicon wafer comprising: positioning the silicon wafer within a sealed vessel containing a mixed acid A of hydrofluoric acid and sulfuric acid so that the silicon wafer is not in contact with mixed acid A; introducing a solution B in the form of nitric acid containing nitrogen oxides into the sealed vessel and causing solution B to mix with mixed acid A; and vapor phase decomposing the surface layer portion of the silicon wafer within the sealed vessel within which mixed acid A and solution B have been mixed.

Abstract: An apparatus and the use of such an apparatus and method for producing microcomponents with component structures are presented which are generated in a process chamber on a substrate according to the LIGA method for example and are stripped from the enclosing photoresist with the help of a cooled remote plasma source.

Abstract: In one embodiment, a pattern forming method includes forming a physical guide that includes a first pattern in a first region and a second pattern in a second region on an underlying film, embedding a polymer material into a concave portion of the physical guide, microphase-separating the polymer material, to form a self-assembly pattern having a first and a second polymer sections, observing the self-assembly pattern in the second region, to determine from an observation result whether or not the self-assembly pattern in the first region has a predetermined shape, and selectively removing the first polymer section in the case of determining that the self-assembly pattern in the first region has the predetermined shape. The second pattern includes a pattern with a larger coverage ratio than the first pattern and a pattern with a smaller coverage ratio than the first pattern.

Abstract: A method and apparatus for etching a photomask substrate with enhanced process monitoring, for example, by providing for optical monitoring at different regions of the photomask to obtain desired etch rate or thickness loss is provided. In one embodiment, the method includes performing an etching process on a reflective multi-material layer that includes at least one molybdenum layer and one silicon layer through a patterned mask, directing radiation having a wavelength from about 170 nm and about 800 nm to an area of the multi-material layer uncovered by the patterned mask, collecting an optical signal reflected from the area uncovered by the patterned mask, analyzing a waveform obtained from the reflected optical signal, and determining a first endpoint of the etching process when an intensity of the reflected optical signal is between about 60 percent and about 90 percent less than an initial reflected optical signal.

Abstract: Methods and systems for adapting and/or tuning feedforward control parameters in a plasma processing chamber. In embodiments, a dependent process parameter, such as a chamber component temperature, is controlled with a feedforward control algorithm based on one or more independent process parameters, such as RF power. A control algorithm may calculate steady-state deviation of the dependent parameter from a process recipe setpoint, estimate an amount by which an existing control gain coefficient is to be changed to better achieve the setpoint, associate the new control gain coefficient with the particular recipe operation, and store the new control gain coefficient for subsequent execution of the recipe operation. In embodiments, the amount by which a gain coefficient is to be changed is based on a model function derived from a lookup table associating gain coefficients with setpoints of the dependent process parameter and values of the independent process parameter.

Abstract: A method according to one embodiment includes depositing a dielectric hard mask layer above a polymer mask under-layer; forming a photoresist mask above the hard mask layer; transferring the image of the photoresist mask onto the hard mask layer using reactive ion etching, thereby defining a hard mask; determining that a critical dimension bias of the hard mask is within or outside a specification; and changing a level of an input source power used during a subsequent reactive ion etching step to move the critical dimension bias towards a target critical dimension bias when the critical dimension bias of the hard mask is outside the specification. Additional embodiments are also disclosed.

Abstract: In a supercritical fluid method a supercritical fluid is supplied into a process chamber. The supercritical fluid is discharged from the process chamber as a supercritical fluid process proceeds. A concentration of a target material included in the supercritical fluid discharged from the process chamber is detected during the supercritical fluid process. An end point of the supercritical fluid process may be determined based on a detected concentration of the target material.

Abstract: A method and manufacture for charge storage layer separation is provided. A layer, such as a polymer layer, is deposited on top of an ONO layer so that the polymer layer is planarized, or approximately planarized. The ONO includes at least a first region and a second region, where the first region is higher than the second region. For example, the first region may be the portion of the ONO that is over the source/drain region, and the second region may be the portion of the ONO that is over the shallow trench. Etching is performed on the polymer layer to expose the first region of the ONO layer, leaving the second region of the ONO unexposed. The etching continues to occur to etch the exposed ONO at the first region so that the ONO layer is etched away in the first region and the second region remains unexposed.

Abstract: A substrate processing method which is capable of enhancing productivity in manufacturing product substrates. In process chambers of an etching apparatus, etching is carried out on a substrate as an object to be processed, and dummy processing is carried out on at least one non-product substrate before execution of the etching. A host computer determines whether or not the dummy processing is to be executed. The host computer determines whether or not the interior of each of the process chambers and is in a stable state, and omits the execution of the dummy processing when it is determined that it is in the stable state.

Abstract: A sample contamination method according to an embodiment includes spraying a chemical solution containing contaminants into a casing, carrying a semiconductor substrate into the casing filled with the chemical solution by the spraying, leaving the semiconductor substrate in the casing filled with the chemical solution for a predetermined time, and carrying the semiconductor substrate out of the casing after the predetermined time passes.

Abstract: Methods and systems for measuring a characteristic of a substrate or preparing a substrate for analysis are provided. One method for measuring a characteristic of a substrate includes removing a portion of a feature on the substrate using an electron beam to expose a cross-sectional profile of a remaining portion of the feature. The feature may be a photoresist feature. The method also includes measuring a characteristic of the cross-sectional profile. A method for preparing a substrate for analysis includes removing a portion of a material on the substrate proximate to a defect using chemical etching in combination with an electron beam. The defect may be a subsurface defect or a partially subsurface defect. Another method for preparing a substrate for analysis includes removing a portion of a material on a substrate proximate to a defect using chemical etching in combination with an electron beam and a light beam.

Abstract: Disclosed herein is a shape simulation apparatus including: a flux computation block configured to compute the flux of particles incident on the surface of a wafer covered with a mask; and a shape computation block configured to compute a surface shape of the wafer by allowing the coordinates of a plurality of calculation points established on the surface of the wafer to be time-evolved based on the incident flux computed.

Abstract: An embodiment of the present inventions provides a method for preconditioning a semiconductor fabrication component using a plasma etching process and an optional enhanced ultrasonic and/or megasonic preconditioning step in order to eliminate the need for a burn-in period typically associated with said components, as well as extend the useful life of the component during its wear-out phase.

Abstract: A system and a method for milling and inspecting an object. The method may include performing at least one iteration of a sequence that includes: milling, by a particle beam, a first surface of the object, during a first surface milling period; obtaining, by an electron detector, an image of a second surface of the object during at least a majority of the first surface milling period; wherein the object is expected to comprise an element of interest (EOI) that is positioned between the first and second surfaces; milling, by the particle beam, the second surface of the object during a second surface milling period; wherein each of the first surface milling period and the second surface milling period has a duration that exceeds a long duration threshold; obtaining by the electron detector an image of the first surface of the object during at least a majority of the second surface milling period.

Abstract: Plasma reactors with adjustable plasma electrodes and associated methods of operation are disclosed herein. The plasma reactors can include a chamber, a workpiece support for holding a microfeature workpiece, and a plasma electrode in the chamber and spaced apart from the workpiece support. The plasma electrode has a first portion and a second portion configured to move relative to the first portion. The first and second portions are configured to electrically generate a plasma between the workpiece support and the plasma electrode.

Abstract: A grid assembly for use in an etching system for etching at least a wafer. The grid assembly may include a first grid member, a second grid member, and a third grid member. When the grid assembly is used in etching the wafer, the first grid member may be electrically grounded, the second grid member may be electrically negative relative to the first grid member, and the third grid member may be electrically positive relative to the first grid member. The second grid member may be disposed between the first grid member and the third grid member. The first grid member may be thicker than at least one of the second grid member and the third grid member.

Abstract: A method of manufacturing a plasmon generator includes the steps of: forming an etching mask on a dielectric layer; forming an accommodation part by etching the dielectric layer using the etching mask; and forming the plasmon generator to be accommodated in the accommodation part. The step of forming the etching mask includes the steps of: forming a patterned layer on an etching mask material layer, the patterned layer having a first opening that has a sidewall; forming a structure by forming an adhesion film on the sidewall, the structure having a second opening smaller than the first opening; and etching a portion of the etching mask material layer exposed from the second opening.

Abstract: A method of controlling wetting characteristics is described. Such method includes forming and configuring nanostructures on a surface where controlling of the wetting characteristics is desired. Surfaces and methods of fabricating such surfaces are also described.

Abstract: A method for calibrating a high frequency measuring device so as to accurately measure plasma processing parameters within a chamber. A calibration parameter is calculated from a first set of three reference loads measured by a high frequency measurement device. A second calibration parameter is calculated from S parameters measured between a connection point where the high-frequency measuring device is connected and the inside of the chamber of a plasma processing device. A second set of three reference loads, which include the impedance previously calculated and encompass a range narrower than that encompassed by the first set of three reference loads, is measured with the reference loads in the chamber.

Abstract: An etching apparatus includes a process unit and a control unit. Emission intensity of plasma inside the process unit is obtained by an OES detector, a nonlinear regression analysis is performed by an etching control device to determine a regression formula. The nonlinear regression analysis is performed by using the emission intensity of the plasma obtained until a first time when the emission intensity of the plasma passes a peak, and a second time to be an etching end point is calculated by using the regression formula. The etching end point is calculated as a time when the emission intensity decreases for a predetermined value from the first time. The etching apparatus finishes an etching when the process reaches the etching end point. It is thereby possible to control the etching end point with high-accuracy.

Abstract: A plasma etching method includes a preparation process for performing a plasma etching process using a processing gas including a first processing gas containing carbon (C) and fluorine (F), a ratio (C/F) of the first processing gas having a first value, and obtaining a residual amount of the mask layer corresponding to a variation point where a variation amount of the bowing CD is increased; a first plasma etching process using the processing gas including the first processing gas until a residual amount of the mask layer reaches the variation point; and a second plasma etching process performed after the first plasma etching process. The second plasma etching process is performed by using a processing gas including at least a second processing gas containing carbon (C) and fluorine (F), and a ratio (C/F) of the second processing gas is smaller than the first value.

Abstract: A chuck for a plasma processor comprises a temperature-controlled base, a thermal insulator, a flat support, and a heater. The temperature-controlled base has a temperature below the desired temperature of a workpiece. The thermal insulator is disposed over the temperature-controlled base. The flat support holds a workpiece and is disposed over the thermal insulator. A heater is embedded within the flat support and/or disposed on an underside of the flat support. The heater includes a plurality of heating elements that heat a plurality of corresponding heating zones. The power supplied and/or temperature of each heating element is controlled independently.

Abstract: A time-dependent substrate temperature to be applied during a plasma process is determined. The time-dependent substrate temperature at any given time is determined based on control of a sticking coefficient of a plasma constituent at the given time. A time-dependent temperature differential between an upper plasma boundary and a substrate to be applied during the plasma process is also determined. The time-dependent temperature differential at any given time is determined based on control of a flux of the plasma constituent directed toward the substrate at the given time. The time-dependent substrate temperature and time-dependent temperature differential are stored in a digital format suitable for use by a temperature control device defined and connected to direct temperature control of the upper plasma boundary and the substrate. A system is also provided for implementing upper plasma boundary and substrate temperature control during the plasma process.

Abstract: A plasma etching system having a substrate support assembly with multiple independently controllable heater zones. The plasma etching system is configured to control etching temperature of predetermined locations so that pre-etch and/or post-etch non-uniformity of critical device parameters can be compensated for.

Abstract: In a plasma processing apparatus in which a wafer is processed while supplying radio frequency power to electrodes disposed in a sample stage in a processing chamber within a reactor via a matching box, by matching a specific value of power at transition points of data values of at least two kinds among characteristic data including light emission intensity of the plasma, magnitude of its time variation, a matching position of the matching box, and a change of a value of a voltage of the radio frequency power supplied to the electrodes detected by varying the power to a plurality of values during the processing with a value detected by using characteristic data which is detected during the processing executed on a wafer of the same kind in a different reactor, the differences of the states inside the processing chamber or plasma among a plurality of semiconductor processing apparatuses or reactors are reduced.

Abstract: A stacked proportioning valve having a body with at least two sets of ports disposed at different positions along a longitudinal length of the body, each set of ports including at least three ports at different angular positions to couple to fluid conduits, a rotor disposed in the valve body has at least two sections stacked along the longitudinal length, each section comprising three fluid channels in longitudinal alignment with one of the sets of ports, and a drive shaft affixed to the rotor, the drive shaft to rotate the rotor over angular positions to fluidly couple together pairs of ports in each of the sets of ports synchronously as a function of the rotor's angular position. In embodiments a component of a plasma processing chamber, such as a plasma etch chamber is fluidly coupled by the stack proportioning valve to reservoirs of both a hot and cold chiller.

Abstract: Provided is a substrate dechucking system of a plasma processing chamber adapted to remove a substrate from an ESC with reduction in voltage potential spike during dechucking of the substrate.