Substrate Contains Elemental Metal, Alloy Thereof, Or Metal Compound Patents (Class 216/75)
  • Patent number: 11935758
    Abstract: A method for atomic layer etching a metal containing layer is provided. At least a region of a surface of the metal containing layer is modified to form a modified metal containing region by exposing a surface of the metal containing layer to a modification gas, wherein adjacent to the modified metal containing region remains an unmodified metal containing region. The modified metal containing region is selectively removed with respect to the unmodified metal containing region by exposing the surface of the metal containing layer to an inert bombardment plasma generated from an inert gas.
    Type: Grant
    Filed: April 27, 2020
    Date of Patent: March 19, 2024
    Assignee: Lam Research Corporation
    Inventors: Wenbing Yang, Mohand Brouri, Samantha SiamHwa Tan, Shih-Ked Lee, Yiwen Fan, Wook Choi, Tamal Mukherjee, Ran Lin, Yang Pan
  • Patent number: 11859288
    Abstract: A corrosion-resistant member including: a metal base material (10); a corrosion-resistant coating (30) formed on the surface of the base material (10); and a buffer layer (20) formed between the base material (10) and the corrosion-resistant coating (30). The base material (10) contains a main element having the highest mass content ratio among elements contained in the base material (10) and a trace element having a mass content ratio of 1% by mass or less. The corrosion-resistant coating (30) contains at least one kind selected from magnesium fluoride, aluminum fluoride, and aluminum oxide. The buffer layer (20) contains an element of the same kind as the trace element, and the content ratio obtained by energy dispersive X-ray analysis of the element of the same kind as the trace element contained in the buffer layer (20) is 2% by mass or more and 99% by mass or less.
    Type: Grant
    Filed: September 3, 2020
    Date of Patent: January 2, 2024
    Assignee: Resonac Corporation
    Inventors: So Miyaishi, Masahiro Okubo, Masayuki Yoshimura, Wataru Sakane, Teppei Tanaka, Saeko Nakamura, Saori Yamaki
  • Patent number: 11830758
    Abstract: A plasma processing method including: a process of placing a work piece on a stage provided in a chamber, the work piece including a substrate and a holding member having an adhesive layer on a surface and holding the substrate via the adhesive layer, and having an exposed portion where the adhesive layer is exposed outside the substrate; and a plasma etching process of etching the substrate with a plasma generated in the chamber, with the exposed portion exposed to the plasma. In response to occurrence of an interruption in the plasma etching process, a cleaning process of exposing a surface of the substrate to a plasma containing an oxidizing gas is performed, and then the plasma etching process is resumed.
    Type: Grant
    Filed: November 30, 2021
    Date of Patent: November 28, 2023
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Atsushi Harikai, Shogo Okita, Akihiro Itou
  • Patent number: 11813056
    Abstract: The present disclosure is directed to microneedle patches for direct sampling and ultrasensitive detection of protein biomarkers in dermal interstitial fluids. The microneedle patches are comprised of polymers with high protein absorption capability (e.g. polystyrene) and are modified with capture biorecognition elements that are specific to target analytes in the interstitial fluid (ISF). Systems and methods are further provided for detection of a target ISF analyte obtained by in vivo sampling of the ISF using a microneedle patch.
    Type: Grant
    Filed: July 30, 2020
    Date of Patent: November 14, 2023
    Assignee: Washington University
    Inventors: Srikanth Singamaneni, Zheyu Wang, Jingyi Luan
  • Patent number: 11814726
    Abstract: Provided are a method of selectively etching a film primarily containing Si, such as polycrystalline silicon (Poly-Si), single crystal silicon (single crystal Si), or amorphous silicon (a-Si) as well as a method for cleaning by removing a Si-based deposited and/or attached matter inside a sample chamber of a film forming apparatus, such as a chemical vapor deposition (CVD) apparatus, without damaging the apparatus interior. By simultaneously introducing a monofluoro interhalogen gas (XF, where X is any of Cl, Br, and I) and nitric oxide (NO) into an etching or a film forming apparatus, followed by thermal excitation, it is possible to selectively and rapidly etch a Si-based film, such as Poly-Si, single crystal Si, or a-Si, while decreasing the etching rate of SiN and/or SiO2. It is also possible to perform cleaning by removing a Si-based deposited and/or attached matter inside a film forming apparatus, such as a CVD apparatus, without damaging the apparatus interior.
    Type: Grant
    Filed: December 22, 2022
    Date of Patent: November 14, 2023
    Assignee: KANTO DENKA KOGYO CO., LTD.
    Inventors: Yoshinao Takahashi, Katsuya Fukae, Korehito Kato
  • Patent number: 11798804
    Abstract: A method and apparatus for material deposition onto a sample to form a protective layer composed of at least two materials that have been formulated and arranged according to the material properties of the sample.
    Type: Grant
    Filed: December 9, 2020
    Date of Patent: October 24, 2023
    Assignee: FEI Company
    Inventors: Brian Roberts Routh, Thomas G. Miller, Chad Rue, Noel Thomas Franco
  • Patent number: 11798816
    Abstract: A method for isolating at least one conductive via from a surrounding glass substrate is provided. A support layer is formed over at least one surface of the glass substrate. Thereafter, the glass substrate is removed. As a result, the at least one conductive via can be analyzed without interference from the glass substrate.
    Type: Grant
    Filed: May 28, 2021
    Date of Patent: October 24, 2023
    Assignee: University of Central Florida Research Foundation, Inc.
    Inventors: Omar Saad Ahmed, Tengfei Jiang
  • Patent number: 11791201
    Abstract: A minute transistor is provided. A transistor having low parasitic capacitance is provided. A transistor having high frequency characteristics is provided. An electrode including the transistor is provided. A novel electrode is provided. The electrode includes a first conductive layer containing a metal, an insulating layer, and a second conductive layer. The insulating layer is formed over the first conductive layer. A mask layer is formed over the insulating layer. The insulating layer is etched using plasma with the mask layer used as a mask, whereby an opening is formed in the insulating layer so as to reach the first conductive layer. Plasma treatment is performed on at least the opening in an oxygen atmosphere. By the plasma treatment, a metal-containing oxide is formed on the first conductive layer in the opening. The oxide is removed, and then the second conductive layer is formed in the opening.
    Type: Grant
    Filed: May 4, 2021
    Date of Patent: October 17, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Motomu Kurata, Shinya Sasagawa, Ryota Hodo, Yuta Iida, Satoru Okamoto
  • Patent number: 11549371
    Abstract: The invention relates to a method for pickling a turbomachine component (1), comprising the following steps: positioning the component in a closed chamber (2), injecting a gas mixture (3) into the chamber (2), the gas mixture (3) comprising a halogenated gas, heating the chamber (2), the method being characterised in that: the gas mixture further comprises dihydrogen, the heating step is carried out at a temperature higher than 1000° C. and the step of injecting the gas mixture (3) is carried out by circulating through the chamber (2) a flow of gas mixture (3) having a flow rate between 6 and 15 times the volume of the chamber (2) per hour.
    Type: Grant
    Filed: November 14, 2019
    Date of Patent: January 10, 2023
    Assignee: SAFRAN AIRCRAFT ENGINES
    Inventors: Noureddine Bourhila, Laurent Besnault
  • Patent number: 11526239
    Abstract: A touch panel includes a substrate, a plurality of peripheral traces, a plurality of marks, a touch sensing electrode, a plurality of first intermediate layers, and a plurality of second intermediate layers. The peripheral traces and the marks are disposed in a peripheral area of the substrate. The first intermediate layers are disposed between the peripheral traces and the substrate, and the second intermediate layers are disposed between the marks and the substrate. Each of the first intermediate layers and the second intermediate layers includes a metal nanowire, and the touch sensing electrode is electrically connected with the peripheral traces. A touch sensor tape is also proposed.
    Type: Grant
    Filed: April 8, 2021
    Date of Patent: December 13, 2022
    Assignee: TPK Glass Solutions (Xiamen) Inc.
    Inventors: Wei-Chia Fang, Chung-Chin Hsiao
  • Patent number: 10964636
    Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a first conductive feature over a substrate. The method also includes forming an insulating layer over the substrate and covering the first conductive feature. The method also includes forming a first opening in the insulating layer to expose the first conductive feature. The method also includes recessing the exposed first conductive feature through the first opening, so as to form a second opening in the first conductive feature and below the first opening. The method also includes filling the first opening and the second opening with a second conductive feature.
    Type: Grant
    Filed: September 19, 2018
    Date of Patent: March 30, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Shin-Yi Yang, Ming-Han Lee
  • Patent number: 10957548
    Abstract: Methods for dry plasma etching thin layers of material including Cu(In, Ga)Se, e.g., CIGS material on semiconductor substrates are provided. A method of etching a CIGS material layer such as copper indium gallium selenide film, includes: flowing an etching gas including a mixture of gases into a process chamber having a substrate disposed therein, the substrate including a copper indium gallium selenide layer having a patterned film stack disposed thereon, the patterned film stack covering a first portion of the copper indium gallium selenide layer and exposing a second portion of the copper indium gallium selenide layer; and contacting the copper indium gallium selenide layer with the etching gas to remove the second portion and form one or more copper indium gallium selenide edges of the first portion.
    Type: Grant
    Filed: November 14, 2019
    Date of Patent: March 23, 2021
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Mang-Mang Ling, Jong Mun Kim, Chentsau Ying
  • Patent number: 10385437
    Abstract: Functional materials and methods for making the functional materials are provided. Also provided are methods for utilizing the functional materials in a variety of applications, including catalysis, adsorption, energy storage, and biomedical applications. The functional materials are made from metal alloys via an oxidative dealloying process that selectively removes one or more elements from the metal alloy and converts one or more of the remaining elements into a stable metal-oxygen matrix having a controlled porosity.
    Type: Grant
    Filed: January 13, 2016
    Date of Patent: August 20, 2019
    Assignee: WISCONSIN ALUMNI RESEARCH FOUNDATION
    Inventor: John Harry Perepezko
  • Patent number: 10358540
    Abstract: Volatile compound emissions from a product that comprises a polymeric material may be reduced or eliminated from the product by heating the product in a subatmospheric pressure environment. The product may be heated in the subatmospheric pressure environment at a temperature sufficient to vaporize a volatile compound contained within the polymeric material such that vapors of the volatile compound are extracted or released from the product.
    Type: Grant
    Filed: June 9, 2017
    Date of Patent: July 23, 2019
    Assignee: GM GLOBAL TECHNOLOGY OPERATIONS LLC
    Inventors: Thomas J Chapaton, Wayne E Reeder
  • Patent number: 9708716
    Abstract: Methods for the photoreduction of molecules are provided. The methods use diamond having a negative electron affinity as a photocatalyst, taking advantage of its ability to act as a solid-state electron emitter that is capable of inducing reductions without the need for reactants to adsorb onto its surface. The methods comprise illuminating a fluid sample comprising the molecules to be reduced and hydrogen surface-terminated diamond having a negative electron affinity with light comprising a wavelength that induces the emission of electrons from the diamond directly into the fluid sample. The emitted electrons induce the reduction of the molecules to form a reduction product.
    Type: Grant
    Filed: December 30, 2014
    Date of Patent: July 18, 2017
    Assignee: Wisconsin Alumni Research Foundation
    Inventors: Robert John Hamers, Di Zhu, Nigel Hajj Becknell
  • Patent number: 9666400
    Abstract: A field emission electron source includes a linear carbon nanotube structure, an insulating layer and at least one conductive ring. The linear carbon nanotube structure has a first end and a second end. The insulating layer is located on outer surface of the linear carbon nanotube structure. The first conductive ring includes a first ring face 1301 and a second ring face, an end surface of the linear carbon nanotube structure, and the first ring face are coplanar.
    Type: Grant
    Filed: December 18, 2012
    Date of Patent: May 30, 2017
    Assignees: Tsinghua University, HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Cai-Lin Guo, Jie Tang, Peng Liu, Shou-Shan Fan
  • Patent number: 9598907
    Abstract: A superabrasive compact and a method of making the superabrasive compact are disclosed. A superabrasive compact may comprise a superabrasive volume and a substrate. The substrate may be attached to the superabrasive volume via an interface. The superabrasive volume may be formed by a plurality of polycrystalline superabrasive particles. The superabrasive particles may have nano or sub-micron scale surface texture.
    Type: Grant
    Filed: February 28, 2014
    Date of Patent: March 21, 2017
    Assignee: DIAMOND INNOVATIONS INC.
    Inventors: Kai Zhang, Frank Gao, Gary Flood
  • Patent number: 9418863
    Abstract: Disclosed is an etching method for etching an etching target layer. The etching method includes: a first step of depositing a plasma reaction product on a mask layer made of an organic film formed on the etching target layer; and after the first step, a second step of etching the etching target layer. The mask layer includes a coarse region in which a plurality of openings are formed, and a dense region surrounding the coarse region. The mask layer exists more densely in the dense region than in the coarse region. The coarse region includes a first region and a second region positioned close to the dense region compared to the first region. In the second step of the etching method, a width of the openings in the first region becomes narrower than a width of the openings in the second region.
    Type: Grant
    Filed: May 12, 2015
    Date of Patent: August 16, 2016
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Shin Hirotsu, Yoshiki Igarashi, Tomonori Miwa, Hiroshi Okada
  • Publication number: 20150129546
    Abstract: Methods of selectively etching metal-containing materials from the surface of a substrate are described. The etch selectively removes metal-containing materials relative to silicon-containing films such as silicon, polysilicon, silicon oxide, silicon germanium, silicon carbide, silicon carbon nitride and/or silicon nitride. The methods include exposing metal-containing materials to halogen containing species in a substrate processing region. No plasma excites the halogen-containing precursor either remotely or locally in embodiments.
    Type: Application
    Filed: October 14, 2014
    Publication date: May 14, 2015
    Applicant: APPLIED MATERIALS, INC.
    Inventors: Nitin K. Ingle, Jessica Sevanne Kachian, Lin Xu, Soonam Park, Xikun Wang, Jeffrey W. Anthis
  • Patent number: 9011707
    Abstract: An etching method that uses an etch reactant retained within at least a semi-solid media (120, 220, 224, 230). The etch reactant media is applied to selectively etch a surface layer (106, 218, 222). The etch reactant media may be applied to remove metal shorts (222), smearing and eaves resulting from CMP or in failure analysis for uniform removal of a metal layer (218) without damaging the vias, contact, or underlying structures.
    Type: Grant
    Filed: July 16, 2013
    Date of Patent: April 21, 2015
    Assignee: Texas Instruments Incorporated
    Inventor: Darwin Rusli
  • Patent number: 8999183
    Abstract: A method involving ion milling is demonstrated to fabricate open-nanoshell suspensions and open-nanoshell monolayer structures. Ion milling technology allows the open-nanoshell geometry and upward orientation on substrates to be controlled. Substrates can be fabricated covered with stable and dense open-nanoshell monolayer structures, showing nanoaperture and nanotip geometry with upward orientation, that can be used as substrates for SERS-based biomolecule detection.
    Type: Grant
    Filed: September 10, 2012
    Date of Patent: April 7, 2015
    Assignees: IMEC, Katholieke Universiteit Leuven, K.U. Leuven R&D
    Inventors: Willem Jozef Katharina Van Roy, Jian Ye, Pol Van Dorpe
  • Patent number: 8992792
    Abstract: Methods of fabricating ultra low-k dielectric self-aligned vias are described. In an example, a method of forming a self-aligned via (SAV) in a low-k dielectric film includes forming a trench pattern in a metal nitride hardmask layer formed above a low-k dielectric film formed above a substrate. A via pattern is formed in a masking layer formed above the metal nitride hardmask layer. The via pattern is etched at least partially into the low-k dielectric film, the etching comprising using a plasma etch using a chemistry based on CF4, H2, and a diluent inert gas composition.
    Type: Grant
    Filed: December 21, 2012
    Date of Patent: March 31, 2015
    Assignee: Applied Materials, Inc.
    Inventors: Chih-Yang Chang, Sean S. Kang, Chia-Ling Kao, Nikolaos Bekiaris
  • Patent number: 8951425
    Abstract: A method of forming at least one curved plate having first and second layers, the first layer being formed of a first material and the second layer being formed of a second material, the method including forming one or more blocks of a fusible material on a surface of a substrate; baking the one or more blocks to deform their shape; and depositing the first and second materials over the one or more deformed blocks to form the first and second layers.
    Type: Grant
    Filed: March 28, 2013
    Date of Patent: February 10, 2015
    Assignee: STMicroelectronics (Crolles 2) SAS
    Inventors: Stéphane Monfray, Thomas Skotnicki, Onoriu Puscasu, Christophe Maitre
  • Patent number: 8926851
    Abstract: A method for making a film of core-shell nanoparticles generally uniformly arranged on a substrate uses atomic layer deposition (ALD) to form the shells. The nanoparticle cores are placed in a solution containing a polymer having an end group for attachment to the cores. The solution is then applied to a substrate and allowed to dry, resulting in the nanoparticle cores being uniformly arranged by the attached polymer chains. ALD is then used to grow the shell material on the cores, using two precursors for the shell material that are non-reactive with the polymer. The polymer chains also form between the cores and the substrate surface, so the ALD forms shell material completely surrounding the cores. The uniformly arranged core-shell nanoparticles can be used as an etch mask to etch the substrate.
    Type: Grant
    Filed: November 18, 2012
    Date of Patent: January 6, 2015
    Assignee: HGST Netherlands B.V.
    Inventors: Jeffrey S. Lille, Ricardo Ruiz, Lei Wan, Gabriel Zeltzer
  • Patent number: 8926757
    Abstract: The plasma reactor defines a reaction chamber provided with a support for the metallic pieces and an anode-cathode system, and a heating means is mounted externally to said plasma reactor. The plasma process, for a cleaning operation, includes the steps of connecting the support to the grounded anode and the cathode to a negative potential of a power source; feeding an ionizable gaseous charge into the reaction chamber and heating the latter at vaporization temperatures of piece contaminants; applying an electrical discharge to the cathode; and providing the exhaustion of the gaseous charge and contaminants. A subsequent heat treatment includes the steps of: inverting the energization polarity of the anode-cathode system; feeding a new gaseous charge to the reaction chamber and maintaining it heated; applying an electrical discharge to the cathode; and exhausting the gaseous charge from the reaction chamber.
    Type: Grant
    Filed: June 9, 2009
    Date of Patent: January 6, 2015
    Assignee: Whirlpool S. A.
    Inventors: Roberto Binder, Aloisio Nelmo Klein, Cristiano Binder, Gisele Hammes
  • Patent number: 8921232
    Abstract: A method of taper-etching a layer to be etched that is made of a dielectric material and has a top surface. The method includes the steps of: forming an etching mask with an opening on the top surface of the layer to be etched; and taper-etching a portion of the layer to be etched, the portion being exposed from the opening, by reactive ion etching so that a groove having two wall faces intersecting at a predetermined angle is formed in the layer to be etched. The step of taper-etching employs an etching gas containing a first gas contributing to the etching of the layer to be etched and a second gas contributing to the deposition of a sidewall protective film, and changes, during the step, the ratio of the flow rate of the second gas to the flow rate of the first gas so that the ratio increases.
    Type: Grant
    Filed: February 25, 2014
    Date of Patent: December 30, 2014
    Inventors: Hironori Araki, Yoshitaka Sasaki, Hiroyuki Ito, Shigeki Tanemura
  • Patent number: 8900469
    Abstract: A method and apparatus for etching a photomask substrate with enhanced process monitoring is provided. In one embodiment, a method of determining an etching endpoint includes performing an etching process on a first tantalum containing layer through a patterned mask layer, directing a radiation source having a first wavelength from about 200 nm and about 800 nm to an area uncovered by the patterned mask layer, collecting an optical signal reflected from the area covered by the patterned mask layer, analyzing a waveform obtained the reflected optical signal reflected from the substrate from a first time point to a second time point, and determining a first endpoint of the etching process when a slope of the waveform is changed about 5 percent from the first time point to the second time point.
    Type: Grant
    Filed: July 6, 2012
    Date of Patent: December 2, 2014
    Assignee: Applied Materials, Inc.
    Inventor: Michael Grimbergen
  • Publication number: 20140349488
    Abstract: Disclosed is an etching gas provided containing CHF2COF. The etching gas may contain, as an additive, at least one kind of gas selected from O2, O3, CO, CO2, F2, NF3, Cl2, Br2, I2, XFn (In this formula, X represents Cl, I or Br. n represents an integer satisfying 1?n?7.), CH4, CH3F, CH2F2, CHF3, N2, He, Ar, Ne, Kr and the like, from CH4, C2H2, C2H4, C2H6, C3H4, C3H6, C3H8, HI, HBr, HCl, CO, NO, NH3, H2 and the like, or from CH4, CH3F, CH2F2 and CHF3. This etching gas is not only excellent in etching performances such as the selection ratio to a resist and the patterning profile but also easily available and does not substantially by-produce CF4 that places a burden on the environment.
    Type: Application
    Filed: August 8, 2014
    Publication date: November 27, 2014
    Inventors: Naoto TAKADA, Isamu MORI
  • Patent number: 8894870
    Abstract: A system and method for etching a material, including a compound having a formulation of XYZ, wherein X and Y are one or more metals and Z is selected from one or more Group 13-16 elements, such as carbon, nitrogen, boron, silicon, sulfur, selenium, and tellurium, are disclosed. The method includes a first etch process to form one or more first volatile compounds and a metal-depleted layer and a second etch process to remove at least a portion of the metal-depleted layer.
    Type: Grant
    Filed: March 4, 2013
    Date of Patent: November 25, 2014
    Assignee: ASM IP Holding B.V.
    Inventors: Jereld Lee Winkler, Eric James Shero, Fred Alokozai
  • Patent number: 8871107
    Abstract: A method of forming at least one metal or metal alloy feature in an integrated circuit is provided. In one embodiment, the method includes providing a material stack including at least an etch mask located on a blanker layer of metal or metal alloy. Exposed portions of the blanket layer of metal or metal alloy that are not protected by the etch mask are removed utilizing an etch comprising a plasma that forms a polymeric compound and/or complex which protects a portion of the blanket layer of metal or metal alloy located directly beneath the etch mask during the etch.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: October 28, 2014
    Assignee: International Business Machines Corporation
    Inventors: Nicholas C. M. Fuller, Eric A. Joseph, Hiroyuki Miyazoe, Mark Hoinkis, Chun Yan
  • Patent number: 8845909
    Abstract: A process of fabricating a heat dissipation substrate is provided. A metal substrate having an upper surface, a lower surface, first recesses located on the upper surface and second recesses located on the lower surface is provided. The metal substrate is divided into carrier units and connecting units connecting the carrier units. A first and a second insulating materials are respectively filled into the first and the recesses. A first conductive layer is formed on the upper surface and the first insulating material. A second conductive layer is formed on the lower surface and the second insulating material. The first and the second conductive layers are patterned to form a first and a second patterned conductive layers. The first and the second insulating materials are taken as an etching mask to etch the connecting units of the metal substrate so as to form a plurality of individual heat dissipation substrates.
    Type: Grant
    Filed: May 30, 2013
    Date of Patent: September 30, 2014
    Assignee: Subtron Technology Co., Ltd.
    Inventor: Tzu-Shih Shen
  • Patent number: 8801945
    Abstract: A write element for a thermally assisted magnetic head slider includes an air bearing surface facing to a magnetic recording medium; a first magnetic pole, a second magnetic pole, and coils sandwiched between the first and the second magnetic poles; a waveguide for guiding light generated by a light source module mounted on a substrate; and a plasmon unit provided around the first magnetic pole and the waveguide, which has a near-field light generating surface for propagating near-field light to the air bearing surface. The near-field light generating surface of the plasmon unit is apart from the air bearing surface with a first predetermined distance to form a first recess, and the first recess is filled in with a protective layer. The thermally assisted magnetic head slider can prevent the plasmon unit from protruding over the air bearing surface, thereby improving the performance of thermally assisted magnetic head.
    Type: Grant
    Filed: December 31, 2013
    Date of Patent: August 12, 2014
    Assignee: SAE Magnetics (H.K.) Ltd.
    Inventors: Natsuo Nishijima, Ryuji Fujii, Hong Tao Ma, Jian Hui Huang, Huan Chao Liang, Zhong Xian Wei
  • Publication number: 20140217065
    Abstract: A system and method for etching a material, including a compound having a formulation of XYZ, wherein X and Y are one or more metals and Z is selected from one or more Group 13-16 elements, such as carbon, nitrogen, boron, silicon, sulfur, selenium, and tellurium, are disclosed. The method includes a first etch process to form one or more first volatile compounds and a metal-depleted layer and a second etch process to remove at least a portion of the metal-depleted layer.
    Type: Application
    Filed: March 4, 2013
    Publication date: August 7, 2014
    Applicant: ASM IP HOLDING B.V.
    Inventors: Jereld Lee Winkler, Eric James Shero, Fred Alokozai
  • Patent number: 8784676
    Abstract: A method for reducing contamination in an etch chamber is provided. A substrate with a metal containing layer is placed in the etch chamber. The metal containing layer is etched, producing nonvolatile metal residue deposits on surfaces of the etch chamber, wherein some of the metal residue of the metal residue deposits is in a first state. The substrate is removed from the etch chamber. The chamber is conditioned by converting metal residue in the first state to metal residue in a second state, where metal residue in the second state has stronger adhesion to surfaces of the etch chamber than metal residue in the first state.
    Type: Grant
    Filed: February 3, 2012
    Date of Patent: July 22, 2014
    Assignee: Lam Research Corporation
    Inventors: Joydeep Guha, Sanket Sant, Butsurin Jinnai
  • Patent number: 8778198
    Abstract: A method for manufacturing a magnetic sensor using an electrical lapping guide deposited and patterned simultaneously with a hard bias structure of the sensor material. The method includes depositing a sensor material, and patterning and ion milling the sensor material to define a track width of the sensor. A magnetic, hard bias material is then deposited and a second patterning and ion milling process is performed to simultaneously define the back edge of an electrical lapping guide and a back edge of the sensor.
    Type: Grant
    Filed: June 29, 2011
    Date of Patent: July 15, 2014
    Assignee: HGST Netherlands B.V.
    Inventors: Quang Le, Shin Funada, Jui-Lung Li
  • Patent number: 8778204
    Abstract: A method and apparatus for monitoring a target layer in a plasma process having a photoresist layer is provided. The method is useful in removing noise associated with the photoresist layer, and is particularly useful when signals associated with the target layer is weak, such as when detecting an endpoint for a photomask etching process.
    Type: Grant
    Filed: October 26, 2011
    Date of Patent: July 15, 2014
    Assignee: Applied Materials, Inc.
    Inventor: Michael N. Grimbergen
  • Publication number: 20140170303
    Abstract: A method of depositing an active material for a metal ion battery comprising the steps of: providing a conductive material in an electrodeposition bath wherein the electrodeposition bath contains an electrolyte comprising a source of the active material; and electrodepositing the active material onto a surface of the conductive material.
    Type: Application
    Filed: August 17, 2012
    Publication date: June 19, 2014
    Applicant: NEXEON LIMITED
    Inventors: Phil Rayner, Mike Lain, Jeremy Barker
  • Patent number: 8728563
    Abstract: A method of manufacturing an endoluminal implantable surface, stent, or graft includes the steps of providing an endoluminal implantable surface, stent, or graft having an inner wall surface, an outer wall surface, and a wall thickness and forming a pattern design into the endoluminal implantable surface, stent, or graft. At least one groove is created in the inner surface of the intravascular stent by applying a laser machining method to the inner surface.
    Type: Grant
    Filed: May 3, 2011
    Date of Patent: May 20, 2014
    Assignee: Palmaz Scientific, Inc.
    Inventors: Julio C. Palmaz, Armando Garza
  • Patent number: 8722547
    Abstract: Wafers having a high K dielectric layer and an oxide or nitride containing layer are etched in an inductively coupled plasma processing chamber by applying a source power to generate an inductively coupled plasma, introducing into the chamber a gas including BCl3, setting the temperature of the wafer to be between 100° C. and 350° C., and etching the wafer with a selectivity of high K dielectric to oxide or nitride greater than 10:1. Wafers having an oxide layer and a nitride layer are etched in a reactive ion etch processing chamber by applying a bias power to the wafer, introducing into the chamber a gas including BCl3, setting the temperature of the wafer to be between 20° C. and 200° C., and etching the wafer with an oxide to nitride selectivity greater than 10:1.
    Type: Grant
    Filed: April 17, 2007
    Date of Patent: May 13, 2014
    Assignee: Applied Materials, Inc.
    Inventors: Radhika Mani, Nicolas Gani, Wei Liu, Meihua Shen, Shashank C. Deshmukh
  • Patent number: 8721903
    Abstract: A vacuum planarization method substantially improves the surface roughness of a thermally-assisted recording (TAR) disk that has a recording layer (RL) formed of a substantially chemically-ordered FePt alloy or FePt-X alloy (or CoPt alloy or CoPt-X alloy) and a segregant, like SiO2. A first amorphous carbon overcoat (OC1) is deposited on the RL and etched with a non-chemically reactive plasma to remove at least one-half the thickness of OC1. Then a second amorphous carbon overcoat (OC2) is deposited on the etched OC1. The OC2 is then reactive-ion-etched, for example in a H2/Ar plasma, to remove at least one-half the thickness of OC2. A thin third overcoat (OC3) may be deposited on the etched OC2.
    Type: Grant
    Filed: April 5, 2012
    Date of Patent: May 13, 2014
    Assignee: HGST Netherlands B.V.
    Inventors: Xiaoping Bian, Qing Dai, Oleksandr Mosendz, Franck Dreyfus Rose, Run-Han Wang
  • Patent number: 8715520
    Abstract: There is provided a substrate processing method capable of etching a layer containing, at least, platinum without using a halogen gas. When etching the platinum-manganese layer on a wafer W by using a tantalum (Ta) layer 38 having a certain pattern shape, a processing gas containing, at least, a carbon monoxide gas, a hydrogen gas, and a rare gas is used, and a ratio of a gas flow rate of the hydrogen gas to a total gas flow rate of the carbon monoxide gas and the hydrogen gas is in a range of from about 50% to about 75%.
    Type: Grant
    Filed: March 21, 2012
    Date of Patent: May 6, 2014
    Assignee: Tokyo Electron Limited
    Inventors: Takashi Sone, Eiichi Nishimura
  • Patent number: 8696922
    Abstract: A platinum-comprising material is plasma etched by being exposed to a plasma etching chemistry that includes CHCl3, CO2 and O2. In one embodiment, a method of processing a semiconductor substrate in the fabrication of integrated circuitry includes forming metallic platinum-comprising nanoparticles over a material. A portion of the nanoparticles is masked and another portion of the nanoparticles is unmasked. The unmasked portion of the metallic platinum-comprising nanoparticles is plasma etched using a plasma etching chemistry comprising CHCl3, CO2 and O2. Other embodiments are disclosed.
    Type: Grant
    Filed: June 22, 2009
    Date of Patent: April 15, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Hongbin Zhu, Mark Kiehlbauch, Alex Schrinsky
  • Patent number: 8685262
    Abstract: A nozzle plate containing multiple micro-orifices for the cascade impactor and a method for manufacturing the same are disclosed. The nozzle plate is formed by a series of semiconductor processes, including lithography, etching and electroplating. The nozzle plate comprises a plate body and a plurality of micro-orifices formed on the plate body. The orifice has a diameter which gradually expands in the direction away from the bottom of the plate body to achieve a smooth inner surface, allowing particles to pass therethrough smoothly without being clogged in the nozzle plate.
    Type: Grant
    Filed: October 1, 2013
    Date of Patent: April 1, 2014
    Assignee: National Chiao Tung University
    Inventors: Chuen-Jinn Tsai, Sheng-Chieh Chen, Hong-Dar Chen
  • Patent number: 8685266
    Abstract: Monocyclic chlorine based inductively coupled plasma deep etching processes for the rapid micromachining of titanium substrates and titanium devices so produced are disclosed. The method parameters are adjustable to simultaneously vary etch rate, mask selectivity, and surface roughness and can be applied to titanium substrates having a wide variety of thicknesses to produce high aspect ratio features, smooth sidewalls, and smooth surfaces. The titanium microdevices so produced exhibit beneficially high fracture toughness, biocompatibility and are robust and able to withstand harsh environments making them useful in a wide variety of applications including microelectronics, micromechanical devices, MEMS, and biological devices that may be used in vivo.
    Type: Grant
    Filed: October 2, 2006
    Date of Patent: April 1, 2014
    Assignee: The Regents of the University of California
    Inventors: Emily R. Parker, Brian J. Thibeault, Marco F. Aimi, Masa P. Rao, Noel C. MacDonald
  • Patent number: 8679359
    Abstract: The present invention is directed to a method and apparatus for etching various metals that may be used in semiconductor or integrated circuit processing through the use of non-halogen gases such as hydrogen, helium, or combinations of hydrogen and helium with other gases such as argon. In one exemplary embodiment of the present invention, in a reaction chamber, a substrate having a metal interconnect layer deposited thereon is exposed to a plasma formed of non-halogen gas. The plasma generated is maintained for a certain period of time to provide for a desired or expected etching of the metal. In some embodiments, the metal interconnect layer may be copper, gold or silver.
    Type: Grant
    Filed: May 10, 2011
    Date of Patent: March 25, 2014
    Assignee: Georgia Tech Research Corporation
    Inventors: Fangyu Wu, Dennis W. Hess, Galit Levitin
  • Patent number: 8652338
    Abstract: A magnetic recording medium a magnetic recording medium includes a soft magnetic layer formed on a substrate, magnetic patterns made of a protruded ferromagnetic layer separated from each other on the soft magnetic layer, and a nonmagnetic layer formed between the magnetic patterns, a nitrogen concentration therein being higher on a surface side than on a substrate side.
    Type: Grant
    Filed: November 15, 2012
    Date of Patent: February 18, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kaori Kimura, Yoshiyuki Kamata, Satoshi Shirotori, Tsuyoshi Onitsuka
  • Patent number: 8652342
    Abstract: A semiconductor fabrication apparatus and a method of fabricating a semiconductor device using the same performs semiconductor etching and deposition processes at an edge of a semiconductor substrate after disposing the semiconductor substrate at a predetermined place in the semiconductor fabrication apparatus. The semiconductor fabrication apparatus has lower, middle and upper electrodes sequentially stacked. The semiconductor substrate is disposed on the middle electrode. Semiconductor etching and deposition processes are performed on the semiconductor substrate in the semiconductor fabrication apparatus. The semiconductor fabrication apparatus forms electrical fields along an edge of the middle electrode during performance of the semiconductor etching and deposition processes.
    Type: Grant
    Filed: May 10, 2012
    Date of Patent: February 18, 2014
    Assignee: Samsung Electronics Co., Ltd
    Inventors: Kyung-Woo Lee, Jin-Sung Kim, Joo-Byoung Yoon, Yeong-Cheol Lee, Sang-Jun Park, Hee-Kyeong Jeon
  • Patent number: 8647439
    Abstract: Methods of preparing a clean surface of germanium tin or silicon germanium tin layers for subsequent deposition are provided. An overlayer of Ge, doped Ge, another GeSn or SiGeSn layer, a doped GeSn or SiGeSn layer, an insulator, or a metal can be deposited on a prepared GeSn or SiGeSn layer by positioning a substrate with an exposed germanium tin or silicon germanium tin layer in a processing chamber, heating the processing chamber and flowing a halide gas into the processing chamber to etch the surface of the substrate using either thermal or plasma assisted etching followed by depositing an overlayer on the substantially oxide free and contaminant free surface. Methods can also include the placement and etching of a sacrificial layer, a thermal clean using rapid thermal annealing, or a process in a plasma of nitrogen trifluoride and ammonia gas.
    Type: Grant
    Filed: April 26, 2012
    Date of Patent: February 11, 2014
    Assignee: Applied Materials, Inc.
    Inventors: Errol Antonio C. Sanchez, Yi-Chiau Huang
  • Patent number: 8643128
    Abstract: The present invention discloses an MEMS sensor and a method for making the MEMS sensor. The MEMS sensor according to the present invention includes: a substrate including an opening; a suspended structure located above the opening; and an upper structure, a portion of which is at least partially separated from a portion of the suspended structure; wherein the suspended structure and the upper structure are separated from each other by a step including metal etch.
    Type: Grant
    Filed: February 24, 2009
    Date of Patent: February 4, 2014
    Assignee: Pixart Imaging Incorporation
    Inventor: Chuan Wei Wang
  • Patent number: 8632687
    Abstract: The invention relates to a method for electron beam induced etching of a layer contaminated with gallium, with the method steps of providing at least one first halogenated compound as an etching gas at the position at which an electron beam impacts on the layer, and providing at least one second halogenated compound as a precursor gas for removing of the gallium from this position.
    Type: Grant
    Filed: August 11, 2009
    Date of Patent: January 21, 2014
    Assignee: Carl Zeiss SMS GmbH
    Inventors: Nicole Auth, Petra Spies, Rainer Becker, Thorsten Hofmann, Klaus Edinger