Substrate Contains Elemental Metal, Alloy Thereof, Or Metal Compound Patents (Class 216/75)
  • Patent number: 7365012
    Abstract: An etching method of subjecting a base material to an etching process using an etching agent containing hydrogen fluoride and ozone is disclosed. The base material has a first region constituted from silicon as a main material and a second region constituted from SiO2 as a main material. The etching method includes the steps of: preparing the base material; and supplying the etching agent onto the base material to form a step between the first and second regions using a feature that an etching rate of silicon by the etching agent is higher than an etching rate of SiO2 by the etching agent, so that the height of the surface of the first region is lower than the height of the surface of the second region.
    Type: Grant
    Filed: August 10, 2005
    Date of Patent: April 29, 2008
    Assignee: Seiko Epson Corporation
    Inventors: Hiroyuki Matsuo, Toshiki Nakajima, Kunihiro Miyazaki
  • Publication number: 20080087638
    Abstract: Calibration wafers and methods for calibrating a plasma process performed in a plasma processing apparatus, such as an ionized physical vapor deposition apparatus. The calibration wafer includes one or more selective-redeposition sources that may be used for calibrating a plasma process. The selective-redeposition sources are constructed to promote the redeposition of a controllable and/or measurable amount of material during the plasma process.
    Type: Application
    Filed: September 29, 2006
    Publication date: April 17, 2008
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Jozef Brcka, Rodney L. Robison, Takashi Horiuchi
  • Patent number: 7358192
    Abstract: Embodiments of a cluster tool, processing chamber and method for processing a film stack are provided. In one embodiment, a method for in-situ etching of silicon and metal layers of a film stack is provided that includes the steps of etching an upper metal layer of the film stack in a processing chamber to expose a portion of an underlying silicon layer, and etching a trench in the silicon layer without removing the substrate from the processing chamber. The invention is particularly useful for thin film transistor fabrication for flat panel displays.
    Type: Grant
    Filed: April 8, 2004
    Date of Patent: April 15, 2008
    Assignee: Applied Materials, Inc.
    Inventors: Walter R. Merry, Quanyuan Shang, John M. White
  • Patent number: 7354695
    Abstract: A method is provided for preparing high surface-area texturing of a substrate using methods by which material from a substrate is subtracted from or added to the surface of the substrate. In one embodiment, the method is a subtractive lithographic method that involves exposing a laser-ablatable substrate, such as a polymeric or ceramic substrate, to laser light. A mask may be used to define the pattern of light incident on the substrate. High surface-area textured substrates, in particular, miniaturized planar analysis devices having high surface-area textured features, prepared by the methods disclosed herein, are also provided. A method by which the high surface-area textured substrate or the miniaturized planar analysis device is used as a master from which replicate copies thereof may be made is also provided.
    Type: Grant
    Filed: March 29, 2005
    Date of Patent: April 8, 2008
    Assignee: Agilent Technologies, Inc.
    Inventors: Reid A. Brennen, Sally A. Swedberg
  • Publication number: 20080029481
    Abstract: Provided herein are methods for preventing the formation and accumulation of surface-associated charges, and deleterious effects associated therewith, during the manufacture of a MEMS device. In some embodiments, methods provided herein comprise etching a sacrificial material in the presence of an ionized gas, wherein the ionized gas neutralizes charged species produced during the etching process and allows for their removal along with other etching byproducts. Also disclosed are microelectromechanical devices formed by methods of the invention, and visual display devices incorporating such devices.
    Type: Application
    Filed: August 2, 2006
    Publication date: February 7, 2008
    Inventors: Manish Kothari, Jeffrey B. Sampsell
  • Patent number: 7294281
    Abstract: An optical information recording medium, which includes both of a land surface and a groove surface as a recording track and presents high signal quality. The optical information recording medium includes both a land and a groove as the recording track on a substrate, in which a laser light is irradiated from a reverse side of the substrate to thereby carry out a recording and a reproduction, and an inclination angle of a groove side is 25° or more and 40° or less, and both of arithmetic average roughness (Ra) on the land surface and the groove surface are assumed to be 0.2 to 0.7 nm.
    Type: Grant
    Filed: August 30, 2004
    Date of Patent: November 13, 2007
    Assignee: Sony Corporation
    Inventors: Hiroyuki Takemoto, Mitsuo Arima, Tadao Suzuki, Yoshihito Fukushima, Hiroshi Nakayama, Atsushi Takeuchi
  • Patent number: 7294409
    Abstract: Methods for fabricating a medical device having at least one porous layer include providing a medical device having at least one alloy and removing at least one component of the alloy to form the porous layer. Although methods may be used to make stent devices with porous layers, any other suitable medical device may be made having one or more porous layers. An alloy may include any suitable combination of metals and sometimes a combination of metal and non-metal. In some embodiments, one or more of the most electrochemically active component(s) of an alloy are removed by the dissolving (or “dealloying”) process, to leave a porous matrix behind. The porous matrix layer may then be infused with one or more therapeutic agents for enhancing treatment of a patient.
    Type: Grant
    Filed: November 13, 2003
    Date of Patent: November 13, 2007
    Assignee: University of Virgina
    Inventors: Whye-Kei Lye, Kareen Looi, Michael L. Reed
  • Patent number: 7285229
    Abstract: An etchant of the present invention includes an aqueous solution containing hydrochloric acid, nitric acid, and a cupric ion source. An etching method of the present invention includes bringing the etchant into contact with at least one metal selected from nickel, chromium, nickel-chromium alloys, and palladium. Another etching method of the present invention includes bringing a first etchant that includes an aqueous solution containing at least the following components A to C (A. hydrochloric acid; B. at least one compound selected from the following (a) to (c): (a) compounds with 7 or less carbon atoms, containing a sulfur atom(s) and at least one group selected from an amino group, an imino group, a carboxyl group, a carbonyl group, and a hydroxyl group; (b) thiazole; and (c) thiazole compounds; and C.
    Type: Grant
    Filed: November 2, 2004
    Date of Patent: October 23, 2007
    Assignee: MEC Company, Ltd.
    Inventors: Masayo Kuriyama, Ryo Ogushi, Daisaku Akiyama, Kaoru Urushibata
  • Patent number: 7279108
    Abstract: A process is revealed whereby resistors can be manufactured integral with a printed circuit board by plating the resistors onto the insulative substrate. Uniformization of the insulative substrate through etching and oxidation of the plated resistor are discussed as techniques for improving the uniformity and consistency of the plated resistors. Trimming and baking are also disclosed as methods for adjusting and stabilizing the resistance of the plated resistors.
    Type: Grant
    Filed: February 6, 2006
    Date of Patent: October 9, 2007
    Inventors: Peter Kukanskis, Dennis Fritz, Frank Durso, Steven Castaldi, David Sawoska
  • Patent number: 7270761
    Abstract: A fluorine-free integrated process for plasma etching aluminum lines in an integrated circuit structure including an overlying anti-reflection coating (ARC) and a dielectric layer underlying the aluminum, the process being preferably performed in a single plasma reactor. The ARC open uses either BCl3/Cl2 or Cl2 and possibly a hydrocarbon passivating gas, preferably C2H4. The aluminum main etch preferably includes BCl3/Cl2 etch and C2H4 diluted with He. The dilution is particularly effective for small flow rates of C2H4. An over etch into the Ti/TiN barrier layer and part way into the underlying dielectric may use a chemistry similar to the main etch. A Cl2/O2 chamber cleaning may be performed, preferably with the wafer removed from the chamber and after every wafer cycle.
    Type: Grant
    Filed: October 18, 2002
    Date of Patent: September 18, 2007
    Assignee: Appleid Materials, Inc
    Inventors: Xikun Wang, Hui Chen, Anbei Jiang, Hong Shih, Steve S. Y. Mak
  • Patent number: 7262139
    Abstract: A method for etching metal deposited on a substrate, the method comprising: depositing a metal layer above a substrate; coating at least a portion of the deposited metal layer with a photo-resist; pattering the photo-resist; etching the deposited metal layer with an inert gas plasma at an energy density of less than 0.5 Watt/cm2, the substrate being maintained at a temperature of less than 50° C.; and ashing a resultant crust with an ashing gas, the ashing gas comprising CF4 and O2.
    Type: Grant
    Filed: May 18, 2005
    Date of Patent: August 28, 2007
    Assignee: AVX Israel, Ltd.
    Inventors: Eitan Avni, Elad Irron, Avi Neta
  • Patent number: 7259104
    Abstract: A surface processing method of a sample having a mask layer that does not contain carbon as a major component formed on a substance to be processed, the substance being a metal, semiconductor and insulator deposited on a silicon substrate, includes the steps of installing the sample on a sample board in a vacuum container, generating a plasma that consists of a mixture of halogen gas and adhesive gas inside the vacuum container, applying a radio frequency bias voltage having a frequency ranging from 200 kHz to 20 MHz on the sample board, and controlling a periodic on-off of the radio frequency bias voltage with an on-off control frequency ranging from 100 Hz to 10 kHz.
    Type: Grant
    Filed: September 29, 2003
    Date of Patent: August 21, 2007
    Assignee: Hitachi, Ltd.
    Inventors: Tetsuo Ono, Takafumi Tokunaga, Tadashi Umezawa, Motohiko Yoshigai, Tatsumi Mizutani, Tokuo Kure, Masayuki Kojima, Takashi Sato, Yasushi Goto
  • Patent number: 7255804
    Abstract: A process for making photonic crystal circuit and a photonic crystal circuit consisting of regularly-distributed holes in a high index dielectric material, and controllably-placed defects within this lattice, creating waveguides, cavities, etc. for photonic devices. The process is based upon the discovery that some positive ultraviolet (UV) photoresists are electron beam sensitive and behave like negative electron beam photoresists. This permits creation of photonic crystal circuits using a combination of electron beam and UV exposures. As a result, the process combines the best features of the two exposure methods: the high speed of UV exposure and the high resolution and control of the electron beam exposure. The process also eliminates the need for expensive photomasks.
    Type: Grant
    Filed: February 14, 2003
    Date of Patent: August 14, 2007
    Assignee: University of Delaware
    Inventors: Dennis W. Prather, Janusz Murakowski
  • Patent number: 7238294
    Abstract: The invention refers to a procedure for etching of materials at the surface by focussed electron beam induced chemical reactions at said surface. The invention is characterized in that in a vacuum atmosphere the material which is to be etched is irradiated with at least one beam of molecules, at least one beam of photons and at least one beam of electrons, whereby the irradiated material and the molecules of the beam of molecules are excited in a way that a chemical reaction predetermined by said material and said molecules composition takes place and forms a reaction product and said reaction product is removed from the material surface-irradiation and removal step.
    Type: Grant
    Filed: May 2, 2003
    Date of Patent: July 3, 2007
    Assignees: NaWoTec GmbH, University of Maryland
    Inventors: Hans Wilfried Peter Koops, Klaus Edinger
  • Patent number: 7229563
    Abstract: An apparatus and method are described for etching Ni-containing films using gas phase plasma etching. Etching of Ti—Ni alloys is carried out by exposure to plasma comprising hydrogen halide (HX) and carbonyl etching gases. The Ti in the Ti—Ni alloy is etched via an ion-assisted reaction with HX and the Ni is etched by reacting with CO. The method is particularly well suited for anisotropic etching of Ti—Ni metal gates for CMOS applications. Etching of Ni—Fe layers is carried out by exposure to plasma comprising a carbonyl etching gas.
    Type: Grant
    Filed: January 28, 2003
    Date of Patent: June 12, 2007
    Assignee: Tokyo Electron Limited
    Inventor: Lee Chen
  • Patent number: 7214325
    Abstract: Forming low contract resistance metal contacts on GaN films by treating a GaN surface using a chlorine gas Inductively Coupled Plasma (ICP) etch process before the metal contacts are formed. Beneficially, the GaN is n-type and doped with Si, while the metal contacts include alternating layers of Ti and Al. Additionally, the GaN film is dipped in a solution of HCl:H2O prior to metal contact formation.
    Type: Grant
    Filed: March 22, 2002
    Date of Patent: May 8, 2007
    Assignee: LG Electronics Inc.
    Inventors: Jong Lam Lee, Ho Won Jang, Jong Kyu Kim, Changmin Jeon
  • Patent number: 7204935
    Abstract: A method of etching a metallic film on a substrate. This method operates to inject an oxidizing agent through the use of a carrier gas to etch a source metal in the presence of a reducing agent such that the rate of etching can be controlled by controlling the flow rate of the carrier gas, the substrate temperature, the pulse widths of the oxidizing and reducing agents, and the number of etching phases.
    Type: Grant
    Filed: May 4, 2004
    Date of Patent: April 17, 2007
    Assignee: Oregon Health & Science University
    Inventors: Rajendra Solanki, Balu Pathangey
  • Patent number: 7192532
    Abstract: A tungsten silicide layer (104) is etched by plasma etching using Cl2+O2 gas as etching gas. When etching of the tungsten silicide layer (104) is ended substantially, etching gas is switched to Cl2+O2+NF3 and over etching is performed by plasma etching. Etching process is ended under a state where a polysilicon layer (103) formed beneath the tungsten silicide layer (104) is slightly etched uniformly. Residual quantity of the polysilicon layer (103) can be made uniform as compared with prior art and a high quality semiconductor device can be fabricated stably.
    Type: Grant
    Filed: February 27, 2002
    Date of Patent: March 20, 2007
    Assignee: Tokyo Electron Limited
    Inventors: Akiteru Koh, Toshihiro Miura, Takayuki Fukasawa, Akitaka Shimizu, Masato Kushibiki, Asao Yamashita, Fumihiko Higuchi
  • Patent number: 7147794
    Abstract: An optical thin film stack for a dark aperture is deposited using thermal ion-assisted deposition (“IAD”). The IAD provides an energetic deposition of chromium and chromium oxide that results in a dark mirror optical thin film stack with superior etch properties. Edge definition is improved, and the edge profile is controllable by the selection of IAD parameters. An in situ IAD cleaning process can be used to clean the substrate sufficiently so that an intermediate adhesion layer of chromium is not required.
    Type: Grant
    Filed: August 31, 2004
    Date of Patent: December 12, 2006
    Assignee: JDS Uniphase Corporation
    Inventor: Paul J. Gasloli
  • Patent number: 7124493
    Abstract: A cardiac harness for treating congestive heart failure is disclosed. The harness applies elastic, compressive reinforcement on the left ventricle to reduce deleterious wall tension and to resist shape change of the ventricle during the mechanical cardiac cycle. Rather than imposing a dimension beyond which the heart cannot expand, the harness provides no hard limit over the range of diastolic expansion of the ventricle. Instead, the harness follows the contour of the heart throughout diastole and continuously exerts gentle resistance to stretch. Also disclosed is a method of delivering the cardiac harness to the heart minimally invasively.
    Type: Grant
    Filed: December 8, 2004
    Date of Patent: October 24, 2006
    Assignee: Paracor Medical, Inc.
    Inventors: Lilip Lau, Bill Hartigan
  • Patent number: 7096873
    Abstract: A method for manufacturing a group III nitride compound semiconductor device includes irradiating a surface of a wafer with ultraviolet rays to thereby clean a resist residue from the surface of the wafer, the surface including a group III nitride compound semiconductor. The ultraviolet rays cause a reaction of oxygen molecules to form stimulated oxygen atoms having a strong oxidative power at the surface.
    Type: Grant
    Filed: August 24, 2001
    Date of Patent: August 29, 2006
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Toshiya Uemura, Naoki Nakajo
  • Patent number: 7083740
    Abstract: A piezoelectric member and an electrode are formed over a silicon substrate. The piezoelectric member and the electrode are patterned by photolithography. The silicon substrate is etched to form a body. A protective film is formed on at least one surface of the body. Another surface having no protective film thereon is etched to obtain a resonant device. The body is etched in its thickness direction accurately while a resonance frequency of the body is measured. The manufacturing processes allow the resonance frequency and a gap frequency of the resonant device to be adjusted to predetermined values.
    Type: Grant
    Filed: August 20, 2003
    Date of Patent: August 1, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masaya Nakatani, Hirofumi Tajika
  • Patent number: 7077973
    Abstract: Method and apparatus for etching a metal layer disposed on a substrate, such as a photolithographic reticle, are provided. In one aspect, a method is provided for processing a photolithographic reticle including positioning the reticle in a first orientation on a reticle support in a processing chamber, wherein the reticle comprises a metal photomask layer formed on an optically transparent substrate, and a patterned resist material deposited on the metal photomask layer, etching the metal photomask layer in the first orientation, positioning the reticle in at least a second orientation, and etching the metal photomask layer in the at least second orientation.
    Type: Grant
    Filed: April 18, 2003
    Date of Patent: July 18, 2006
    Assignee: Applied Materials, Inc.
    Inventors: Alex Buxbaum, Bjorn Skyberg
  • Patent number: 7074342
    Abstract: A method of manufacturing an optical crystal element of a laser device includes measuring an initial thickness of a crystal substrate formed of YAG or YVO4; introducing a mixture of a fluorine gas and an Ar gas having a ratio of the fluorine gas to the Ar gas in a range of 1:10 to 1:2 into a process chamber holding the crystal substrate; and generating ion beams of the mixture in the process chamber for etching a surface of the crystal substrate for a period time determined from an etching rate depending on the ratio of the mixture and the initial thickness of the crystal substrate. Thickness of the optical crystal element is controlled to a desired thickness. In the method, it is possible to produce the optical crystal element of a microchip laser having functions as a laser medium, a resonator and an etalon.
    Type: Grant
    Filed: February 4, 2005
    Date of Patent: July 11, 2006
    Assignee: Shimadzu Corporation
    Inventor: Ryo Tateno
  • Patent number: 7064078
    Abstract: A method of etching a substrate is provided. The method of etching a substrate includes transferring a pattern into the substrate using a double patterned amorphous carbon layer on the substrate as a hardmask. Optionally, a non-carbon based layer is deposited on the amorphous carbon layer as a capping layer before the pattern is transferred into the substrate.
    Type: Grant
    Filed: January 30, 2004
    Date of Patent: June 20, 2006
    Assignee: Applied Materials
    Inventors: Wei Liu, Jim Zhongyi He, Sang H. Ahn, Meihua Shen, Hichem M'Saad, Wendy H. Yeh, Chistopher D. Bencher
  • Patent number: 7060194
    Abstract: A dry etching method in which a plasma of an etching gas is generated and a magnetic material is dry-etched using a mask material made of a non-organic material, wherein an alcohol having at least one hydroxyl group is used as the etching gas. The alcohol used as the etching gas has one hydroxyl group such as an alcohol selected from the group including methanol (CH3OH), ethanol (C2H5OH) and propanol (C3H7OH).
    Type: Grant
    Filed: July 23, 2004
    Date of Patent: June 13, 2006
    Assignee: ANELVA Corporation
    Inventors: Yoshimitsu Kodaira, Taichi Hiromi
  • Patent number: 7045070
    Abstract: The electrode configuration includes at least one structured layer. A mask is produced on the layer to be structured and the layer is dry etched. The mask is at least slightly etchable by dry etching. The mask contains a metal silicide, a metal nitride or a metal oxide.
    Type: Grant
    Filed: August 24, 2000
    Date of Patent: May 16, 2006
    Assignee: Infineon Technologies AG
    Inventors: Volker Weinrich, Manfred Engelhardt, Werner Pamler, Hermann Wendt
  • Patent number: 7029595
    Abstract: A system and method for exposing and/or milling a copper metallization layer disposed in dielectric that may have an overlying polyimide layer preferably by use of a FIB machine system used for exposing/milling aluminum metallization layers is disclosed. The method includes using a gas assisted (GAS) system for exposing a portion of a copper metal trace disposed in a dielectric and includes the step of removing a portion of the dielectric overlying the portion of the metal trace using the GAS system activated with a dielectric selective chemical that does not have a significant spontaneous (non ion-beam induced) reaction with the metal trace. The system includes a focused ion beam (FIB) machine for exposing/milling a portion of a metal trace disposed in a dielectric substrate wherein the metal trace is copper.
    Type: Grant
    Filed: August 21, 2002
    Date of Patent: April 18, 2006
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Xia (Susan) Li, Eugene A. Delenia, Rosalinda M. Ring
  • Patent number: 7025896
    Abstract: Ruthenium, osmium and their oxides can be etched simply and rapidly by supplying an atomic oxygen-donating gas, typically ozone, to the aforementioned metals and their oxides through catalysis between the metals and their oxides, and the ozone without any damages to wafers and reactors and application of the catalysis not only to the etching but also to chamber cleaning ensures stable operation of reactors and production of high quality devices.
    Type: Grant
    Filed: June 13, 2003
    Date of Patent: April 11, 2006
    Assignee: Renesas Technology Corp.
    Inventors: Miwako Nakahara, Toshiyuki Arai, Shigeru Ohno, Takashi Yunogami, Sukeyoshi Tsunekawa, Kazuto Watanabe
  • Patent number: 7018548
    Abstract: A high-precision conductive thin film pattern having a high aspect ratio and a method of forming the same are provided. Further, a method of manufacturing a thin film magnetic head, a thin film inductor, and a micro device each including such a conductive thin film pattern is provided. Since a stacked layer structure including two conductive layer patterns formed by plating growth using an underfilm pattern as an electrode film and an intermediate conductive layer pattern sandwiched by the two conductive layer patterns is provided, a thicker conductive thin film pattern is obtained. An intermediate conductive layer covering a first resist frame is formed and, after that, a second resist frame is formed in a position corresponding to the first resist frame. Consequently, without causing inter-mixing, the first and second resist frames can be stacked. Thus, a thicker conductive thin film pattern can be formed easily with high precision.
    Type: Grant
    Filed: July 11, 2003
    Date of Patent: March 28, 2006
    Assignee: TDK Corporation
    Inventor: Akifumi Kamijima
  • Patent number: 7001698
    Abstract: A chromium-containing half-tone phase-shift photomask comprising coarse and dense patterns coexisting in a plane is prepared by a series of pattern-forming steps including forming a resist layer on a photomask blank, exposing and patterning said resist layer, developing, etching said photomask blank and removing said resist layer. Patterns for transferring onto a wafer are formed on the photomask blank by a dry-etching method comprising dry-etching a chromium-containing half-tone phase-shift film utilizing etching gas comprised of mixed gas including (a) reactive ion etching gas, containing an oxygen-containing gas and a halogen-containing gas, and (b) reducing gas added to the gas component (a).
    Type: Grant
    Filed: November 14, 2003
    Date of Patent: February 21, 2006
    Assignees: Ulvac Coating Corporation, Mitsubishi Denki Kabushiki Kaisha
    Inventors: Takaei Sasaki, Noriyuki Harashima, Satoshi Aoyama, Shouichi Sakamoto
  • Patent number: 6984335
    Abstract: Redundantly constrained laminar structures as weak-link mechanisms and a novel method for manufacturing the redundantly constrained laminar structures as weak-link mechanisms are provided. The method for producing the redundantly constrained laminar structures as weak-link mechanisms is carried out by lithographic techniques. A designed pattern is repeatedly chemically etched with a mask to produce a plurality of individual identical units. The units are stacked together to form the laminar structure and are secured together with fasteners. A high quality adhesive can be applied to the sides of the laminar structure to provide the mechanism equivalent to a single piece mechanism. The redundantly constrained laminar structures as weak-link mechanisms of the invention include a stack of a plurality of thin material structures.
    Type: Grant
    Filed: July 14, 2003
    Date of Patent: January 10, 2006
    Assignee: The University of Chicago
    Inventors: Deming Shu, Thomas S. Toellner, E. Ercan Alp
  • Patent number: 6974547
    Abstract: According to a flexible thin film capacitor of the present invention, an adhesive film is formed on a substrate composed of at least one selected from the group consisting of an organic polymer and a metal foil, and an inorganic high dielectric film and metal electrode films are formed thereon. A metal oxide adhesive film can be used as the adhesive film. The adhesive film is formed in contact with the inorganic high dielectric film and at least one of the metal electrode films.
    Type: Grant
    Filed: November 13, 2000
    Date of Patent: December 13, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Naoki Kohara, Taisuke Sawada, Masatoshi Kitagawa
  • Patent number: 6960378
    Abstract: A process for producing microtubes from nanoparticles includes forming a dispersion of the nanoparticles in a liquid phase and freeze-drying the dispersion to produce microtubes. The nanoparticles have surface functionality capable of self-bonding and bonding with the liquid phase during freeze-drying, particularly surface hydroxy functionality.
    Type: Grant
    Filed: June 27, 2003
    Date of Patent: November 1, 2005
    Assignee: Rensselaer Polytechnic Institute
    Inventors: Richard W. Siegel, Linda S. Schadler Feist, Dongling Ma
  • Patent number: 6949200
    Abstract: The magnetic head of the present invention, includes a second magnetic pole (P2 pole) that is fabricated upon a write gap layer that is deposited upon a flat surface. To achieve the flat surface, a P1 pole pedestal is formed upon the P1 pole layer with a sufficient thickness that the induction coil structure can be fabricated beneath the write gap layer. In the preferred embodiment, an etch stop layer is formed upon the P1 pole layer and an ion etching process is utilized to form the induction coil trenches in an etchable material that is deposited upon the etch stop layer. Following the fabrication of the induction coil structure a CMP process is conducted to obtain a polished flat surface upon which to deposit the write gap layer, and the P2 pole is then fabricated upon the flat write gap layer. The magnetic head of the present invention can be reliably fabricated with a more narrow P2 pole tip base width, such that data tracks written by the magnetic head are likewise narrower.
    Type: Grant
    Filed: June 30, 2003
    Date of Patent: September 27, 2005
    Assignee: Hitachi Global Storage Technologies Netherlands, B.V.
    Inventors: Robert E. Fontana, Richard Hsiao, Yuexing Zhao
  • Patent number: 6939472
    Abstract: The present invention teaches a method and apparatus for removing sacrificial materials in fabrications of microstructures using one or more selected spontaneous vapor phase etchants. The selected etchant is fed into an etch chamber containing the microstructure during each feeding cycle of a sequence of feeding cycles until the sacrificial material of the microstructure is exhausted through the chemical reaction between the etchant and the sacrificial material. Specifically, during a first feeding cycle, a first amount of selected spontaneous vapor phase etchant is fed into the etch chamber. At a second feeding cycle, a second amount of the etchant is fed into the etch chamber. The first amount and the second amount of the selected etchant may or may not be the same. The time duration of the feeding cycles are individually adjustable.
    Type: Grant
    Filed: September 17, 2003
    Date of Patent: September 6, 2005
    Assignee: Reflectivity, Inc.
    Inventors: Gregory P. Schaadt, Hongqin Shi
  • Patent number: 6933242
    Abstract: A substrate whose elemental constituents are selected from Groups III and V of the Periodic Table, is provided with pre-defined masked regions. Etching of the substrate comprising the steps of: a) forming a gas containing molecules having at least one methyl group (CH3) linked to nitrogen into a plasma; and b) etching the unmasked regions of the substrate by means of the plasma. For a substrate whose elemental constituents are selected from Groups II and VI of the Periodic Table, the plasma etching gas used is trimethylamine. Since the methyl compound of nitrogen has a lower bond energy than for hydrocarbon mixtures, free methyl radicals are easier to obtain and the gas is more efficient as a methyl source. In addition, compared with hydrocarbon mixtures, reduced polymer formation can be expected due to preferential formation of methyl radicals over polymer-generating hydrocarbon radicals because of the lower bond energy for the former.
    Type: Grant
    Filed: June 21, 2000
    Date of Patent: August 23, 2005
    Assignee: Surface Technology Systems PLC
    Inventors: Anand Srinivasan, Carl-Fredrik Carlstrom, Gunnar Landgren
  • Patent number: 6919168
    Abstract: A method of etching a noble metal electrode layer disposed on a substrate to produce a semiconductor device including a plurality of electrodes separated by a distance equal to or less than about 0.35 ?m and having a noble metal profile equal to or greater than about 80°. The method comprises heating the substrate to a temperature greater than about 150° C., and etching the noble metal electrode layer by employing a high density inductively coupled plasma of an etchant gas comprising a gas selected from the group consisting of nitrogen, oxygen, a halogen (e.g., chlorine), argon, and a gas selected from the group consisting of BCl3, HBr, and SiCl4 mixtures thereof. Masking methods and etching sequences for patterning high density RAM capacitors are also provided.
    Type: Grant
    Filed: January 24, 2002
    Date of Patent: July 19, 2005
    Assignee: Applied Materials, Inc.
    Inventors: Jeng H. Hwang, Steve S. Y. Mak, True-Lon Lin, Chentsau Ying, John W. Schaller
  • Patent number: 6913704
    Abstract: A magnetic head including a dual layer induction coil. Following the deposition of a first magnetic pole (P1) a first induction coil is fabricated. Following a chemical mechanical polishing (CMP) step a layer of etchable insulation material is deposited followed by the fabrication of a second induction coil etching mask. A reactive ion etch process is then conducted to etch the second induction coil trenches into the second etchable insulation material layer. The etching depth is controlled by the width of the trenches in an aspect ratio dependent etching process step. The second induction coil is next fabricated into the second induction coil trenches, preferably utilizing electrodeposition techniques. Thereafter, an insulation layer is deposited upon the second induction coil, followed by the fabrication of a second magnetic pole (P2) upon the insulation layer.
    Type: Grant
    Filed: November 21, 2002
    Date of Patent: July 5, 2005
    Assignee: Hitachi Global Storage Technologies Netherlands, B.V.
    Inventors: Richard Hsiao, Yiping Hsiao
  • Patent number: 6905625
    Abstract: A plasma processing method includes exhausting the interior of a vacuum chamber while supplying gas into the vacuum chamber, and while maintaining the interior of the chamber at a desired pressure. A high-frequency power of 100 kHz to 100 MHz is applied to a coil provided in the vicinity of a dielectric window provided so as to face a substrate placed on a substrate electrode in the vacuum Thus, plasma is generated in the vacuum chamber to process the substrate or a film on the substrate by the generated plasma while particles which tend to move straight from a surface of the substrate or from a surface of the film on the substrate toward a wall surface of the dielectric window inside the vacuum chamber are kept interrupted by a metal plate.
    Type: Grant
    Filed: April 3, 2002
    Date of Patent: June 14, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Tomohiro Okumura, Takayuki Kai, Yoichiro Yashiro
  • Patent number: 6905613
    Abstract: A method for using an organic dielectric as a sacrificial layer for forming suspended or otherwise spaced structures. The use of an organic dielectric has a number of advantages, including allowing use of an organic solvent or etch to remove the sacrificial layer. Organic solvents only remove organic materials, and thus do not affect or otherwise damage non-organic layers such as metal layers. This may reduce or eliminate the need for the rinsing and drying steps often associated with the use of acidic etchants such as Hydrofluoric Acid.
    Type: Grant
    Filed: July 10, 2001
    Date of Patent: June 14, 2005
    Assignee: Honeywell International Inc.
    Inventors: David Gutierrez, Vincent K. Luciani, Mary C. Burgess
  • Patent number: 6884730
    Abstract: In a thin-film magnetic head, a top pole layer for defining the recording track width includes a first layer that touches a recording gap layer, and a second layer located on the first layer. The top pole layer is formed in the following manner. First, a magnetic layer is formed on the recording gap layer. Next, the second layer is formed on the magnetic layer by plating. Using the second layer as a mask, the magnetic layer is selectively etched by reactive ion etching to form the first layer. The reactive ion etching uses an etching gas that contains a halogen type gas and a carbon oxide type gas.
    Type: Grant
    Filed: July 2, 2002
    Date of Patent: April 26, 2005
    Assignees: Headway Technologies, Inc., SAE Magnetics (H.K.), Ltd.
    Inventors: Yoshitaka Sasaki, Hironori Araki, Takehiro Kamigama
  • Patent number: 6872322
    Abstract: A process for etching multiple layers on a substrate 25 in an etching chamber 30 and cleaning a multilayer etchant residue formed on the surfaces of the walls 45 and components of the etching chamber 30. In multiple etching steps, process gas comprising different compositions of etchant gas is used to etch layers on the substrate 25 thereby depositing a compositionally variant etchant residue inside the chamber 30. In one cleaning step, a first cleaning gas is added to the process gas to clean a first residue or to suppress deposition of the first residue onto the chamber surfaces. In a second cleaning step, another residue composition is cleaned off the chamber surfaces using a second cleaning gas composition.
    Type: Grant
    Filed: July 27, 1999
    Date of Patent: March 29, 2005
    Assignee: Applied Materials, Inc.
    Inventors: Waiching Chow, Raney Williams, Thorsten B. Lill, Arthur Y. Chen
  • Patent number: 6846424
    Abstract: A process for removing and/or dry etching noble metal-based material structures, e.g., iridium for electrode formation for a microelectronic device. Etch species are provided by plasma formation involving energization of one or more halogenated organic and/or inorganic substance, and the etchant medium including such etch species and oxidizing gas is contacted with the noble metal-based material under etching conditions. The plasma formation and the contacting of the plasma with the noble metal-based material can be carried out in a downstream microwave processing system to provide processing suitable for high-rate fabrication of microelectronic devices and precursor structures in which the noble metal forms an electrode, or other conductive element or feature of the product article.
    Type: Grant
    Filed: June 5, 2001
    Date of Patent: January 25, 2005
    Assignee: Advanced Technology Materials, Inc.
    Inventors: Thomas H. Baum, Phillip Chen, Frank DiMeo, Jr., Peter C. Van Buskirk, Peter S. Kirlin
  • Patent number: 6843899
    Abstract: Chemical sensors include a flexible substrate, a flexible lower electrode on the flexible substrate, and a patterned flexible dielectric layer on the flexible lower electrode opposite the flexible substrate. A patterned flexible upper electrode also is included on the patterned flexible dielectric layer opposite the flexible lower electrode. The patterned flexible dielectric layer and the patterned flexible upper electrode are patterned to establish a first current flow path between the flexible lower electrode and the patterned flexible upper electrode through the chemical, if present, upon application of voltage between the flexible lower electrode and the patterned flexible upper electrode. The flexible lower electrode also may be patterned to establish a second current flow path between portions of the patterned flexible lower electrode through the chemical, if present, upon application of voltage between the portions of the patterned flexible lower electrodes.
    Type: Grant
    Filed: November 6, 2001
    Date of Patent: January 18, 2005
    Assignee: North Carolina State University
    Inventor: Stefan Ufer
  • Patent number: 6840249
    Abstract: In order to clean a semiconductor device having a dielectric layer deposited on a top surface of a lower metal wiring of the semiconductor device, and a contact hole or a via hole formed in the dielectric layer to expose the lower metal line therethrough, the semiconductor device is located within a radio frequency (RF) cleaning chamber. A gas mixture of HCl and H2O is introduced into the RF cleaning chamber and Ar gas plasma is generated in the RF cleaning chamber to excite HCl gas so that the HCl gas and an excited HCl gas are used to remove carbon radicals and metal particles.
    Type: Grant
    Filed: December 26, 2002
    Date of Patent: January 11, 2005
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Bo Min Seo
  • Patent number: 6774046
    Abstract: A method for minimizing the critical dimension growth of a feature on a semiconductor wafer includes performing an etch operation in a reactor 20 and controlling the temperature of the wafer 26 by controlling the pressure of the gas contacting the backside of the wafer 26 and/or providing a heat source 56 such as for example in the chuck 46 or electrode 28 associated with the wafer 26 in order to heat the wafer 26.
    Type: Grant
    Filed: June 13, 2001
    Date of Patent: August 10, 2004
    Assignee: Tegal Corporation
    Inventors: Stephen P. DeOrnellas, Alferd Cofer, Leslie G. Jerde, Kurt A. Olson, Paritosh Rajora
  • Patent number: 6764606
    Abstract: In a plasma processing apparatus according to the present invention, a gas inlet port and a discharge port are provided on a chamber for introducing and discharging gas into and from the chamber respectively. A sample to be etched is placed on an electrode part, so that a high-frequency power source applies a high-frequency bias to the sample. An electromagnet provided on the periphery of a plasma generation area generates a magnetic field while a waveguide connected to an upper potion of the chamber introduces a microwave into the plasma generation area through a microwave introduction window. Electron cyclotron resonance is excited for the gas for generating plasma. At least a surface of the microwave introduction window exposed to the plasma generation area is made of quartz, while the gas contains fluorine. The apparatus having the aforementioned structure can remove a material adhering to the surface of the microwave introduction window when the sample is etched.
    Type: Grant
    Filed: February 27, 2001
    Date of Patent: July 20, 2004
    Assignee: Tokyo Electron Limited
    Inventor: Toshihiro Yanase
  • Patent number: 6743369
    Abstract: A method of manufacturing an electrode for a secondary battery by depositing a thin film composed of active material on a current collector in which a surface-treated layer such as an antirust-treated layer is formed, including the steps of: removing at least part of the surface-treated layer by etching the surface of the current collector with an ion beam or plasma in order to improve the diffusion of the current collector material into the active material thin film; and depositing the thin film on the surface of the current collector subjected to the etching step.
    Type: Grant
    Filed: December 17, 2001
    Date of Patent: June 1, 2004
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Daizo Jito, Hisaki Tarui
  • Patent number: RE39273
    Abstract: A method for forming a patterned microelectronics layer within a microelectronics fabrication. There is first provided a substrate employed within a microelectronics fabrication. There is then formed over the substrate an oxygen containing plasma etchable microelectronics layer. There is then formed upon the oxygen containing plasma etchable microelectronics layer a hard mask layer. There is then formed upon the hard mask layer a patterned photoresist layer. There is then etched through use of a first anisotropic plasma etch method the hard mask layer to form a patterned hard mask layer while employing the patterned photoresists layer as a first etch mask layer. The first anisotropic plasma etch method employs an etchant gas composition appropriate for etching a hard mask material from which is formed the hard mask layer.
    Type: Grant
    Filed: February 1, 2002
    Date of Patent: September 12, 2006
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Syun-Ming Jang, Ming-Hsin Huang