Etching Silicon Containing Substrate Patents (Class 216/79)
  • Patent number: 8012365
    Abstract: A method of anisotropic plasma etching of a silicon wafer, maintained at a temperature from ?40° C. to ?120° C., comprising alternated and repeated steps of: etching with injection of a fluorinated gas, into the plasma reactor, and passivation with injection of silicon tetrafluoride, SiF4, and of oxygen into the plasma reactor, the flow rate of the gases in the plasma reactor being on the order of from 10% to 25% of the gas flow rate during the etch step.
    Type: Grant
    Filed: April 3, 2008
    Date of Patent: September 6, 2011
    Assignee: STMicroelectronics, SA
    Inventors: Remi Dussart, Philippe Lefaucheux, Xavier Mellhaoui, Lawrence John Overzet, Pierre Ranson, Thomas Tillocher, Mohamed Boufnichel
  • Patent number: 8008209
    Abstract: A technique is described whereby temperature gradients are created within a semiconductor wafer. Temperature sensitive etching and/or deposition processes are then employed. These temperature sensitive processes proceed at different rates in regions with different temperatures. To reduce pinch off in etching processes, a temperature sensitive etch process is selected and a temperature gradient is created between the surface and subsurface of a wafer such that the etching process proceeds more slowly at the surface than deeper in the wafer. This reduces “crusting” of solid reaction products at trench openings, thereby eliminating pinch off in many cases. Similar temperature-sensitive deposition processes can be employed to produce void-free high aspect ratio conductors and trench fills.
    Type: Grant
    Filed: October 24, 2007
    Date of Patent: August 30, 2011
    Assignee: International Business Machines Corporation
    Inventors: Michael R. Sievers, Kaushik A. Kumar, Andres F. Munoz, Richard Wise
  • Patent number: 7988873
    Abstract: A method of forming a mask pattern for fabricating a semiconductor device. A first region and a second region, having an intersecting third region, are defined in the semiconductor substrate. An inorganic mask layer is etched in the first region to a predetermined thickness, and etched in the second region to another predetermined thickness. While the inorganic mask layer is etched in the first and second region, an organic mask layer is exposed in the third region. The organic mask layer exposed in the third region is removed to form a mask pattern. Consequently, double exposure is performed using the organic mask layer and the inorganic mask layer, so that a fine feature size that closely follows a desired layout can be formed, damage to the organic mask layer by ashing is prevented, and adhesiveness between the organic mask layer and the inorganic mask layer can be improved.
    Type: Grant
    Filed: June 26, 2007
    Date of Patent: August 2, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyong-Soo Kim, Sang-Hyeop Lee
  • Patent number: 7981303
    Abstract: A novel silicon micromirror structure for improving image fidelity in laser pattern generators is presented. In some embodiments, the micromirror is formed from monocrystalline silicon. Analytical- and finite element analysis of the structure as well as an outline of a fabrication scheme to realize the structure are given. The spring constant of the micromirror structure can be designed independently of the stiffness of the mirror-surface. This makes it possible to design a mirror with very good planarity, resistance to sagging during actuation, and it reduces influence from stress in reflectivity-increasing multilayer coatings.
    Type: Grant
    Filed: September 19, 2008
    Date of Patent: July 19, 2011
    Assignee: Micronic MyData AB
    Inventors: Martin Bring, Peter Enoksson
  • Patent number: 7981308
    Abstract: A method of etching a device in one embodiment includes providing a silicon carbide substrate, forming a silicon nitride layer on a surface of the silicon carbide substrate, forming a silicon carbide layer on a surface of the silicon nitride layer, forming a silicon dioxide layer on a surface of the silicon carbide layer, forming a photoresist mask on a surface of the silicon dioxide layer, and etching the silicon dioxide layer through the photoresist mask.
    Type: Grant
    Filed: December 31, 2007
    Date of Patent: July 19, 2011
    Assignee: Robert Bosch GmbH
    Inventor: Gary Yama
  • Patent number: 7981305
    Abstract: A method for forming high density emission elements and field emission displays formed according to the method. Oxygen and a silicon etchant are introduced into a plasma etching chamber containing a silicon substrate. The oxygen reacts with the silicon surface to form regions of silicon dioxide, while the silicon etchant etches the silicon to form the emission elements. The silicon dioxide regions mask the underlying silicon during the silicon etch process. High density and high aspect ratio emission elements are formed without using photolithographic processes. The emission elements formed according to the present invention provide a more uniform emission of electrons. Further, a display incorporating emission elements formed according to the present invention provides increased brightness. The reliability of the display is increased due to the use of a plurality of emission elements to supply electrons for stimulating the phosphor substrate material to produce the image.
    Type: Grant
    Filed: July 20, 2009
    Date of Patent: July 19, 2011
    Assignee: Agere Systems Inc.
    Inventors: Seong Jin Koh, Gerald W. Gibson, Jr.
  • Patent number: 7977249
    Abstract: Methods for removing silicon nitride and elemental silicon during contact preclean process involve converting these materials to materials that are more readily etched by fluoride-based etching methods, and subsequently removing the converted materials by a fluoride-based etch. Specifically, silicon nitride and elemental silicon may be treated with an oxidizing agent, e.g., with an oxygen-containing gas in a plasma, or with O2 or O3 in the absence of plasma to produce a material that is more rich in Si—O bonds and is more easily etched with a fluoride-based etch. Alternatively, silicon nitride or elemental silicon may be doped with a number of doping elements, e.g., hydrogen, to form materials which are more easily etched by fluoride based etches. The methods are particularly useful for pre-cleaning contact vias residing in a layer of silicon oxide based material because they minimize the unwanted increase of critical dimension of contact vias.
    Type: Grant
    Filed: March 7, 2008
    Date of Patent: July 12, 2011
    Assignee: Novellus Systems, Inc.
    Inventors: Xinye Liu, Yu Yang, Chiukin Steven Lai
  • Patent number: 7973373
    Abstract: A microminiature moving device has disposed on a single-crystal silicon substrate movable elements such as a movable rod and a movable comb electrode that are displaceable in parallel to the substrate surface and stationary parts that are fixedly secured to the single -crystal silicon substrate with an insulating layer sandwiched between. Depressions are formed in the surface regions of the single-crystal silicon substrate where no stationary parts are present and the movable parts are positioned above the depressions. The depressions form gaps large enough to prevent foreign bodies from causing shorts and malfunctioning of the movable parts.
    Type: Grant
    Filed: December 1, 2008
    Date of Patent: July 5, 2011
    Assignee: Japan Aviation Electronics Industry Limited
    Inventors: Keiichi Mori, Yoshichika Kato, Satoshi Yoshida, Kenji Kondou, Yoshihiko Hamada, Osamu Imaki
  • Patent number: 7959819
    Abstract: The present invention provides a method and an apparatus for reducing aspect ratio dependent etching that is observed when plasma etching deep trenches in a semiconductor substrate through an alternating deposition/etch process. A plurality of different sized features on the substrate are monitored in real time during the alternating deposition/etch process. Then, based on the information received from the monitor, at least one process parameter is adjusted in the alternating deposition/etch process to achieve equivalent etch depths of at least two different sized features on the substrate.
    Type: Grant
    Filed: June 23, 2005
    Date of Patent: June 14, 2011
    Inventors: Shouliang Lai, David Johnson, Russell Westerman
  • Patent number: 7955440
    Abstract: After a water film is formed on a wafer front surface in a chamber, the water film is supplied sequentially with an oxidizing component of an oxidation gas, an organic acid component of an organic acid mist, an HF component of an HF gas, the organic acid mist, and the oxidizing component of the oxidation gas. As a result, the HF component and the organic acid component provide cleaning effect on the wafer surface, and a concentration of the cleaning components in the water film within a wafer surface can be even.
    Type: Grant
    Filed: November 21, 2008
    Date of Patent: June 7, 2011
    Assignee: Sumco Corporation
    Inventors: Shigeru Okuuchi, Kazushige Takaishi
  • Patent number: 7951299
    Abstract: A method of fabricating a microresonator is disclosed. Initially, silica is deposited on a substrate, and the substrate is etched to form a pillar, the top portion of which supports the silica. The microresonator is then formed from the silica. Next, the pillar is etched to reduce the overall diameter of the top portion of the pillar so that the microresonator can be disengaged from the pillar.
    Type: Grant
    Filed: February 21, 2008
    Date of Patent: May 31, 2011
    Assignee: California Institute of Technology
    Inventors: Mani Hossein-Zadeh, Kerry J. Vahala
  • Patent number: 7938977
    Abstract: A torsional MEMS device is disclosed. The torsional MEMS device includes a support structure, a platform, and at least two hinges, which connects the platform to the support structure. The platform has an active area and a non-active area. A plurality of sacrificial elements is disposed in the non-active area. If the resonant frequency of the torsional MEMS device is less than a predetermined standard resonant frequency of the torsional MEMS device, at least one sacrificial element is removed to reduce the total mass of the torsional MEMS device, and so as to increase the resonant frequency of the torsional MEMS device.
    Type: Grant
    Filed: February 10, 2010
    Date of Patent: May 10, 2011
    Assignee: Touch Micro-System Technology Corp.
    Inventors: Long-Sun Huang, Hsien-Lung Ho
  • Patent number: 7939447
    Abstract: A method for depositing a single crystalline silicon film comprises: providing a substrate disposed within a chamber; introducing to the chamber under chemical vapor deposition conditions a silicon precursor, a chlorine-containing etchant and an inhibitor source for decelerating reactions between the silicon precursor and the chlorine-containing etchant; and selectively depositing a doped crystalline Si-containing film onto the substrate.
    Type: Grant
    Filed: October 26, 2007
    Date of Patent: May 10, 2011
    Assignee: ASM America, Inc.
    Inventors: Matthias Bauer, Pierre Tomasini
  • Patent number: 7931820
    Abstract: A dry etching gas that comprises a compound having a CF3CF fragment directly bonded to a double bond (provided that the compound is exclusive of CF3CF?CFCF?CF2). Said dry etching gas permits the formation of a pattern such as a contact hole with a high aspect ratio.
    Type: Grant
    Filed: September 5, 2001
    Date of Patent: April 26, 2011
    Assignee: Daikin Industries, Ltd.
    Inventors: Masataka Hirose, Shingo Nakamura, Mitsushi Itano, Hirokazu Aoyama
  • Patent number: 7931819
    Abstract: There is provided a method for pattern formation, including a step of coating a composition comprising a block copolymer, a silicon compound, and a solvent for dissolving these components onto an object to form a layer of the composition on the object, a step of subjecting the layer of the composition to self-organization of the block copolymer to cause phase separation into a first phase, in which the silicon compound is localized, having higher etching resistance by heat treatment or/and oxygen plasma treatment, and a second phase comprising a polymer phase and having lower etching resistance by heat treatment or/and oxygen plasma treatment, and thereby forming a pattern layer with a fine pattern, and a step of etching the object using as a mask the thus formed pattern layer.
    Type: Grant
    Filed: March 23, 2007
    Date of Patent: April 26, 2011
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Naoko Kihara, Hiroyuki Hieda
  • Patent number: 7910010
    Abstract: An inkjet head having an electrostatic actuator and a manufacturing method of the same are disclosed. The inkjet head having an electrostatic actuator, comprising a stator, on which is formed a plurality of comb pattern shaped first protrusion parts and second protrusion parts in both directions, and a rotor consisting of a first component and a second component, the ends of which join with the diaphragm, wherein a third protrusion part is formed on the first component, facing the first protrusion parts and meshing with the first protrusion parts without contact; and a fourth protrusion part is formed on the second component, facing the second protrusion parts and meshing with the second protrusion parts without contact, may decrease the size of the head composition and may increase the electrostatic force so that a large displacement may be obtained with little voltage to increase the ink discharge pressure.
    Type: Grant
    Filed: January 13, 2009
    Date of Patent: March 22, 2011
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Young-Jae Kim, Jae-Seong Lim, Sung-Il Oh
  • Patent number: 7892982
    Abstract: A method for forming fine patterns of a semiconductor device includes forming an etching film on a substrate having first and second areas, forming first mask patterns on the substrate to have a first pattern density in the first area and a second pattern density in the second area, forming first capping patterns between the first mask patterns, forming second capping patterns between the first mask patterns, such that recess areas are formed between second capping patterns, and such that a first etching pattern is defined to include the first and second capping patterns, forming second mask patterns in the recess areas to include the first and second mask patterns, removing one of the first and second etching patterns, such that a single etching pattern is remaining on the substrate, and etching the etching film using the remaining etching pattern as an etch mask to form etching film patterns.
    Type: Grant
    Filed: October 30, 2007
    Date of Patent: February 22, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Doo-youl Lee, Pan-suk Kwak, Sung-gon Jung, Jung-hyeon Lee, Suk-joo Lee, Cha-won Koh, Ji-young Lee
  • Patent number: 7875199
    Abstract: The method for generating radicals comprises: feeding F2 gas or a mixed gas of F2 gas and an inert gas into a chamber of which the inside is provided with a carbon material, supplying a carbon atom from the carbon material by applying a target bias voltage to the carbon material, and thereby generating high density radicals, wherein the ratio of CF3 radical, CF2 radical and CF radical is arbitrarily regulated by controlling the target bias voltage applied to the carbon material while measuring the infrared absorption spectrum of radicals generated inside the chamber.
    Type: Grant
    Filed: November 9, 2004
    Date of Patent: January 25, 2011
    Assignee: Showa Denko K.K.
    Inventors: Toshio Goto, Masaru Hori, Mikio Nagai
  • Patent number: 7867402
    Abstract: A method realizes a multispacer structure including an array of spacers having same height. The method includes realizing, on a substrate, a sacrificial layer of a first material; b) realizing, on the sacrificial layer, a sequence of mask spacers obtained by SnPT, which are alternately obtained in at least two different materials; c) chemically etching one of the two different materials with selective removal of the mask spacers of this etched material and partial exposure of the sacrificial layer; d) chemically and/or anisotropically etching the first material with selective removal of the exposed portions of the sacrificial layer; e) chemically etching the other one of the two different materials with selective removal of the mask spacers of this etched material and obtainment of the multispacer structure.
    Type: Grant
    Filed: October 5, 2006
    Date of Patent: January 11, 2011
    Assignee: STMicroelectronics S.r.l.
    Inventors: Danilo Mascolo, Gianfranco Cerofolini
  • Patent number: 7862731
    Abstract: To form an isolation structure in a semiconductor substrate, at least two trenches are formed with a rib therebetween in the semiconductor substrate, and then the semiconductor material in the area of the trenches and particularly the rib is converted to an electrically insulating material. For example, this is accomplished by thermal oxidation of silicon semiconductor material of the rib.
    Type: Grant
    Filed: September 12, 2003
    Date of Patent: January 4, 2011
    Assignee: Conti Temic microelectronic GmbH
    Inventors: Matthias Aikele, Albert Engelhardt, Marcus Frey, Bernhard Schmid, Helmut Seidel
  • Patent number: 7857982
    Abstract: The invention includes methods of etching features into substrates. A plurality of hard mask layers is formed over material of a substrate to be etched. A feature pattern is formed in such layers. A feature is etched only partially into the substrate material using the hard mask layers with the feature pattern therein as a mask. After the partial etching, at least one of the hard mask layers is etched selectively relative to the substrate material and remaining of the hard mask layers. After etching at least one of the hard mask layers, the feature is further etched into the substrate material using at least an innermost of the hard mask layers as a mask. After the further etching, the innermost hard mask layer and any hard mask layers remaining thereover are removed from the substrate, and at least a portion of the feature is incorporated into an integrated circuit.
    Type: Grant
    Filed: July 19, 2005
    Date of Patent: December 28, 2010
    Assignee: Micron Technology, Inc.
    Inventors: Mirzafer Abatchev, Gurtej S. Sandhu, Aaron R. Wilson, Tony Schrock
  • Patent number: 7842618
    Abstract: A method for forming a memory device is provided. A nitride layer is formed over a substrate. The nitride layer and the substrate are etched to form a trench. The nitride layer is trimmed on opposite sides of the trench to widen the trench within the nitride layer. The trench is filled with an oxide material. The nitride layer is stripped from the memory device, forming a mesa above the trench.
    Type: Grant
    Filed: August 1, 2005
    Date of Patent: November 30, 2010
    Assignees: Spansion LLC, Advanced Micro Devices, Inc.
    Inventors: Unsoon Kim, Angela T. Hui, Yider Wu, Kuo-Tung Chang, Hiroyuki Kinoshita
  • Patent number: 7842617
    Abstract: The present invention is an etching method for performing an etching process in the presence of a plasma on an object to be processed in which a layer to be etched made of a tungsten-containing material is formed on a base layer made of a silicon-containing material in a process vessel capable of being evacuated to create therein a vacuum, wherein a chlorine-containing gas, an oxygen-containing gas, and a nitrogen-containing gas are used as an etching gas for performing the etching process.
    Type: Grant
    Filed: November 18, 2005
    Date of Patent: November 30, 2010
    Assignee: Tokyo Electron Limited
    Inventor: Tetsuya Nishizuka
  • Patent number: 7833427
    Abstract: Methods and devices for selective etching in a semiconductor process are shown. Chemical species generated in a reaction chamber provide both a selective etching function and concurrently form a protective coating on other regions. An electron beam provides activation to selective chemical species. In one example, reactive species are generated from a halogen and carbon containing gas source. Addition of other gasses to the system can provide functions such as controlling a chemistry in a protective layer during a processing operation.
    Type: Grant
    Filed: August 14, 2006
    Date of Patent: November 16, 2010
    Assignee: Micron Technology, Inc.
    Inventors: Neal R. Rueger, Mark J. Williamson, Gurtej S. Sandhu
  • Patent number: 7833430
    Abstract: A method of making a microstructure with thin wall portions (T1-T3) includes a step of performing a first etching process to a material substrate having a laminate structure including a first conductive layer (11) and a second conductive layer (12) having a thickness of the thin wall portions (T1-T3), where the etching is performed from the side of the first conductive layer (11) thereby forming in the second conductive layer (12) pre thin wall portions (T1?-T3?) which has a pair of side surfaces apart from each other in an in-plane direction of the second conductive layer (12) and contact the first conductive layer (11). The method also includes a step of performing a second etching process from the side of the first conductive layer (11) for removing part of the first conductive layer (11) contacting the pre thin wall portions (T1?-T3?) to form the thin wall portions.
    Type: Grant
    Filed: October 25, 2005
    Date of Patent: November 16, 2010
    Assignee: Fujitsu Limited
    Inventors: Xiaoyu Mi, Norinao Kouma, Osamu Tsuboi, Masafumi Iwaki, Hisao Okuda, Hiromitsu Soneda, Satoshi Ueda, Ippei Sawaki
  • Patent number: 7829364
    Abstract: A suspension microstructure and its fabrication method, in which the method comprises the steps of: forming at least one insulation layer with inner micro-electro-mechanical structures on an upper surface of a silicon substrate, the micro-electro-mechanical structure includes at least one microstructure and a plurality of metal circuits that are independent from each other, the micro-electro-mechanical structures have an exposed portion on the surface of the insulation layer, and the exposed portion is provided with through holes or stacked metal-via layers correspondingly to the predetermined etching spaces of the micro-electro-mechanical structures, the above predetermined etching spaces and the stacked metal-via layers only penetrate the insulation layer; forming a photoresist with an opening on the upper surface of the exposed portion, and the opening of the photoresist is located outside all the through holes or the stacked metal-via layers; subsequently, conducting etching to realize the suspension of t
    Type: Grant
    Filed: October 2, 2008
    Date of Patent: November 9, 2010
    Assignee: MEMSMART Semiconductor Corporation
    Inventor: Siew-Seong Tan
  • Patent number: 7828983
    Abstract: The invention provides a process for texturing a surface of a semiconductor material, the process comprising: applying a layer of a protective substance on said surface wherein said layer is sufficiently thin that it has a plurality of apertures therethrough; and contacting said layer and said semiconductor material with an etchant capable of etching said semiconductor material faster than said protective substance, said etchant making contact with said semiconductor material at least through said apertures, for a time and under conditions in which said semiconductor material is etched by said etchant in the vicinity of said apertures to produce a textured surface on said semiconductor material, but said protective substance is substantially unetched.
    Type: Grant
    Filed: November 29, 2002
    Date of Patent: November 9, 2010
    Assignee: Transform Solar Pty Ltd
    Inventors: Klaus Johannes Weber, Andrew William Blakers
  • Patent number: 7824561
    Abstract: A method for manufacturing a probe structure is disclosed. In accordance with the method, two semiconductor substrates having different crystal directions are bonded and selectively etched utilizing an etch selectivity due to the different crystal directions to form a probe tip region and a probe beam region. A cantilever structure for a probe card is formed by filling the probe tip region and the probe beam region with a conductive material.
    Type: Grant
    Filed: July 25, 2007
    Date of Patent: November 2, 2010
    Assignee: Will Technology Co., Ltd.
    Inventors: Bong Hwan Kim, Bum Jin Park, Jong Bok Kim, Chi Woo Lee
  • Patent number: 7815815
    Abstract: A surface processing method includes supporting a wafer in a vacuum chamber and generating a plasma in a confined portion of the chamber over only a selected portion of the wafer to thereby perform a surface processing treatment (e.g., an ashing process) on the selected portion of the wafer. While the plasma is being generated, the wafer and the confined portion of the chamber are displaced with respect to one another to thereby perform the surface processing treatment on a second selected portion of the wafer.
    Type: Grant
    Filed: August 1, 2006
    Date of Patent: October 19, 2010
    Assignees: Sony Corporation, Sony Electronics Inc.
    Inventor: Koji Miyata
  • Patent number: 7811941
    Abstract: A method and a device suitable for implementing this method for etching a substrate (10), a silicon body in particular, using an inductively coupled plasma (14) are proposed. For this purpose, a radio-frequency electromagnetic alternating field is generated with an ICP source (13), the alternating field generating an inductively coupled plasma (14) of reactive particles in a reactor (15). The inductively coupled plasma (14) arises by the action of the radio-frequency electromagnetic alternating field on a reactive gas. Furthermore, a device is provided with which a plasma power injected into the inductively coupled plasma (14) via the radio-frequency electromagnetic alternating field with the ICP source (13) is capable of being pulsed so that at least from time to time a pulsed radio-frequency power can be injected into the inductively coupled plasma (14) as a pulsed radio-frequency power.
    Type: Grant
    Filed: June 6, 2000
    Date of Patent: October 12, 2010
    Assignee: Robert Bosch GmbH
    Inventors: Volker Becker, Franz Laermer, Andrea Schilp
  • Publication number: 20100243951
    Abstract: A negative electrode material comprising composite particles having silicon nano-particles dispersed in silicon oxide is suited for use in nonaqueous electrolyte secondary batteries. The silicon nano-particles have a size of 1-100 nm. The composite particles contain oxygen and silicon in a molar ratio: 0<O/Si<1.0. Using the negative electrode material, a lithium ion secondary battery can be fabricated which features high 1st cycle charge/discharge efficiency, capacity, and cycle performance.
    Type: Application
    Filed: March 24, 2010
    Publication date: September 30, 2010
    Applicant: Shin-Etsu Chemical Co., Ltd.
    Inventors: Kohichiro WATANABE, Meguru Kashida, Hirofumi Fukuoka
  • Patent number: 7794610
    Abstract: The invention relates to a method for making an actuation system for an optical component comprising: etching of a first face of a component, to form pads on it, etching of a second face of the component, to expose a membrane made of the same material as the pads, production of the actuation means of the pads and the membrane.
    Type: Grant
    Filed: December 23, 2004
    Date of Patent: September 14, 2010
    Assignee: Commissariat a l'Energie Atomique
    Inventors: Claire Divoux, Marie-Helene Vaudaine, Thierry Enot
  • Patent number: 7794617
    Abstract: A plasma etching method includes the step of: etching a silicon layer of a target object by using a plasma generated from a processing gas containing a fluorocarbon gas, a hydrofluorocarbon gas, a rare gas and an O2 gas and by employing a patterned resist film as a mask. The target object includes the silicon layer whose main component is silicon and the patterned resist film formed over the silicon layer.
    Type: Grant
    Filed: March 22, 2007
    Date of Patent: September 14, 2010
    Assignee: Tokyo Electron Limited
    Inventors: Akihiro Kikuchi, Takashi Tsunoda, Yuichiro Sakamoto
  • Patent number: 7785486
    Abstract: Additional variants of the method of etching structures into an etching body, in particular recesses in a silicon body that are laterally defined in a precise manner by an etching mask, using a plasma, is described. In addition, the use of this method in the introduction of structures, in particular trenches having a high aspect ratio, into a dielectric layer or a dielectric base body and in a layer of silicon is described, isotropic underetching and/or isotropic, sacrificial-layer etching, in particular using fluorine radicals or a highly oxidizing fluorine compound such as ClF3, being performed after the production of the structures in at least some areas in the case of the layer made of silicon.
    Type: Grant
    Filed: September 30, 2003
    Date of Patent: August 31, 2010
    Assignee: Robert Bosch GmbH
    Inventors: Andrea Urban, Franz Laermer, Klaus Breitschwerdt, Volker Becker
  • Patent number: 7780862
    Abstract: In one implementation, a method is provided capable of etching a wafer to form devices including a high-k dielectric layer. The method includes etching an upper conductive material layer in a first plasma chamber with a low cathode temperature, transferring the wafer to a second chamber without breaking vacuum, etching a high-k dielectric layer in the second chamber, and transferring the wafer from the second chamber to the first plasma chamber without breaking vacuum. A lower conductive material layer is etched with a low cathode temperature in the first chamber. In one implementation, the high-k dielectric etch is a plasma etch using a high temperature cathode. In another implementation, the high-k dielectric etch is a reactive ion etch.
    Type: Grant
    Filed: March 21, 2006
    Date of Patent: August 24, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Meihua Shen, Xikun Wang, Wei Liu, Yan Du, Shashank Deshmukh
  • Publication number: 20100176087
    Abstract: A photomask is manufactured by providing a photomask blank comprising a transparent substrate, a phase shift film, and a light-shielding film, the phase shift film and the light-shielding film including silicon base material layers, a N+O content in the silicon base material layer of the phase shift film differing from that of the light-shielding film, and chlorine dry etching the blank with oxygen-containing chlorine gas in a selected O/C1 ratio for selectively etching away the silicon base material layer of the light-shielding film.
    Type: Application
    Filed: January 14, 2010
    Publication date: July 15, 2010
    Inventors: Shinichi Igarashi, Hideo Kaneko, Yukio Inazuki, Kazuhiro Nishikawa
  • Patent number: 7749915
    Abstract: A method of protecting a polymeric layer from contamination by a photoresist layer. The method includes: (a) forming a polymeric layer over a substrate; (b) forming a non-photoactive protection layer over the polymeric layer; (c) forming a photoresist layer over the protection layer; (d) exposing the photoresist layer to actinic radiation and developing the photoresist layer to form a patterned photoresist layer, thereby exposing regions of the protection layer; (e) etching through the protection layer and the polymeric layer where the protection layer is not protected by the patterned photoresist layer; (f) removing the patterned photoresist layer in a first removal process; and (g) removing the protection layer in a second removal process different from the first removal process.
    Type: Grant
    Filed: March 31, 2008
    Date of Patent: July 6, 2010
    Assignee: International Business Machines Corporation
    Inventors: Ute Drechsler, Urs T. Duerig, Jane Elizabeth Frommer, Bernd W. Gotsmann, James Lupton Hedrick, Armin W. Knoll, Tobias Kraus, Robert Dennis Miller
  • Patent number: 7744769
    Abstract: The invention relates to a gas for removing deposits by a gas-solid reaction. This gas includes a hypofluorite that is defined as being a compound having at least one OF group in the molecule. Various deposits can be removed by the gas, and the gas can easily be made unharmful on the global environment after the removal of the deposits, due to the use of a hypofluorite. The gas may be a cleaning gas for cleaning, for example, the inside of an apparatus for producing semiconductor devices. This cleaning gas comprises 1-100 volume % of the hypofluorite. Alternatively, the gas of the invention may be an etching gas for removing an unwanted portion of a film deposited on a substrate. The unwanted portion can be removed by this etching gas as precisely as originally designed, due to the use of a hypofluorite. The invention further relates to a method for removing a deposit by the gas.
    Type: Grant
    Filed: October 6, 2006
    Date of Patent: June 29, 2010
    Assignee: Central Glass Company, Limited
    Inventors: Isamu Mouri, Tetsuya Tamura, Mitsuya Ohashi
  • Patent number: 7732339
    Abstract: An organic/inorganic hybrid film represented by SiCx- HyOz (x>0, y?0, z>0) is plasma-etched with an etching gas containing fluorine, carbon and nitrogen. During the etching, a carbon component is eliminated from the surface portion of the organic/inorganic hybrid film due to the existence of the nitrogen in the etching gas, to thereby reform the surface portion. The reformed surface portion is nicely plasma-etched with the etching gas containing fluorine and carbon.
    Type: Grant
    Filed: May 18, 2005
    Date of Patent: June 8, 2010
    Assignee: Panasonic Corporation
    Inventors: Kenshi Kanegae, Shinichi Imai, Hideo Nakagawa
  • Patent number: 7718081
    Abstract: A method of etching a substrate is provided. The method of etching a substrate includes transferring a pattern into the substrate using a double patterned amorphous carbon layer on the substrate as a hardmask. Optionally, a non-carbon based layer is deposited on the amorphous carbon layer as a capping layer before the pattern is transferred into the substrate.
    Type: Grant
    Filed: June 2, 2006
    Date of Patent: May 18, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Wei Liu, Jim Zhongyi He, Sang H. Ahn, Meihua Shen, Hichem M'Saad, Wendy H. Yeh, Christopher D. Bencher
  • Patent number: 7718079
    Abstract: A method for depositing dielectric material into gaps between wiring lines in the formation of a semiconductor device includes the formation of a cap layer and the formation of gaps into which high density plasma chemical vapor deposition (HDPCVD) dielectric material is deposited. First and second antireflective coatings may be formed on the wiring line layer, the first and second antireflective coatings being made from different materials. Both antireflective coatings and the wiring line layer are etched through to form wiring lines separated by gaps. The gaps between wiring lines may be filled using high density plasma chemical vapor deposition.
    Type: Grant
    Filed: November 20, 2001
    Date of Patent: May 18, 2010
    Assignee: United Microelectronics Corporation
    Inventors: Chih-Chien Liu, Ta-Shan Tseng, Wen Bin Shieh, Juan-Yuan Wu, Water Lur, Shih-Wei Sun
  • Patent number: 7718080
    Abstract: Methods and devices for selective etching in a semiconductor process are shown. Chemical species generated in a reaction chamber provide both a selective etching function and concurrently form a protective coating on other regions. An electron beam provides activation to selective chemical species. In one example, reactive species are generated from a plasma source to provide an increased reactive species density. Addition of other gasses to the system can provide functions such as controlling a chemistry in a protective layer during a processing operation. In one example an electron beam array such as a carbon nanotube array is used to selectively expose a surface during a processing operation.
    Type: Grant
    Filed: August 14, 2006
    Date of Patent: May 18, 2010
    Assignee: Micron Technology, Inc.
    Inventors: Neal R. Rueger, Mark J. Williamson, Gurtej S. Sandhu
  • Patent number: 7704402
    Abstract: An optical element manufacturing method includes: disposing a light-shielding layer (14) that includes at least an Si layer as an uppermost layer, on a substrate (12) used as a base member, forming an optical aperture (14a) at the light-shielding layer (14) and forming a fine recession/projection structure (MR) at a surface of the uppermost layer through dry etching.
    Type: Grant
    Filed: October 24, 2005
    Date of Patent: April 27, 2010
    Assignee: Nikon Corporation
    Inventors: Yutaka Hamamura, Kiyoshi Kadomatsu, Noboru Amemiya
  • Patent number: 7695632
    Abstract: A method for forming a feature in an etch layer is provided. A photoresist layer is formed over the etch layer. The photoresist layer is patterned to form photoresist features with photoresist sidewalls. A control layer is formed over the photoresist layer and bottoms of the photoresist features. A conformal layer is deposited over the sidewalls of the photoresist features and control layer to reduce the critical dimensions of the photoresist features. Openings in the control layer are opened with a control layer breakthrough chemistry. Features are etched into the etch layer with an etch chemistry, which is different from the control layer break through chemistry, wherein the control layer is more etch resistant to the etch with the etch chemistry than the conformal layer.
    Type: Grant
    Filed: May 31, 2005
    Date of Patent: April 13, 2010
    Assignee: Lam Research Corporation
    Inventors: Sangheon Lee, Dae-Han Choi, Jisoo Kim, Peter Cirigliano, Zhisong Huang, Robert Charatan, S.M. Reza Sadjadi
  • Patent number: 7682985
    Abstract: A method for etching a stack with at least one silicon germanium layer over a substrate in a processing chamber is provided. A silicon germanium etch is provided. An etchant gas is provided into the processing chamber, wherein the etchant gas comprises HBr, an inert diluent, and at least one of O2 and N2. The substrate is cooled to a temperature below 40° C. The etching gas is transformed to a plasma to etch the silicon germanium layer.
    Type: Grant
    Filed: March 17, 2004
    Date of Patent: March 23, 2010
    Assignee: Lam Research Corporation
    Inventors: C. Robert Koemtzopoulos, Yoko Yamaguchi Adams, Yoshinori Miyamoto, Yousun Kim Taylor
  • Patent number: 7670496
    Abstract: A structural body comprising a substrate and a structural layer formed on the substrate through an air gap in which the structural layer functions as a micro movable element is produced by a process comprising a film-deposition step of successively forming a sacrificial layer made of a silicon oxide film and the structural layer on the substrate, an air gap-forming step of removing the sacrificial layer by etching with a treating fluid to form the air gap between the substrate and the structural layer, and a cleaning step. By using a supercritical carbon dioxide fluid containing a fluorine compound, a water-soluble organic solvent and water as the treating fluid, the sacrificial layer is removed in a short period of time with a small amount of the treating fluid without any damage to the structural body.
    Type: Grant
    Filed: December 15, 2004
    Date of Patent: March 2, 2010
    Assignees: SONY Corporation, Mitsubishiki Gas Chemical Company, Inc.
    Inventors: Koichiro Saga, Hiroya Watanabe, Tomoyuki Azuma
  • Patent number: 7666319
    Abstract: A spatial light modulator structure is fabricated by forming moveable reflecting elements through plasma etching of silicon in a chlorine ambient. In accordance with one particular embodiment, a mirror comprising single crystal silicon is released from the surrounding material by plasma etching in an ambient including chlorine (Cl2), sulfur hexafluoride (SF6), and boron trichloride (BCl3). Cl2 serves as a source of reactive chlorine etching species for the plasma. SF6 provides a source of fluorine, a reactive species enhancing the rate of etching single crystal silicon. BCl3 provides boron, which becomes incorporated on the surface of the etched single crystal silicon as a passivation layer controlling etch profile. Plasma etching of the single crystal silicon to release the mirrors takes place in the absence of oxygen, in order to avoid unwanted formation of silicon oxide residue that can adversely affect mechanical and optical properties of the resulting device.
    Type: Grant
    Filed: November 1, 2005
    Date of Patent: February 23, 2010
    Assignee: Miradia Inc.
    Inventor: Kegang Huang
  • Patent number: 7648641
    Abstract: A method of the present invention is presented for deep etching of features on a surface. In one embodiment, the method includes providing a substrate having a surface selected to undergo a feature etching process and coating the substrate surface with a protective layer and an imprintable layer. The coated substrate is then subjected to a feature imprinting and etching process. Subsequent to the feature etching process, exposed portions of the protective layer are removed, exposing a well-defined, topographically patterned substrate. In addition, an apparatus for undergoing a feature etching process is disclosed. The apparatus comprises a substrate, an imprintable layer selected to undergo an imprinting process, and a protective layer positioned between the substrate and the imprintable layer.
    Type: Grant
    Filed: June 17, 2005
    Date of Patent: January 19, 2010
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventors: Thomas Robert Albrecht, Henry Hung Yang
  • Patent number: 7641806
    Abstract: By steps of forming first masks 13, 14 each having a first pattern on a first surface of a substrate 11 on which a membrane is to be formed, etching the first surface of the substrate 11 by using the first masks 13, 14 to forming first support beams 15, positioning a second surface of the substrate 11 on the basis of the first pattern on the first surface, forming a second mask 17 having a second pattern on the second surface of the substrate 11 based on the alignment and etching the second surface of the substrate 11 in dry by using the second mask 17 to form the second support beams 20, a membrane member 22a where the first and second support beams 15, 20 are formed on both surfaces of the membrane 12 is manufactured. Consequently, it is possible to provide the membrane member that is sufficient in strength and is hard to be deformed by heat.
    Type: Grant
    Filed: June 10, 2004
    Date of Patent: January 5, 2010
    Assignees: Tokyo Electron Limited, OCTEC Inc.
    Inventors: Katsuya Okumura, Kazuya Nagaseki, Naoyuki Satoh, Koji Maruyama
  • Patent number: 7635649
    Abstract: A method for manufacturing a semiconductor device is provided. The method includes forming a polysilicon layer on a semiconductor substrate, forming an anti-reflection coating on the polysilicon layer, forming a photoresist (PR) layer pattern on the anti-reflection coating, etching the anti-reflection coating using the PR layer pattern as a mask in capacitive coupled plasma (CCP) equipment using CF4, Ar, and O2, so as to cause a reaction by-product generated by etching the anti-reflect coating to be deposited on sidewalls of the PR layer pattern, thereby forming spacers, and etching the polysilicon layer using the PR layer pattern and the spacers as a mask.
    Type: Grant
    Filed: November 28, 2006
    Date of Patent: December 22, 2009
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Jeong Yel Jang