Abstract: A method for treating a film of material, which can be defined on a substrate, e.g., silicon. The method includes providing a substrate comprising a cleaved surface, which had a porous silicon layer thereon. The substrate may have a distribution of hydrogen bearing particles defined from the cleaved surface to a region underlying said cleaved surface. The method also includes increasing a temperature of the cleaved surface to greater than about 1,000 Degrees Celsius while maintaining the cleaved surface in a etchant bearing environment to reduce a surface roughness value by about fifty percent and greater. Preferably, the value can be reduced by about eighty or ninety percent and greater, depending upon the embodiment.

Abstract: A process for removing residue from the interior of a semiconductor process chamber using molecular fluorine gas (F2) as the principal precursor reagent. In one embodiment a portion of the molecular fluorine is decomposed in a plasma to produce atomic fluorine, and the resulting mixture of atomic fluorine and molecular fluorine is supplied to the chamber whose interior is to be cleaned. In another embodiment the molecular fluorine gas cleans the semiconductor process chamber without any plasma excitation. Molecular fluorine gas has the advantage of not being a global warming gas, unlike fluorine-containing gas compounds conventionally used for chamber cleaning such as NF3, C2F6 and SF6.

Abstract: In one embodiment, the invention includes a method of removing at least a portion of a material from a substrate. The method includes providing a substrate in a reaction chamber, the substrate having a material supported thereover, and first etching the material while the substrate is in the reaction chamber. The method also includes, after the first etching, cleaning a component from at least one sidewall of the reaction chamber while the substrate remains therein; the component comprising a species that is present in the material. The cleaning includes exposing the sidewall and substrate to conditions which substantially selectively remove the component from the sidewall while not removing the material from the substrate, and not etching any other materials supported by the substrate. After the cleaning, the method includes second etching the material while the substrate is in the reaction chamber.

Abstract: A method for forming an etched silicon layer. There is first provided a first substrate having formed thereover a first silicon layer. There is then etched the first silicon layer to form an etched first silicon layer while employing a plasma etch method employing a plasma reactor chamber in conjunction with a plasma etchant gas composition which upon plasma activation provides at least one of an active bromine containing etchant species and an active chlorine containing etchant species.

Abstract: A process for etching multiple layers on a substrate 25 in an etching chamber 30 and cleaning a multilayer etchant residue formed on the surfaces of the walls 45 and components of the etching chamber 30. In multiple etching steps, process gas comprising different compositions of etchant gas is used to etch layers on the substrate 25 thereby depositing a compositionally variant etchant residue inside the chamber 30. In one cleaning step, a first cleaning gas is added to the process gas to clean a first residue or to suppress deposition of the first residue onto the chamber surfaces. In a second cleaning step, another residue composition is cleaned off the chamber surfaces using a second cleaning gas composition.

Abstract: Form an opening in a dielectric layer formed on a substrate comprises depositing a hard mask composed of an etch resistant material over a dielectric layer, e.g. a silicon oxide. Use a photoresist mask to expose the hard mask. Use a fluorocarbon plasma to etch through the window to form an opening through the hard mask. Then etch through the hard mask opening to pattern the dielectric layer. The hard mask comprises an RCH/RCHX material with the structural formula R:C:H or R:C:H:X, where R is selected from Si, Ge, B, Sn, Fe, Ti and X is selected from O, N, S and F. The plasma etching process employs a) a gas mixture comprising N2; fluorocarbon (CHF3, C4F8, C4F6, CF4, CH2F2, CH3F); an oxidizer (O2, CO2), and a noble diluent (Ar, He); b) a high DC bias (500-3000 Volts bias on the wafer); 3) medium pressure (20-100 mT.; and d) moderate temperatures (?20 to 60°).

Abstract: A method of forming a fluid ejecting device such as an ink jet printing device that includes forming a plurality of fluid drop generators on a first surface of a silicon substrate, forming a partial fluid feed slot in the silicon substrate by deep reactive ion etching, and forming a fluid feed slot by wet etching the partial fluid feed slot.

Abstract: The invention provides microfabricated silicon substrates and devices having extremely small apertures (termed “nanoapertures”) and methods for producing such nanoapertures. The devices have a nanoaperture (which may have a diameter ranging from about a few millimeters to as small as a few nm) across a substrate effective to connect two regions separated by the substrate. The devices are suitable for the formation of lipid bilayer membranes across the apertures, and for use in devices such as biosensors. Substrates and devices may include multiple nanoapertures, which may each support a lipid bilayer membrane, allowing fault tolerant devices such as fault-tolerant biosensors, and allowing devices able to sense more than one target molecule.

Abstract: An oxide etching process, particularly useful for selectively etching oxide over a feature having a non-oxide composition, such as silicon nitride and especially when that feature has a corner that is prone to faceting during the oxide etch. The invention uses a heavy perfluorocarbon, for example, hexafluorobutadiene (C4F6) or hexafluorobenzene (C6F6). The fluorocarbon together with a substantial amount of a noble gas such as argon is excited into a high-density plasma in a reactor which inductively couples plasma source power into the chamber and RF biases the pedestal electrode supporting the wafer. A more strongly polymerizing fluorocarbon such as difluoromethane (CH2F2) is added in the over etch to protect the nitride corner. Oxygen or nitrogen may be added to counteract the polymerization. The same chemistry can be used in a magnetically enhanced reactive ion etcher (MERIE) or with a remote plasma source.

Abstract: A photomask is formed by depositing an opaque layer on a transparent substrate. A resist is formed on the opaque layer and selectively patterned to expose the portions of the opaque layer that are to be etched out. During the dry etching step, the photomask is exposed to an etchant gas mixture which exhibits a selectivity equal to or higher than 1.2:1 between the opaque layer and the resist layer. Due to the selectivity of the gas mixture, a thinner resist film can be used, thereby increasing resolution and accuracy of the opaque layer pattern. Also, due to reduced susceptibility to both a macro-loading effect and a pattern density effect, overetching of the resist and underetching of the opaque layer are significantly reduced, thereby achieving improved etching uniformity and consequently improved CD uniformity.

Abstract: A process of using a-C:H layer as a hardmask material with tunable etch resistivity in a RIE process that alleviates the addition of a layer forming gas to the etchant when making a semiconductor device, comprising: a) providing a semiconductor substrate; b) forming a hardmask of amorphous carbon-hydrogen (a-C:H) layer by plasma enhancement over the semiconductor substrate; c) forming an opening in the hardmask layer to form an exposed surface portion of the hardmask layer; and d) etching the exposed surface portion of the hardmask layer without the addition of a layer forming gas using RIE to form a trench feature with sufficient masking and side wall protection.

Abstract: A slider prevent the phenomenon of sticking and reduce entrapping of foreign particles between sliding surfaces. A method for making micro-protrusions or micro-cavities on a surface of a substrate comprises placing the substrate in a process chamber, supporting a mask member having a micro shielding surface independent of and in front of the substrate, and irradiating fast atomic beams onto the surface of the substrate through the mask member.

Abstract: A method for plasma etching is disclosed with improved etching selectivity for a nitride containing DARC and a low-k dielectric layer. Plasma chemistry is controlled by adjusting a nitrogen to oxygen ratio to achieve improved etching selectivity in both nitride containing and low-k dielectric layers. Nitrogen to oxygen ratios are adjusted to control etching of for example, a DARC nitride containing layer, and Carbon to fluorine ratios are additionally adjusted to control etching in a low-k dielectric layer.

Abstract: A method of forming a fuse structure in which passivating material over the fuse has a controlled, substantially uniform thickness that is provided after C4 metallurgy formation. A laser fuse deletion process for the fuse formed by this method is also disclosed.

Abstract: A micro-machining process that includes etching a substrate having copper overlying a dielectric layer to a charged particle beam in the presence of an etch assisting agent. The etch assisting agent is selected from the group consisting of ammonia, acetic acid, thiolacetic acid, and combinations thereof.

Abstract: Three fundamental and three derived aspects of the present invention are disclosed. The three fundamental aspects each disclose a process sequence that may be integrated in a full process. The first aspect, designated as “latent masking”, defines a mask in a persistent material like silicon oxide that is held abeyant after definition while intervening processing operations are performed. The latent oxide pattern is then used to mask an etch. The second aspect, designated as “simultaneous multi-level etching (SMILE)”, provides a process sequence wherein a first pattern may be given an advanced start relative to a second pattern in etching into an underlying material, such that the first pattern may be etched deeper, shallower, or to the same depth as the second pattern. The third aspect, designated as “delayed LOCOS”, provides a means of defining a contact hole pattern at one stage of a process, then using the defined pattern at a later stage to open the contact holes.

Abstract: A method of forming an opening through a substrate having a first side and a second side opposite the first side includes forming a trench in the first side of the substrate, forming a mask layer within the trench, forming at least one hole in the mask layer, filling the trench and the at least one hole, forming a first portion of the opening in the substrate from the second side of the substrate to the mask layer, and forming a second portion of the opening in the substrate from the second side of the substrate through the at least one hole in the mask layer to the first side of the substrate.

Abstract: A method of surface treatment of friction members includes providing a friction member made of PMMC material. A transfer layer is formed on the active surface of the friction member of removing the top layer of the matrix material to expose a surface with the embedded reinforcing particles.

Abstract: In a plasma processing method, a silicon layer of an object to be processed is etched by using a plasma of a processing gas introduced into an airtight processing chamber through a patterned mask. The processing gas contains a gaseous mixture of HBr, O2 and SiF4 and, additionally, one or both of SF6 gas and NF3 gas; and a gas containing C and F is further added to the processing gas.

Abstract: A method for patterning different types of surface features on a semiconductor substrate (e.g. metal pads, etched pits and grooves) where the features are accurately located by a single mask. First, a dielectric layer is formed on the substrate. Next, an etch-resistant metal layer is formed on the dielectric and patterned according to a mask. Then, a patterned resist mask (e.g. PMMA) is formed on the patterned metal so that areas of the dielectric are exposed. The resist mask has edges that lie on top of the patterned metal layer. Therefore, the exposed dielectric areas are bounded by patterned metal. Then, the dielectric layer is etched using a directional dry etch to expose the underlying semiconductor substrate. Then, the semiconductor substrate is etched. The dielectric layer functions as a mask in the substrate etching step. Since the metal pattern determines the areas of the substrate that are etched, all the features are located according to the original mask that defined the metal pattern.

Abstract: The present invention relates to gas separation membranes including a metal-based layer having sub-micron scale thicknesses. The metal-based layer can be a palladium alloy supported by ceramic layers such as a silicon oxide layer and a silicon nitride layer. By using MEMS, a series of perforations (holes) can be patterned to allow chemical components to access both sides of the metal-based layer. Heaters and temperature sensing devices can also be patterned on the membrane. The present invention also relates to a portable power generation system at a chemical microreactor comprising the gas separation membrane. The invention is also directed to a method for fabricating a gas separation membrane. Due to the ability to make chemical microreactors of very small sizes, a series of reactors can be used in combination on a silicon surface to produce an integrated gas membrane device.

Abstract: This invention relates to a method of making a window (e.g., vehicle windshield, architectural window, etc.), and the resulting window product. At least one glass substrate of the window is ion beam treated and/or milled prior to application of a coating (e.g., sputter coated coating) over the treated/milled substrate surface and/or prior to heat treatment. As a result, defects in the resulting window and/or haze may be reduced. The ion beam used in certain embodiments may be diffused. In certain embodiments, the ion beam treating and/or milling is carried out using a fluorine (F) inclusive gas(es) and/or argon/oxygen gas(es) at the ion source(s). In certain optional embodiments, F may be subimplanted into to treated/milled glass surface for the purpose of reducing Na migration to the glass surface during heat treatment or thereafter, thereby enabling corrosion and/or stains to be reduced for long periods of time.

Abstract: An oxide etching recipe including a heavy hydrogen-free fluorocarbon having F/C ratios less than 2, preferably C4F6, an oxygen-containing gas such as O2 or CO, a lighter fluorocarbon or hydrofluorocarbon, and a noble diluent gas such as Ar or Xe. The amounts of the first three gases are chosen such that the ratio (F—H)/(C—O) is at least 1.5 and no more than 2. Alternatively, the gas mixture may include the heavy fluorocarbon, carbon tetrafluoride, and the diluent with the ratio of the first two chosen such the ratio F/C is between 1.5 and 2.

Abstract: An etching method, such as for forming a micromechanical device, is disclosed. One embodiment of the method is for releasing a micromechanical structure, comprising, providing a substrate; providing a sacrificial layer directly or indirectly on the substrate; providing one or more micromechanical structural layers on the sacrificial layer; performing a first etch to remove a portion of the sacrificial layer, the first etch comprising providing an etchant gas and energizing the etchant gas so as to allow the etchant gas to physically, or chemically and physically, remove the portion of the sacrificial layer; performing a second etch to remove additional sacrificial material in the sacrificial layer, the second etch comprising providing a gas that chemically but not physically etches the additional sacrificial material.

Abstract: A plasma etching process, particularly useful for selectively etching oxide over a feature having a non-oxide composition, such as silicon nitride and especially when that feature has a corner that is prone to faceting during the oxide etch. A primary fluorine-containing gas, preferably hexafluorobutadiene (C4F6), is combined with a significantly larger amount of the diluent gas xenon (Xe) enhance nitride selectivity without the occurrence of etch stop. The chemistry is also useful for etching oxides in which holes and corners have already been formed, for which the use of xenon also reduces faceting of the oxide. For this use, the relative amount of xenon need not be so high. The invention may be used with related heavy fluorocarbons and other fluorine-based etching gases.

Abstract: A method of etching a silicon-containing material in a substrate comprises placing the substrate in a process chamber and exposing the substrate to an energized gas comprising fluorine-containing gas, chlorine-containing gas and sidewall-passivation gas. The silicon-containing material on the substrate comprises regions having different compositions, and the volumetric flow ratio of the fluorine-containing gas, chlorine-containing gas, and sidewall-passivation gas is selected to etch the compositionally different regions at substantially similar etch rates.

Abstract: An integrated in situ etch process performed in a multichamber substrate processing system having first and second etching chambers. The process includes transferring a substrate having formed thereon in a downward direction a patterned photoresist mask, a dielectric layer, a stop layer and a feature in the substrate to be contacted into the first etching chamber to etch the dielectric layer. The substrate is then transferred from the first etching chamber to the second etching chamber under vacuum conditions and, in the second etching chamber, is exposed to an oxygen plasma or similar environment to strip away the photoresist mask deposited over the substrate. After the photoresist mask is stripped, the stop layer is etched through to the feature to be contacted in either the second or a third etching chamber of said multichamber substrate processing system. All three etching steps are performed in a system level in situ process so that the substrate is not exposed to an ambient between steps.

Abstract: In general, the present invention is directed to methods of using weight or mass measurements to control various semiconductor manufacturing processes, and systems for accomplishing same. One illustrative method comprises providing a substrate, performing a deposition process to form a process layer above the substrate, determining a weight or mass of the process layer formed above the substrate, and controlling at least one parameter of the deposition process based upon the determined weight or mass of the process layer. One illustrative system in accordance with the present invention comprises a deposition tool for performing a deposition process to form a process layer above a substrate, a pressure sensor in contact with the substrate for sensing a pressure induced as a result of the process layer formed above the substrate, and a controller for controlling at least one parameter of the deposition process based upon the sensed pressure.

Abstract: A microneedle array module is disclosed comprising a multiplicity of microneedles affixed to and protruding outwardly from a front surface of a substrate to form the array, each microneedle of the array having a hollow section which extends through its center to an opening in the tip thereof. A method of fabricating the microneedle array module is also disclosed comprising the steps of: providing etch resistant mask layers to one and another opposite surfaces of a substrate to predetermined thicknesses; patterning the etch resistant mask layer of the one surface for outer dimensions of the microneedles of the array; patterning the etch resistant mask layer of the other surface for inner dimensions of the microneedles of the array; etching unmasked portions of the substrate from one and the other surfaces to first and second predetermined depths, respectively; and removing the mask layers from the one and the other surfaces.

Abstract: A method for forming an etched silicon layer. There is first provided a first substrate having formed thereover a first silicon layer. There is then etched the first silicon layer to form an etched first silicon layer while employing a plasma etch method employing a plasma reactor chamber in conjunction with a plasma etchant gas composition which upon plasma activation provides at least one of an active bromine containing etchant species and an active chlorine containing etchant species.

Abstract: A process for etching a substrate and removing etch residue deposited on the surfaces in the etching chamber has two stages. In the first stage, an energized first process gas is provided in the chamber, and in the second stage, an energized second process gas is provided in the chamber. The energized first process gas comprises SF6 and Ar, the volumetric flow ratio of SF6 to other components of the first process gas being from about 5:1 to about 1:10. The energized second process gas comprises CF4 and Ar, the volumetric flow ratio of CF4 to other components of the second process gas being from about 1:0 to about 1:10.

Abstract: The first chamber cleaning gas and the first silicon-containing film-etching gas of the present invention comprise at least one compound selected from the group consisting of FCOF, CF3OCOF and CF3OCF2OCOF, and O2 in the specific amount, and optionally other gases. The second chamber cleaning gas and the second silicon-containing film-etching gas comprise CF3COF, C3F7COF or CF2(COF)2 and O2 in specific amounts, and optionally may comprise other gases. The chamber cleaning gases and silicon-containing film etching gases of the present invention have a low global warming potential and hardly generate substances in the exhaust gases such as CF4, etc, which are harmful to the environment and have been perceived as contributing to global warming. Therefore, the gases are friendly to the global environment, and have easy handling and excellent exhaust gas treating properties. Further, the chamber cleaning gases of the invention have excellent cleaning rate.

Abstract: An anti stiction structure for cantilever formation technique. In one embodiment, the polymer cantilever is prevented from sticking to the substrate by at amortized stick layer on the substrate during formation that is later removed as a sacrificial layer. In another embodiment, the cantilever includes downwardly extending legs.

Abstract: A method for fabricating semiconductor microstructures with a combination of etching steps, i.e. local RIE, isotropic, etc. followed by deep anisotropic etching.

Abstract: An object of this invention is to suppress the amount of etchant used. A liquid etchant is stored in an etchant vessel, and vaporized by a vaporization unit. A fragile layer such as a porous layer is selectively etched with the vaporized etchant.

Abstract: Three fundamental and three derived aspects of the present invention are disclosed. The three fundamental aspects each disclose a process sequence that may be integrated in a full process. The first aspect, designated as “latent masking”, defines a mask in a persistent material like silicon oxide that is held abeyant after definition while intervening processing operations are performed. The latent oxide pattern is then used to mask an etch. The second aspect, designated as “simultaneous multi-level etching (SMILE)”, provides a process sequence wherein a first pattern may be given an advanced start relative to a second pattern in etching into an underlying material, such that the first pattern may be etched deeper, shallower, or to the same depth as the second pattern. The third aspect, designated as “delayed LOCOS”, provides a means of defining a contact hole pattern at one stage of a process, then using the defined pattern at a later stage to open the contact holes.

Abstract: A processing gas constituted of CH2F2, O2 and Ar is introduced into a processing chamber 102 of a plasma processing apparatus 100. The flow rate ratio of the constituents of the processing gas is set at CH2F2/O2/Ar=20 sccm/10 sccm/100 sccm. The pressure inside the processing chamber 102 is set at 50 mTorr. 500 W high frequency power with its frequency set at 13.56 Mz is applied to a lower electrode 108 on which a wafer W is placed. The processing gas is raised to plasma and thus, an SiNx layer 206 formed on a Cu layer 204 is etched. The exposed Cu layer 204 is hardly oxidized and C and F are not injected into it.

Abstract: Self-organized, or self-assembled, nanowires of a first composition may be used as an etching mask for fabrication of nanowires of a second composition. The method for forming such nanowires comprises: (a) providing an etchable layer of the second composition and having a buried insulating layer beneath a major surface thereof; (b) growing self-assembled nanowires on the surface of the etchable layer; and (c) etching the etchable layer anisotropically down to the insulating layer, using the self-assembled nanowires as a mask. The self-assembled nanowires may be removed or left. In either event, nanowires of the second composition are formed. The method enables the formation of one-dimensional crystalline nanowires with widths and heights at the nanometer scale, and lengths at the micrometer scale, which are aligned along certain crystallographic directions with high crystal quality.

Abstract: The present invention describes a processes that builds an acoustic cavity, a chamber, and vent openings for acoustically connecting the chamber with the acoustic cavity. The dry etch processes may include reactive ion etches, which include traditional parallel plate RIE dry etch processes, advanced deep and inductively coupled plasma RIE processes. Three embodiments for connecting the chamber to the cavity from the top side of the substrate, e.g. by using pilot openings formed using at least a portion of the mesh as an etch mask, by forming the vent openings using at least a portion of the mesh as an etch mask, or by having the chamber intersect the vent openings as the chamber is being formed, illustrate how the disclosed process may be modified. By forming the cavity on the back side of the substrate, the depth of the vent holes is decreased. Additionally, using at least a portion of the micro-machined mesh as an etch mask for the vent holes makes the process self-aligning.

Abstract: A method and apparatus of treating a surface of a sample. A sample is arranged on a stage provided in a chamber, an etching gas is continuously supplied into the chamber and a plasma is generated from the etching gas. An rf bias at a frequency of 100 kHz or higher is applied to the stage independently of the generation of the plasma, and the rf bias is modulated at a frequency of 100 Hz to 10 kHz. Thereby, a surface treatment in which a minimum feature size is 1 &mgr;m or smaller is performed on the sample.

Abstract: In one embodiment, a fluid ejection device comprises a substrate having a fluid slot defined from a first surface through to a second opposite surface; an ejection element formed over the first surface and that ejects fluid therefrom; and a filter having feed holes positioned over the fluid slot near the first surface. Fluid moves from the second surface through the feed holes to the ejection element. In a particular embodiment, the filter is formed of a first material that is surrounded by a second material. In another particular embodiment, the filter is formed from the back side and is formed of the same material as the substrate.

Abstract: Additional variants of the method of etching structures into an etching body, in particular recesses in a silicon body that are laterally defined in a precise manner by an etching mask, using a plasma, is described. In addition, the use of this method in the introduction of structures, in particular trenches having a high aspect ratio, into a dielectric layer or a dielectric base body and in a layer of silicon is described, isotropic underetching and/or isotropic, sacrificial-layer etching, in particular using fluorine radicals or a highly oxidizing fluorine compound such as ClF3, being performed after the production of the structures in at least some areas in the case of the layer made of silicon.

Abstract: A surface micromachining process for the fabrication of three-dimensional micro-hinges directly on silicon on insulator wafers. The process includes the steps of (a) defining openings around the surface of a desired hinge pin in a single layer of a silicon single crystal; (b) subjecting the openings to an etching process for removal of oxide material that is located in contiguous relation to the openings under the area of a hinge; (c) growing thermal oxide to define a gap between the hinge pin and a subsequently deposited polysilicon cap; (d) immediately depositing a thin layer of a chemical vapor deposited oxide sufficient to cover fine gaps not completely covered by the thermal oxide; depositing polysilicon and etching to define a hinge cap; and further etching to allow a mirror to be lifted out of the silicon wafer.

Abstract: A semiconductor substrate, on which a silicon dioxide film with a resist film defined thereon has been formed, is placed inside a reaction chamber of a plasma processing system. Then, a fluorocarbon gas with a C/F ratio of 0.5 or more is introduced into the reaction chamber. In this process step, the flow rate of the gas is controlled such that the residence time &tgr; of the gas in the reaction chamber becomes greater than 0.1 sec and equal to or less than 1 sec in accordance with an equation &tgr;=P×V/Q, where &tgr; is the residence time (unit: sec), P is a pressure (unit: Pa) of the gas, V is a volume (unit: L) of the reaction chamber and Q is the flow rate (unit: Pa·L/sec) of the gas. Thereafter, plasma is created from the fluorocarbon gas and the silicon dioxide film is plasma-etched using the resist film as a mask.

Abstract: A method of etching a platinum electrode layer disposed on a substrate to produce a semiconductor device including a plurality of platinum electrodes. The method comprises heating the substrate to a temperature greater than about 150° C., and etching the platinum electrode layer by employing a plasma of an etchant gas comprising nitrogen and a halogen (e.g. chlorine), and a gas selected from the group consisting of a noble gas (e.g. argon), BCl3, HBr, SiCl4 and mixtures thereof. The substrate may be heated in a reactor chamber having a dielectric window including a deposit-receiving surface having a surface finish comprising a peak-to-valley roughness height with an average height value of greater than about 1000 Å.

Abstract: A bubble-jet type ink-jet printhead, and a manufacturing method thereof are provided, wherein, the printhead includes a substrate integrally having an ink supply manifold, an ink chamber, and an ink channel, a nozzle plate having a nozzle, a heater consisting of resistive heating elements, and an electrode for applying current to the heater. In particular, the ink chamber is formed in a substantially hemispherical shape on a surface of the substrate, a manifold is formed from its bottom side toward the ink chamber, and the ink channel linking the manifold and the ink chamber is formed at the bottom of the ink chamber. Thus, this simplifies the manufacturing process and facilitates high integration and high volume production. Furthermore, a doughnut-shaped bubble is formed to eject ink in the printhead, thereby preventing a back flow of ink as well as formation of satellite droplets that may degrade image resolution.

Abstract: In one illustrative embodiment, a system is comprised of a semiconductor processing tool, an etcher, a metrology tool, and a controller. The semiconductor processing tool is capable of forming a process layer above a semiconducting substrate. The etcher is capable of removing at least a portion of the process layer. The metrology tool is capable of measuring a first depth of the etch at a first location in a first preselected region of the semiconducting substrate. The controller is capable of comparing the first depth to a desired depth, and varying the temperature of a subsequently processed semiconducting substrate in a region corresponding to the first preselected region in response to the first depth being different from the desired depth.

Abstract: A method of etching a deep, high aspect ratio opening in a silicon substrate includes etching the substrate with a first plasma formed using a first gaseous mixture including a bromine containing gas, an oxygen containing gas and a first fluorine containing gas. The etching process with the first gaseous mixture produces a sidewall passivating deposit, which builds up near the opening entrance. To reduce this buildup, and to increase the average etching rate, the sidewall passivating deposit is periodically thinned by forming a second plasma using a mixture containing silane and a second fluorine containing gas. The substrate remains in the same plasma reactor chamber during the entire process and the plasma is continuously maintained during the thinning step. Holes of a depth greater than 40 times the width may be produced using repeated cycles of etching and thinning.

Abstract: Complex features and fine details are created in a carbon containing work piece by photolithography. A mask layer is deposited by evaporation onto the work piece. A desired pattern is created on the mask layer. The pattern is etched into the work piece and the remaining portion of the mask layer is dissolved.

Abstract: A micromachined vertical vibrating gyroscope consists of three single crystal silicon assemblies: an outer single crystal silicon assembly, an intermediate single crystal silicon assembly, and an inner single crystal silicon assembly. The outer assembly includes a plurality of arc-shaped anchors arranged in a circle and extending from a single crystal silicon substrate coated with an insulating annulus thereon. The intermediate assembly is a suspended wheel concentric with the arc-shaped anchors. The inner assembly is a suspended hub concentric with the circle formed by the anchors and having no axle at its center. The three assemblies are connected to each other through several flexures. The intermediate suspended wheel is driven into rotational vibration by lateral comb capacitors. Input angular rates are measured by two vertical capacitors.