Abstract: In a method for producing a semiconductor dynamic sensor, an anisotropic etching mask is formed on a (100) crystal orientation silicon substrate with a main portion and form-compensation portions formed at the corners of the main portion. Each of the form-compensation portions has a rectangular shape with a long side and a short side. Further, one of the long and short sides of the etching mask stretches in the <011> direction of the silicon substrate, and the other side stretches in the <0{overscore (1)}1> direction of the silicon substrate. As a result, the silicon substrate can be etched into a predetermined shape without making large corner-undercut portions on a nonetched portion corresponding to the main portion of the mask.

Abstract: A subcritical or supercritical water is used to selectively etch a silicon nitride film against a silicon dioxide film or to selectively etch a silicon dioxide film against a crystalline silicon region. This method is applicable to a process of forming a MISFET or a charge emitting device.

Abstract: A method for preparing a semiconductor member comprises: forming a substrate having a non-porous silicon monocrystalline layer and a porous silicon layer; bonding another substrate having a surface made of an insulating material to the surface of the monocrystalline layer; and etching to remove the porous silicon layer by immersing in an etching solution.

Abstract: A silicate glass is selectively etched employing a composition containing a fluoride containing compound and certain organic solvents. Preferred compositions also include water.

Abstract: Field emission display and method for fabricating the same, the field emission display including a cathode array having a cathode electrode formed on a substrate, insulating layers and carbon nanotube films for use as emitter electrodes formed alternately on the cathode electrode, and a gate electrode formed on the insulating layer, thereby permitting fabrication of a large sized cathode plate at a low cost because the film is formed by screen printing and exposure, which can reduce the cumbersome steps in fabrication of the related art Spindt emitter tip, and both a low voltage and a high voltage FEDs because the carbon nanotube film used as the emitter has a low work function, with an easy and stable electron emission capability.

Abstract: A method is disclosed for removing pad nodules. The method provides a wafer comprising pads and pad nodules which are formed on said pads, wherein said pads are made from a metal selected from the group consisting of aluminum and an aluminum-copper alloy. Then, the method dips the wafer into deionized water for removing the pad nodules. Thereafter, the method spin-dries the wafer and coats an alkaloid developer on the wafer for further removing the pad nodules. Finally, the method removes the alkaloid developer from the wafer and bakes the wafer.

Abstract: A liquid processing apparatus is capable of uniformly processing substrates by a liquid process. The liquid processing apparatus has a chemical liquid tank (21) containing a processing liquid for processing wafers (W) by a predetermined liquid process, a carrying device (24) provided with a wafer holder (42) capable of holding a plurality of wafers (W) to be subjected to the liquid process in a vertical position, and capable of carrying the wafers (W) between a processing position where the wafers (W) are immersed in the chemical liquid contained in the chemical liquid tank (21) and a position above the processing position, and a cover (50) for covering a space extending over the wafers (W) held on the wafer holder (42) of the carrying device (24) so that any air currents may not be substantially generated in the same space.

Abstract: This invention relates to the fabrication of integrated circuit devices and more particularly to a method for forming and then later removing a silicon oxynitride, SiON, anti-reflection coating (ARC) over a semiconductor substrate, for the purpose of enhancing the resolution of photolithographically defined sub-micron polysilicon gates. The problem addressed by this invention is that the SiON ARC must first be used to reduce optical reflection from a blanket polysilicon surface, during the photolithography exposure step that defines the sub-micron polysilicon gate features, and then the ARC must be removed by a wet etch process that will not chemically attack the gate oxide under the polysilicon gate features or any exposed polysilicon surfaces.

Abstract: A process vessel which may be utilized in wet processing of semiconductor wafers includes a tank having one or more fluid displacers attachable to the tank. The one or more fluid displacer(s) have position in which they extend into the interior of the tank. The fluid displacers may be carried by a lid moveable into a closed position covering the opening in the tank. Movement of the lid into the closed position causes the fluid displacers to extend into the tank.

Abstract: A method of processing a semiconductor wafer sliced from a monocrystalline ingot comprises at least the steps of chamfering, lapping, etching, mirror-polishing, and cleaning. In the etching step, alkali etching is first performed and then acid etching, preferably reaction-controlled acid etching, is performed. The etching amount of the alkali etching is greater than the etching amount of the acid etching. Alternatively, in the etching step, reaction-controlled acid etching is first performed and then diffusion-controlled acid etching is performed. The etching amount of the reaction-controlled acid etching is greater than the etching amount of the diffusion-controlled acid etching.

Abstract: A method of polishing selected ceramics and metals is provided wherein the selected ceramic or metal material is rubbed against a solid surface in the presence of a nonabrasive liquid medium which only attacks the selected ceramic or metal material under friction. Examples of materials for the tribochemical polishing process includes ceramics such as silicon, silicon nitride, silicon carbide, silicon oxide, titanium carbide and aluminum nitride and metals such as tungsten. Both ceramic and metal surfaces can be polished, as in a damascene structure of an integrated circuit.

Abstract: A method for preparing a semiconductor member comprises: forming a substrate having a non-porous silicon monocrystalline layer and a porous silicon layer; bonding another substrate having a surface made of an insulating material to the surface of the monocrystalline layer; and etching to remove the porous silicon layer by immersing in an etching solution.

Abstract: A nozzle plate has a plurality of nozzles for discharging ink which is fed from an ink reservoir to ink cavities through ink supply ports and is pressurized by a pressurizing element. In the nozzle plate, nozzle openings are formed in a silicon monocrystalline substrate with a lattice face (110) by anisotropic etching in such a way that through holes have faces (1-11) and (-11-1) in the direction in which the nozzle opening are arrayed as well as faces (111) and (11-1) in the direction of the axis of the ink cavity. The nozzle openings can be formed so as to have the faces (1-11) and (-11-1) normal to the silicon monocrystalline substrate in the direction in which the nozzle openings are arrayed. The width of the nozzle opening becomes constant irrespective of the time required to etch the substrate.

Abstract: A process for producing multiple undercut profiles in a single material. A resist pattern is applied over a work piece and a wet etch is performed to produce an undercut in the material. This first wet etch is followed by a polymerizing dry etch which produces a polymer film in the undercut created by the first wet etch. The polymer film prevents further etching of the undercut portion during a second wet etch. Thus, an undercut profile can be obtained having a larger undercut in an underlying portion of the work piece, utilizing only a single resist application step. The work piece may be a multi-layer work piece having different layers formed of the same material, or it may be a single layer of material.

Abstract: In one aspect, the invention encompasses a semiconductor processing method. Two silicon-comprising masses are provided. A first of the two masses comprises a higher dopant concentration than a second of the two masses. The two masses are exposed to common conditions which etch the second mass faster than the first mass. In another aspect, the invention encompasses another embodiment semiconductor processing method. A substrate is provided. The substrate has at least one doped polysilicon mass formed thereover, and has regions not proximate the at least one doped polysilicon mass. Roughened polysilicon is formed along the at least one doped polysilicon mass and over said regions of the substrate. A dopant concentration in the roughened polysilicon is increased along the at least one doped polysilicon mass relative to any dopant concentration in the roughened polysilicon over said regions of the substrate.

Abstract: A method is provided for polishing a composite comprised of silica and silicon nitride wherein a polishing composition is used comprising: an aqueous medium, abrasive particles, a surfactant, an organic polymer viscosity modifier which increases the viscosity of the composition, and a compound which complexes with the silica and silicon nitride wherein the complexing agent has two or more functional groups each having a dissociable proton, the functional groups being the same or different.

Abstract: In one implementation, a chemical mechanical polishing method includes providing a workpiece having a dielectric region to be polished. A first chemical mechanical polishing of the dielectric region is conducted on the workpiece using a polishing pad and a first slurry. Then, a second chemical mechanical polishing is conducted of the dielectric region on the workpiece using the polishing pad and a second slurry different from the first slurry. In one implementation, a chemical mechanical polishing method includes providing a workpiece having a dielectric region to be polished. The dielectric region has a thickness ultimately desired to removed by polishing prior to moving the workpiece on to a subsequent nonpolishing processing step. A first chemical mechanical polishing of the dielectric region is conducted on the workpiece using a first slurry. Then, a second chemical mechanical polishing of the dielectric region is conducted on the workpiece using a second slurry different from the first slurry.

Abstract: A method for cleaning polymer film residues from in-process integrated circuit devices is disclosed. Specifically, a method for forming a contact via in an integrated circuit is disclosed in which the formation of a metallization conductive element is exposed through a dry anisotropic etch. During the etch, a polymer film residue forms from masking materials, and coats the newly-formed via. The polymer film may have metals incorporated metals therein from the metallization conductive element. A fluorine based etchant is used to remove the polymer film. Protection of the metallization conductive element during the cleaning process is accomplished with passivation additives comprising straight, branched, cyclic, and aromatic hydrocarbons. Attached to the hydrocarbons are functional groups comprising at least 3 hydroxyls.

Abstract: In a method for preparing a semiconductor device wherein a first silicon oxide film, a second silicon oxide film and a silicon nitride film are sequentially deposited on a silicon substrate, and both silicon oxide films and the silicon nitride film are patterned, a patterned resist 45 is formed on the silicon nitride film, the silicon nitride film is etched with phosphoric acid the resist serving as a mask, and both silicon oxide films are etched with hydrofluoric acid the resist serving as a mask.

Abstract: A probe includes an elongated body with a top surface, a bottom surface, a first side wall between the top surface and the bottom surface, and a second side wall between the top surface and the bottom surface. An end is defined by the bottom surface converging into a tip, an isotropically etched portion of the first side wall converging into the tip, and an isotropically etched portion of the second side wall converging into the tip. The elongated body is less than approximately 700 &mgr;m wide and less than approximately 200 &mgr;m thick. The elongated body may incorporate a fluid channel. The elongated body may be formed of silicon that is not doped with Boron. In such a configuration, integrated circuitry or a micromachined device, such as a heater or pump may also be formed on the device. A number of novel processing techniques are associate with the fabrication of the device. The device may be formed by relying solely on isotropic etching.

Abstract: A wet etch bath (61) holds a wet etchant (52) for etching a dielectric over a semiconductor substrate. The wet etch bath (61) has a tub (63) separated from a reservoir (64) by a wall (65). The tub (63) is filled with the wet etchant (52) to a height of the wall (65). The reservoir (64) is filled with the wet etchant (52) to a height less than the height of the wall. A pump (66) coupled to the reservoir (64) pumps the wet etchant (52) through an osmotic membrane degasifier (69) to the tub (63). Adding the wet etchant (52) to the tub (63) causes the wet etchant (52) to cascade over the wall (65) back to the reservoir (64). The osmotic membrane degasifier (69) reduces a concentration of a reactive agent in the wet etchant (52).

Abstract: A new method is provided for the creation of spacers for the CMOS gate electrode. A layer of a spacer material is deposited over the gate structure; a layer of photoresist is deposited over the layer of spacer material. The layer of photoresist of the invention is partially stripped removing the photoresist from above the gate structure and providing a thinner layer of photoresist over the surrounding layer of spacer material. The layer of spacer material is partially etched whereby the layer of photoresist serves as a partial etch stop layer. The remainder of the photoresist is removed, the spacer material is further etched using a dry etch whereby a thin layer of spacer material (oxide) remains deposited over the surface of the substrate. As a final step the thin layer of spacer material (oxide) is removed from the surface of the substrate using a wet etch.

Abstract: Semiconductor substrates are contacted with a deionized water solution containing an acidic material.

Abstract: A method for preparing a semiconductor member comprises: forming a substrate having a non-porous silicon monocrystalline layer and a porous silicon layer; bonding another substrate having a surface made of an insulating material to the surface of the monocrystalline layer; and etching to remove the porous silicon layer by immersing in an etching solution.

Abstract: A composition for converting asbestos-containing material, covering metal pipes or other metal surfaces, to non-regulated, environmentally benign-materials, and inhibiting the corrosion of the metal pipes or other metal surfaces. The composition comprises a combination of at least two multiple-functional group reagents, in which each reagent includes a Fluro acid component and a corrosion inhibiting compoment. A method for converting asbestos-containing material, covering metal pipes or other metal surfaces, to non-regulated, environmentally benign-materials, and inhibiting the corrosion of the metal pipes or other metal surfaces is also provided.

Abstract: A micromachined multi-layered microbellows-style actuator capable of delivering larger deflections compared to a single layered flat membrane of comparable size. Anchor structures are disclosed that improve the strength of the microbellows membrane. A characterization apparatus is used to measure microbellows membrane performance. Thermopneumatic actuators having a resistive heater chip are also disclosed. The microbellows membrane is manufactured by alternating deposition of structural layers and sacrificial layers on a substrate. The structural layers can be made of silicon nitride and the sacrificial layers can be made of polysilicon. The substrate is etched from the back to form an opening exposing the sacrificial layers, and then the membrane is released by etching away the sacrificial layers.

Abstract: A method of manufacturing a micromachined thermal flowmeter is provided. The major manufacturing steps comprise forming an n-type region(s) in a p-type silicon wafer, forming heating and temperature sensing devices in the n-type region(s), converting the n-type region(s) into porous silicon by anodization in a HF solution, bonding the silicon wafer onto a glass plate using a polyimide layer as an adhesive layer, removing the porous silicon in a diluted base solution, and coating the heating and temperature sensing devices with a corrosion-resistant and abrasion-resistant material.

Abstract: In one aspect, the invention encompasses a semiconductor processing method. Two silicon-comprising masses are provided. A first of the two masses comprises a higher dopant concentration than a second of the two masses. The two masses are exposed to common conditions which etch the second mass faster than the first mass. In another aspect, the invention encompasses another embodiment semiconductor processing method. A substrate is provided. The substrate has at least one doped polysilicon mass formed thereover, and has regions not proximate the at least one doped polysilicon mass. Roughened polysilicon is formed along the at least one doped polysilicon mass and over said regions of the substrate. A dopant concentration in the roughened polysilicon is increased along the at least one doped polysilicon mass relative to any dopant concentration in the roughened polysilicon over said regions of the substrate.

Abstract: A polishing composition comprising the following components:(a) an abrasive,(b) an oxidizing agent capable of oxidizing tantalum,(c) a reducing agent capable of reducing tantalum oxide, and(d) water.

Abstract: A method for molding high precision components is provided that allows inexpensive, rapid fabrication of components using a process involving a silicon substrate, in which the mold pattern is created using multiple mask layers, a deep reactive ion etch process and photolithographic patterning techniques.

Abstract: The present invention is directed to wet processing methods for the manufacture of electronic component precursors, such as semiconductor wafers used in integrated circuits. More specifically, this invention relates to methods, for example, prediffusion cleaning, stripping, and etching of electronic component precursors using sequential chemical processing techniques.

Abstract: Apparatus and method for reducing electrostatic repulsion between printed ink drops employs:1) Locating redundant nozzles adjacent to the nozzles that they replace (the main nozzles), e.g., offset by approximately one pixel width in the print direction.2) Placing drive transistors adjacent to the nozzles that they actuate.3) Grouping nozzles into `phases` wherein the nozzles within any one phase are maximally dispersed and actuated simultaneously, and different phases are actuated consecutively.In print head embodiments have nozzles placed at the bottom of ink channels etched as truncated pyramidical pits in <100> silicon, and the silicon wafers are thinned before etching the pits, so that the area of the truncated bottoms of the pits is maximized. A manufacturing method for increasing the location density of pits by means of such pre-thinning of wafer thickness is also disclosed.

Abstract: A method for improving etch uniformity during a wet etching process is disclosed. The method comprises the steps of first rinsing the wafer to form a water film over the wafer surface, followed by liquid phase etching. The water film helps the subsequent viscous etchant to be spread across the wafer surface more uniformly to thereby improve the etch uniformity.

Abstract: A method for removing a plurality of dielectric films from a supporting substrate by providing a substrate with a second dielectric layer overlying a first dielectric layer, contacting the substrate at a first temperature with a first acid solution exhibiting a positive etch selectivity at the first temperature, and then contacting the substrate at a second temperature with a second acid solution exhibiting a positive etch selectivity at the second temperature. The first and second dielectric layers exhibit different etch rates in the first and second acid solutions. The first and second acid solutions may contain phosphoric acid. The first dielectric layer may be silicon nitride and the second dielectric layer may be silicon oxide. Under these conditions, the first temperature may be about 175.degree. C. and the second temperature may be about 155.degree. C.

Abstract: Solutions useful for etching semiconductor devices comprise ammonium fluoride, hydrofluoric acid, hydrogen peroxide, and water. Processes for forming the solutions comprise mixing first solutions which comprise ammonium fluoride, hydrofluoric acid, and water with second solutions which comprise hydrogen peroxide and water to form the solutions of the invention. Methods for etching semiconductor devices comprise contacting the devices which comprise a substrate and oxide layer thereon with the solutions of the invention to etch the devices. The oxide layer, for example a damaged silicon oxide layer on a silicon substrate, is selectively etched to the substrate.

Abstract: A method of purifying an alkaline solution includes dissolving metallic silicon and/or silicon compounds in the alkaline solution and non-ionizing metallic ions in the alkaline solution with reaction products generated when the metallic silicon and/or silicon compounds are dissolved therein. This purifying method is capable of remarkably decreasing metallic ions in the alkaline solution at a low-cost by an easy operation. A method of etching semiconductor wafers includes purifying an alkaline solution by non-ionizing metallic ions in the alkaline solution and etching the semiconductor wafers by using the purified alkaline solution. According to this etching method, the metallic contamination level due to the etching of the semiconductor wafers is greatly decreased, there being neither deterioration in the wafer quality nor deterioration in the characteristic of the semiconductor device.

Abstract: A slurry containing abrasive particles and a dual-valent rare earth ion or suspension of its colloidal hydroxide is especially useful for polishing surfaces, including those used in microelectronics. A suspension of a colloidal dual-valent rare earth hydroxide is especially useful for polishing silica.

Abstract: There is disclosed a silicon wafer etching method in which etching is performed through use of an etchant. The etchant is an alkali aqueous solution which contains an alkali component in a concentration ranging from 50.6% to 55.0% by weight. The alkali component is preferably sodium hydroxide. The silicon wafer etching method can reduce not only surface roughness but also dispersion thereof.

Abstract: Aqueous cleaning compositions comprise from about 0.01 to about 10 weight percent of hydrogen fluoride; from about 1 to about 10 weight percent of hydrogen peroxide; and from about 0.01 to about 30 weight percent of isopropyl alcohol. Methods of manufacturing microelectronic devices comprise providing electrodes on insulation films on microelectronic substrates; etching the insulation films using the electrodes as etching masks to form an exposed surfaces on the electrodes; cleaning the exposed surfaces with aqueous cleaning compositions comprising from about 0.01 to about 10 weight percent of hydrogen fluoride; from about 1 to about 10 weight percent of hydrogen peroxide; and from about 0.01 to about 30 weight percent of isopropyl alcohol; and forming dielectric films on the exposed surfaces of the electrodes. The cleaning step and the etching step are carried out simultaneously.

Abstract: A surface having an exposed silicon/silica interface is cleaned by an HF dip, followed immediately by a rinse in citric acid, followed by a rinse in deionized water. Low pH of the citric acid significantly prevents the formation of a charge differential between the silica and silicon portions of the surface, which charge differential would otherwise cause any silica particles present to remain on the silicon portion of the surface. Surfactant properties of the citric acid help remove any silica particles from the surface. The deionized water rinse then removes the citric acid from the surfaces, leaving a very clean, low particulate surface on both the silica and silicon portions thereof, with little or no etching of the silicon portion.

Abstract: A method for the precise removal of the backside silicon on face down semiconductor devices to obtain a planar surface to allow electron beam microprobe analysis of the semiconductor device. The backside silicon is removed by plasma etching in a fluorocarbon based chemical plasma. The epitaxial layer in a CMOS device acts as an etch stop and the buried oxide layer in an SOI device acts as an etch stop.

Abstract: A method for fabricating a bump forming plate member by which bumps can be formed on an electronic component. A mask is formed on a surface of a crystalline plate, and the crystalline plate is subjected to anisotropic etching to form a plurality of grooves. The crystalline plate is also subjected to isotropic etching to deepen the grooves. The method can further includes additional anisotropic and isotropic etchings. Also, a method for fabricating a metallic bump forming plate member is disclosed. This method uses the above described crystalline plate having the grooves, and includes fabrication of a replica using the crystalline plate as an original, and fabrication of a metallic bump forming plate member using the replica as an original.

Abstract: An improved wet etchant process is provided which has greater selectivity than existing hot phosphoric acid etching processes and which maintains a high etch rate in use. The etchant composition includes a second acid having a boiling point higher than that of the phosphoric acid.

Abstract: A method for preparing coated optical fibers wherein an outer coating is a colored ink coating, and an inner coating is a protective coating, which removes the ink coating while minimizing damage to the protective coating. The method includes uimersing the fiber in a dilute acid bath at a predetermined length of time, removing the fiber from the bath and neutralizing the acid thereon, wiping the remnant ink coating off, and removing the protective coating.

Abstract: In one aspect, the invention encompasses a semiconductor processing method comprising contacting a surface with a liquid solution comprising at least one fluorine-containing species and a temperature of at least about 40.degree. C. In another aspect, the invention encompasses a method of passivating a silicon-comprising layer comprising contacting the layer with a liquid solution comprising hydrogen fluoride and a temperature of at least about 40.degree. C. In yet another aspect, the invention encompasses a method of forming hemispherical grain polysilicon comprising: a) forming a layer comprising substantially amorphous silicon over a substrate; b) contacting the layer comprising substantially amorphous silicon with a liquid solution comprising fluorine-containing species and a temperature of at least about 40.degree. C.; c) seeding the layer comprising substantially amorphous silicon; and d) annealing the seeded layer to convert at least a portion of the seeded layer to hemispherical grain polysilicon.

Abstract: Micromachining of bulk silicon utilizing the parallel etching characteristics of bulk silicon and integrating the parallel etch planes of silicon with silicon wafer bonding and impurity doping, enables the fabrication of on-chip optics with in situ aligned etched grooves for optical fibers, micro-lenses, photodiodes, and laser diodes. Other optical components that can be microfabricated and integrated include semi-transparent beam splitters, micro-optical scanners, pinholes, optical gratings, micro-optical filters, etc. Micromachining of bulk silicon utilizing the parallel etching characteristics thereof can be utilized to develop miniaturization of bio-instrumentation such as wavelength monitoring by fluorescence spectrometers, and other miniaturized optical systems such as Fabry-Perot interferometry for filtering of wavelengths, tunable cavity lasers, micro-holography modules, and wavelength splitters for optical communication systems.

Abstract: The present invention is a method for cleaning a process chamber without damaging the process kit by coating the process kit with another consumable material that protects the process kit during the etch that removes buildup from the processing chamber. First, a polysilicon layer is deposited on at least one inner surface of the processing chamber. Next, a silicon nitride layer deposition is performed on at least one semiconductor substrate in the processing chamber. The semiconductor substrate having said nitride layer thereon is then removed from the processing chamber. An etch is then performed to remove the nitride layer buildup from the inner surface of the processing chamber that has the polysilicon layer thereon.

Abstract: A method of fabricating a silicon semiconductor discrete wafer is disclosed that assures excellent finishing accuracy and productivity. The method for fabricating a discrete wafer having a double-layer structure including an impurity diffused layer at one side and an impurity non-diffused layer at the opposite side includes cutting a wafer, having one of the impurity diffused layers formed on both surfaces of the silicon semiconductor wafer and having an oxide film formed on the surface of the diffused layer, into two pieces at the center of thickness with an ID saw slicing machine. Then, both surfaces of the cutting surface are ground to a predetermined thickness with a surface grinding machine, and the grinding surfaces are lapped with abrasive grains having a count of at least #2000 and no more than #6000. The processing surface is wet-etched as the final processing.

Abstract: A method of smoothly processing a surface of crystal material, particularly a quartz crystal, to attain a good surface roughness and degree of eveness without substantial hillocks or micro-projections, without performing grinding or polishing processing. After lapping the surface of the crystal material, the lapped surface is etched with hydrofluoric acid. Finish etching is performed on the crystal material by buffer hydrofluoric acid as needed. In the manufacture of a crystal piece used in a crystal device, after the crystal wafer cut out from the rough crystal stone to the specified thickness is lapped, it is roughly etched to the desired thickness by hydrofluoric acid. Then, after ultrasonic washing by pure water, the crystal wafer is processed to the desired high quality of surface roughness, level of smoothness and thickness. The surface processing can be performed more easily, in less time, and with less labor than conventional methods, the cost is decreased, and productivity rises.

Abstract: A process for the formation of deep clear laser marks on silicon wafers is described. Tall ridges of material which is erupted from the wafer surface during the deep laser penetration form adjacent to the marks. These ridges are of the order of 3 to 15 microns in height and must be removed prior to subsequent wafer processing to avoid fragmentation causing scratches and particulate contamination. The process of the invention deposits a non-conformal layer of photoresist or other flowable material on the wafer. The peaks of the ridges protrude above the surface of the conformal layer be a significant amount and are then etched away using an aqueous silicon etch. The non-conformal layer protects the wafer surface from the silicon etch so that only the ridges are removed. After the ridges are etched, the non-conformal layer is removed leaving residual ridges of a height less than or equal to the thickness of the conformal layer.