Abstract: A wet chemical process is provided for treating an emitter formed on a substrate of a field emission display, the process comprises applying a solution including hydrogen to the emitter. In one embodiment of the invention, the steps of applying a solution comprises applying a solution of hydrofluoric acid to the emitter.

Abstract: Traditionally, hydrofluoric acid (HF) or buffered bydrofluoric acid (NH.sub.4 F) is mixed with water to form a etching solution for cleaning silicon dioxide from semiconductor wafer surfaces. An etching solution formed by mixing ammonium hydrogen bifluoride ((NH.sub.4)HF.sub.2) with water provides a benign alternative for cleaning silicon dioxide.

Abstract: The gate oxide film is prevented from being thinned partially. The semiconductor substrate (wafer) can be etched (processed) under excellent conditions. The impurities on the wafer surface can be analyzed and further reduced. In the first aspect, the substrate is irradiated with ultraviolet rays in contact with an F-containing aqueous solution, so that the oxide film and the substrate can be etched at roughly the same etching speed under excellent controllability without deteriorating the planarization of the substrate. In the second aspect, the substrate is etched by irradiating ultraviolet rays during exposure to an acid aqueous solution, so that surface metallic contamination and particles can be removed without deteriorating the wafer surface roughness. Further, the impurity elements in the outermost surface layer of the wafer can be analyzed at high precision by analyzing elements contained in the acid aqueous solution used for the etching.

Abstract: Etching residue, etching mask and silicon nitride and/or silicon dioxide are etched or removed employing a composition containing a fluoride containing compound, water and certain organic solvents.

Abstract: Optical disc stampers, methods of manufacturing the optical disc stampers, systems for manufacturing the optical disc stampers, and methods of replicating optical discs using the stampers are disclosed. The optical disc stamper is formed directly on a substrate that supports a patterning material including at least one layer of a first material and at least one layer of a second material. The first and second materials can include a metal and semiconductor. The patterning material is exposed to energy in selected areas. Unexposed areas of the patterning material are then removed, resulting in an optical disc stamper. The first and second materials can form an amorphous alloy in the exposed selected areas that remains after removal of the unexposed patterning material. The optical disc stamper can be used in the replication of optical data storage discs. Also disclosed arc systems for practicing the methods to produce optical data storage disc stampers.

Abstract: A polysilane having a repeating unit represented by the following general formula (LPS-I), ##STR1## wherein A is a bivalent organic group, R.sup.1 substituents may be the same or different and are selected from hydrogen atom and substituted or unsubstituted hydrocarbon group and silyl group. The polysilane is excellent in solublity in an organic solvent so that it can be formed into a film by way of a coating method, which is excellent in mechanical strength and heat resistance. The polysilane can be employed as an etching mask to be disposed under a resist in a manufacturing method of a semiconductor device. The polysilane exhibits anti-reflective effect during exposure, a large etch rate ratio in relative to a resist, and excellent dry etching resistance.

Abstract: An improved and new method for forming a planarized integrated cirsuit structure has been developed. The method uses a combination of etchback and chemical/mechanical polishing (CMP), in which the etchback process uses a tailored mask to compensate for non-unifomity of material removal by the subsequent chemical/mechanical (CMP) process, thereby resulting in improved planarization and superior thickness uniformity.

Abstract: A plasma etch reactor having independent gas feeds above the wafer and either at the sides or below the wafer. Preferably, a carrier gas such as argon is supplied from a showerhead electrode above the wafer while an etching gas is supplied from below. In the case of selectively etching an oxide over a non-oxide layer, the etchant gas should include one or more fluorocarbons.

Abstract: In the manufacture of an integrated circuit, contaminated oxide is replaced by relatively pure oxide using the following steps. First, a partially manufactured integrated circuit is bathed in an aqueous solution of hydrogen peroxide and ammonium hydroxide to oxidize organic materials and weaken bonds of metal contaminants to the integrated circuit substrate. Second, an aqueous rinse removes the oxidized organic materials and metal contaminants. Third, the integrated circuit is bathed in an aqueous solution of hydrogen fluoride and nitric acid. The hydrogen fluroide etches the contaminated oxide; the nitric acid combines with calcium and metal contaminants freed as the oxide is etched. The resulting nitride byproducts are highly soluble and easily removed in the following aqueous rinse. A drying step removes rinse water from the integrated circuit. Finally, an oxide formation step provides a relatively pure oxide layer.

Abstract: The invention comprises methods of forming contact openings and methods of forming contacts. In but one implementation, an inorganic antireflective coating material layer is formed over an insulating material layer. A contact opening is etched through the inorganic antireflective coating layer and into the insulating layer. Insulative material within the contact opening is etched and a projection of inorganic antireflective coating material is formed within the contact opening. The inorganic antireflective coating material is etched to substantially remove the projection from the contact opening. The preferred etching to remove the projection is facet etching, most preferably plasma etching. The preferred inorganic antireflective coating material is selected from the group consisting of SiO.sub.x where "x" ranges from 0.1 to 1.8, SiN.sub.y where "y" ranges from 0.1 to 1.2, and SiO.sub.x N.sub.y where "x" ranges from 0.2 to 1.8 and "y" ranges from 0.01 to 1.0, and mixtures thereof.

Abstract: Semiconductor wafers are positioned in a cleaning tank and subjected to sequential flows of one or more highly diluted cleaning solutions that are injected from the lower end of the tank and allowed to overflow at the upper end. One solution comprises one part ammonium hydroxide, two parts hydrogen peroxide, and 300-600 parts deionized water together with a trace of high purity surfactant. Rinsing water is flowed through the tank after the first solution is dumped. A second solution comprises highly dilute hydrofluoric acid. A third solution is more dilute than the first solution. A fourth solution contains hydrochloric acid greatly diluted with deionized water. The cleaning tank is provided with a megasonic generator in its lower portion for selective application of megasonic energy. Quick dump valves in the tank bottom enable the solutions to be quickly dumped followed by one or more rinse steps, including a quick refill while spraying and then dumping of the rinsing water.

Abstract: A method of fabricating shallow trench isolation with multi-step HDP process for avoiding kinks is described. This method is to form two insulator layers with different etching rates, the etching rate of outer insulator layer being slower than that of inner insulator layer. Additionally, use of a multi-step HDP process produces better gapfilling and avoid clipping phenomenon in shallow trench isolations. This method comprises the following steps. A substrate having a mask layer thereabove is provided. A pattern is defined on the mask layer to form a trench. Then, a first insulator layer, which covers the inner wall of the trench and the top surface of the mask layer, is formed. Next, a second insulator layer is formed in the trench and over the first insulator layer, the etching rate of the first insulator layer being slower than that of the second insulator layer. The first and the second insulator layer are removed, using said mask layer as a etching stop layer.

Abstract: A method of micromachining a silicon wafer that simultaneously forms narrow gaps having a width of 10 .mu.m or less and wider gap portions using an anistropic etching solution. The etching solution contains KOH in a concentration of 35% or less and the penetration etching is carried out such that the etching of the opposing walls and the face of the silicon wafer occur at the same rate. A method of manufacturing a capacitance-type acceleration detector in a silicon wafer using the aforementioned etching method.

Abstract: The present invention relates to a process for selectively etching polysilicon utilizing an ammonia solution etchant that is selective to silicon dioxide and photoresist. In one embodiment of the inventive material, a polysilicon layer is formed over a semiconductor substrate. A photoresist layer is then formed over the polysilicon layer. A portion of the photoresist layer is selectively removed by an edge bead removal process along the edge of the semiconductor wafer so as to expose a portion of the polysilicon layer. The exposed polysilicon layer is selectively removed by an etch conducted at a temperature range from about 20.degree. C. to about 30.degree. C. with an ammonium hydroxide etchant having an ammonia concentration in the range of about 1% to about 5% by volume. The etch is selective to the photoresist layer.

Abstract: A silicon substance is etched by using alkaline etchant containing additive (Cu, Pb, Mg). The content of the additive is controlled intentionally to provide desired etching quality during an etching operation.

Abstract: An ink jet channel wafer for an ink jet printer has a first surface in which a plurality of anisotropically etched ink channels and an anisotropically etched ink reservoir are directly connected to one another. The ink jet channel wafer is etched using an admixture of at least one alkali metal hydroxide and at least one alcohol compound.

Abstract: A method for pre-shaping a major surface (21,22) of a semiconductor wafer (20) in preparation for polishing includes shaping the major surface (21,22) so that it has a concave shape. In a preferred method, an etching process is used to form the concave shape. The concave shape provides a starting wafer that is extremely flat after polishing.

Abstract: A method for forming a gap-filled, planarization structure of dielectric materials on a substrate topography useful for forming microelectronic devices. A dielectric material is first deposited as continuous, dry dielectric layer, preferably a SOG layer. Then the dielectric layer is partially removed by chemical-mechanical polishing (CMP). The chemical and mechanical properties of the structure can be chosen by varying the composition of the SOG layer and the subsequent CMP conditions.

Abstract: A surface having an exposed silicon/silica interface is cleaned by ah HF dip, followed immediately by a rinse in citric acid, followed by a rinse in deionized water. Low pH of the citric acid significantly prevents the formation of a charge differential between the silica and silicon portions of the surface, which charge differential would otherwise cause any silica particles present to remain on the silicon portion of the surface. Surfactant properties of the citric acid help remove any silica particles from the surface. The deionized water rinse then removes the citric acid from the surfaces, leaving a very clean, low particulate surface on both the silica and silicon portions thereof, with little or no etching of the silicon portion.

Abstract: A method for removing a portion of an upper layer of one material from an underlying layer of another material to form a uniformly planar surface on a semiconductor wafer. In accordance with one embodiment of the invention, an upper section of the upper layer is etched to an intermediate point in the upper layer. The etching step removes the upper section of the upper layer and leaves only a lower section of the upper layer on the wafer. The lower section of the upper layer is then planarized to a final endpoint. The etching step preferably moves the majority of the upper layer from the wafer so that the remaining portion of the upper layer is thick enough to allow the planarization step to produce a uniformly planar finished surface on the wafer.

Abstract: The method of evaluating silicon wafers according to this invention is capable of predicating degradation of the quality of oxide film insulation, which is incurred, on the silicon wafers, by process faults or local residual strains undetectable by the naked eye. The method includes the following steps of: removing selectively a surface of a silicon wafer treated by mirror polishing by using an etching selectivity caused by an unordinary surface state; counting the number of etch pits on the surface of the silicon wafer with the aid of an optical microscope; and judging the quality of the silicon wafer based on the etch pit density, which is calculated from the above number of etch pits, and the threshold value of etch pit density. The threshold value of etch pit density of the silicon wafer treated by selective etching is set to be below 5.times.10.sup.5 pits/cm.sup.2, and improvements to the processing of production lines relating to low-quality silicon wafers can be made.

Abstract: An optical module includes support substrate, an optical waveguide on the support substrate, a photoreception device on the support substrate, an optical path conversion part for converting an optical path of an optical beam guided through the optical waveguide from a first optical path to a second optical path that leads to a photodetection area of said photoreception device, wherein the optical path conversion part is provided on the photodetection device as a part thereof, such that the optical beam emitted from the optical waveguide impinges upon the photodetection area of the photoreception device.

Abstract: Formation of watermarks during semiconductor processing can be prevented by rinsing silicon wafers in an organic solvent prior to drying. Water droplets on the silicon wafer surface are taken up by the solvent and film is formed over the wafer surface. Following this rinse, the wafer may be subjected to standard IPA-based drying techniques.

Abstract: Semiconductor integrated circuit processing is facilitated by an etch process illustratively applied to polysilicon and silicon nitride removal. The etch process illustratively comprises of the use of phosphoric acid with metal-containing additives to bring about an enhanced silicon etch rate effect.

Abstract: Processes for cleaning a silicon body and for controllably decreasing the thickness of a silicon dioxide layer overlying a silicon substrate are disclosed. The processes comprise chemically etching a silicon dioxide layer with a dilute etchant in the presence of a megasonic field. The concentration of the etchant is preferably less than its diffusion-rate-limiting threshold concentration at a given temperature. When aqueous alkaline hydroxyl ion etchants are employed, the concentration of etchant is preferably less than about 300 ppm by weight relative to water. The etching is discontinued before the silicon substrate is exposed to the etchant. The etch rate is controlled to within about 2.times.10.sup.-5 .mu.m/min (0.2 .ANG./min) of a target etch rate which ranges from about 3.times.10.sup.-5 .mu.m/min (0.3 .ANG./min) to about 4.times.10.sup.-4 .mu.m/min (4.0 .ANG./min). A simpler, more cost-effective chemical process for robustly cleaning silicon bodies or for producing very thin gate oxides is achieved.

Abstract: A method for treating thin silicon web crystals used to produce solar cells in order to remove complex SiOx contaminants from the web after growth. A dendritic silicon web with {111} surface orientation is immersed in a caustic solution of KOH or NaOH at a temperature at a range from about 80 to about 85.degree. C. for a period of about five to about ten minutes. The caustic solution quickly removes the SiOx contaminants, while leaving relatively unaffected the silicon crystal in the surface. After the caustic solution treatment, the web is rinsed in deionized water and optionally subjected to an acid cleaning with HCL or HF in order to remove any residual contaminants on the web surface.

Abstract: A method is provided to remove crystal regions from silicon wafers which are damaged as a consequence of mechanical machining of the silicon wafers. The silicon wafers are pretreated with an aqueous solution containing hydrogen fluoride. Then the wafers are etched in an aqueous solution exposed to ultrasound and containing alkali metal hydroxide at temperatures from 55.degree. C. to 95.degree. C.

Abstract: Apparatus for assembling microstructures onto a substrate through fluid transport. The apparatus includes a vessel that contains the substrate, a fluid, and microstructures. The substrate has at least one recessed region thereon. The microstructures being shaped blocks self-align into the recessed regions located on the substrate such that the microstructure becomes integral with the substrate. The apparatus also includes a pump that circulates the microstructures within the vessel at a rate where at least one of the microstructures is disposed into the recessed region.

Abstract: Silicon carbide wafers are prepared for semiconductor epitaxial growth by first lapping a silicon carbide wafer derived from a boule, by placing the wafer in a recess of a metal backed template and moving the wafer over and against a rotating plate. Two different diamond slurry mixtures of progressively smaller diamond grit sizes are sequentially used, along with a lubricant, for a predetermined period of time. The lapping operation is followed by a polishing operation which sequentially utilizes two different diamond slurry mixtures of progressively smaller diamond grit sizes, along with three different apertured pads sequentially applied to a rotatable plate, with the pads being of progressively softer composition. In a preferred embodiment the wafers are cleaned and the templates are changed after each new diamond slurry mixture used.

Abstract: A method of preventing edge stain in silicon wafers from the edge polishing step with an alkaline slurry, the method consisting of formation of an oxide layer by an annealing step in the presence of oxygen prior to edge polishing.

Abstract: Methods of wet etching through a silicon substrate using composite etch-stop layers are disclosed. In one embodiment, the composite etch stop comprises a layer of silicon dioxide and a layer of polyimide.

Abstract: Disclosed is a method of dissolving a surface of a semiconductor substrate or a thin-film surface layer formed on the semiconductor substrate, with an oxidizing agent and fluorine-series gas. The method is characterized in that an initial dissolution rate is controlled by gradually increasing a concentration of fluorine-series gas introduced in a dissolving solution containing the oxidizing agent.

Abstract: An improved wet etchant process is provided which has greater selectivity than existing hot phosphoric acid etching processes and which maintains a high etch rate in use. The etchant composition includes a second acid having a boiling point higher than that of the phosphoric acid.

Abstract: Trench structures (12,32,35,46) are formed in single crystal silicon substrates (10,30) that have either a (110) or (112) orientation. A selective wet etch solution is used that removes only the exposed portions of the single crystal silicon substrates (10,30) that are in the (110) or (112) crystal planes. The trench structures (12,32,35,46) are defined by the {111} crystal planes in the single crystal silicon substrate (10,30) that are exposed during the selective wet etch process. Trench structures (32,35) can be formed on both sides of a single crystal silicon substrate (30) to form an opening (34). Opening (34) can be used as an alignment mark to align front side processing to backside and vice versa. Trench structures can also be use to form a microstructure (41,61) for a sensor (40,60).

Abstract: An optical micro-machining method of glass characterized in that after light is applied to glass including SiO.sub.2 and 30-70 mol % GeO.sub.2, the irradiated area is removed by etching.

Abstract: A process for bulk micromachining a silicon wafer to form a silicon micromachined structure. The process involves the application of a protective film on one or more surfaces of the silicon wafer to protect metallization and circuitry on the wafer during the bulk micromachining process, during which a wet chemical etchant is employed to remove bulk silicon from a surface of the silicon wafer. The protective film is divinylsiloxane bisbenzocyclobutene (BCB), which has been found to be highly resistant to a wide variety of wet chemical etchants, and retains such resistant at elevated temperatures commonly preferred for bulk silicon etching. The degree to which this material is cured prior to etching is advantageously tailored to promote its resistance to the etchant and promote its adhesion to the silicon wafer.

Abstract: A processed Si product suitable for use as, for example, an X-ray mask, is produced by a process having the steps of preparing a non-porous Si substrate, changing by anodization at least a portion of the substrate into porous Si thereby forming at least one porous Si region penetrating the substrate from one to the other side thereof, and effecting an etching on the substrate by using an etchant containing hydrofluoric acid so as to remove the porous Si region. The substrate may be provided with an etching stop layer. In such a case, an unsupported membrane region formed by the etching stop layer is left after the removal of the porous Si region.

Abstract: A silicon wafer is set in a processing bath and an HF water solution and ozone water are respectively supplied from an HF line and ozone water line into the processing bath via an HF valve and ozone water valve to create a mixture. The mixture contains an HF water solution with a concentration of 0.01% to 1% and ozone water with a concentration of 0.1 ppm to 20 ppm, has substantially the same etching rate for silicon and for silicon oxide film and is used at a temperature in the range of 10.degree. to 30.degree. C. The silicon wafer and the silicon oxide film formed on part of the surface of the wafer can be simultaneously cleaned by use of the above mixture.

Abstract: A simplified, suitable-to-mass-production and high-reliable coupling structure for connection between optical waveguides or between an optical waveguide and an optical fiber is provided. A tenon is formed at the end of a substrate on which an optical waveguide is formed and a groove is formed on the end portion of another substrate on which an optical waveguide is formed. These optical waveguides are connected by fitting the tenon into the groove. By placing an optical fiber instead of an optical waveguide on the grooved substrate, an optical waveguide and an optical fiber can be connected. The tenon and the groove are formed in good mass-production at a high precision by working silicon substrates by performing chemical anisotropic etching using a mask pattern formed at the end portion of each substrate.

Abstract: A process for etching single crystal silicon semiconductor material of the N, P, N+ and P+ type slugs and wafers to delineate slip, lineage, dislocation, S-pit, twins, swirl and oxidation induced stacking fault defects involves the steps of:a) preparing a substantially metal-free etchant bath comprising nitric acid (70%), hydrofluoric acid (49%) and between approximately 35% to 98% by weight of glacial acetic acid (HAc) as a diluent, the minimum useful concentration of nitric acid being% Nitric acid.sub.min. =16.67?1-(% HAc/100)! and the maximum useful concentration of nitric acid being% Nitric acid.sub.max. =66.67?1-(% HAc/100)!, the minimum useful concentration of hydrofluoric acid being% HF.sub.min. =100%-% HAc % HNO.sub.3 max. and the maximum useful concentration of hydrofluoric acid being% HF.sub.max. -100%-% HAc-HNO.sub.2min.b) activating the etchant bath by generating NO.sub.x therein and allowing the temperature of the bath to rise to approximately 25.degree. to 34.degree. C.

Abstract: Insulation films which include a bump formation portion are formed on a semiconductor layer which serves as a thin layer. Metallic wire patterns are formed to fill up the bump formation portion, on the insulation film. The insulation film, the metallic wire pattern and the insulation film are formed in this order on the metallic wire pattern. A bump made of Ni is formed on a lower surface of the bump formation portion of the metallic wire pattern.

Abstract: A method for patterning an oxide superconductor thin film, comprising a step of forming a SiO.sub.2 layer on the oxide superconductor thin film, patterning the SiO.sub.2 layer so as to form the same pattern as that of the oxide superconductor thin film which will be patterned, etching the oxide superconductor thin film by using the patterned SiO.sub.2 layer as a mask, and removing the SiO.sub.2 layer by using a weak HF solution, a buffer solution including HF or a mixture including HF.

Abstract: A small glass electrode and process for preparation thereof, the small glass electrode having a bonded structure and comprising a reference electrode composed of silver/silver chloride, a glass substrate having a pad embedded therein, the pad being composed of gold or platinum and circuit-connected to the reference electrode, and a silicon substrate having a (100) plane selectively etched by the anisotropic etching technique and comprising a groove for injecting an electrolyte composed of an aqueous solution containing chlorine such as KCA, or HCA, at least one hole for holding the electrolyte and a glass film formed in a portion corresponding to the reference electrode. The structure of the small glass electrode may be produced by the disclosed process easily and at low cost. Additionally, the small glass electrode, in differing embodiments, may include a reference electrode and a temperature sensor.

Abstract: An abrasive wheel made of an abrasive which is chemically reactive with a ceramic workpiece and a binder mixed with the abrasive is held against the ceramic workpiece at a temperature ranging from 40.degree. C. to 300.degree. C. preferably 100.degree. C. to 180.degree. C., under at least an atmospheric pressure in a moistening atmosphere within a pressure vessel. The abrasive wheel is rotated in abrading contact with the ceramic workpiece. A surface layer of the ceramic workpiece which is held against the abrasive wheel is mechanically abraded and also subjected to a tribochemical reaction with the abrasive wheel, so that the surface layer of the ceramic workpiece can smoothly and neatly be removed from the ceramic workpiece. The ceramic workpiece thus ground is finished highly accurately and efficiently.

Abstract: One embodiment of the instant invention is a method of abruptly terminating etching of a dielectric layer on a semiconductor wafer, the method comprising the steps of: removing the semiconductor wafer from the etchant, the etchant is held a first temperature; and rinsing the semiconductor wafer in a rinse solution that is at a second temperature, the second temperature is at least 5.degree. C. colder than the first temperature. Preferably, the dielectric layer is comprised of: TEOS, BPSG, PSG, thermally grown oxide, and any combination thereof. Preferably, first temperature is approximately 25.degree. C. and the second temperature is approximately 0.degree. to 5.degree. C.; or the first temperature is approximately 70.degree. to 90.degree. C. and the second temperature is approximately 10.degree. to 30.degree. C. Preferably, the etchant is comprised of a buffered or unbuffered HF acid, and the rinse solution is comprised of deionized water. The second temperature is, preferably, at least 15.degree. C.

Abstract: A flexible and efficient bulk micromachining method for fabricating a novel microstructure that is bounded by substantially planar surfaces meeting only at substantially right angle corner features. The novel microstructure of the present invention is useful as a spacer in assembly processes where high accuracy is required, such as precise positioning of optical fibers or conductors. In the preferred embodiment, the microstructure of the present invention includes a shelf feature disposed along a height dimension of the microstructure, which is required for some applications. The bulk micromachining method of the present invention includes providing a first substrate having a top planar surface and an opposing planar surface. The opposing surface of the substrate is anisotropically etched to provide a first thinned region. The top surface of the first substrate is anisotropically etched so that a first recessed feature having a vertical side is made integral with the first thinned region.

Abstract: An etching process for a silicon semiconductor substrate to produce a semiconductor pressure sensor or a semiconductor acceleration sensor. The etching process comprises the following steps: (a) carrying out an etching of the semiconductor without application of a voltage to the semiconductor so as to accomplish a pre-etching step, the pre-etching step including dipping the semiconductor in hydrazine hydrate; and (b) carrying out an electrochemical etching of the semiconductor by applying pre-etching step so as to accomplish a final etching step, the final etching step including dipping the semiconductor in an alkali system etching solution containing at least hydrazine (N.sub.2 H.sub.4), potassium hydroxide (KOH), and water (H.sub.2 O), the alkali system etching solution containing potassium hydroxide in an amount of not less than 0.3% by weight.

Abstract: Semiconductor substrates are immersed in pure water having a lowered dissolved-oxygen concentration and heated to a temperature above 60.degree. C., in an atmosphere which keeps the dissolved oxygen concentration in pure water, in order to etch oxide films on surfaces of the semiconductor substrates for cleaning the surfaces of the semiconductor substrates. According to the present invention, contaminants and residual chemicals can be effectively removed without adding any chemical treating step. The cleaning can be effective without increasing the number of chemicals, and improved throughputs of the cleaning step can be obtained.

Abstract: A wet-etching method which determines a desired etch-ended point includes the steps of providing an etchant solution in a bath, performing the wet-etch process by dipping a material to be etched in the bath, measuring a weight variation value of the material during the wet etch process, calculating a thickness variation value of the material by using the weight variation value, and stopping the wet-etch process when the thickness variation value reaches a preset value.

Abstract: Disclosed is a method for the removal of a layer of photoresist material from a surface of a film located on an in-process integrated circuit wafer subsequent to etching the film through the photoresist material layer. The method disclosed herein comprises first, applying a layer of the photoresist material layer over the film, then patterning the photoresist material, etching the film, and finally, removing the photoresist material. The etch is preferably a wet etch conducted in a closed reaction chamber. The photoresist material removal can be conducted within the same closed reaction chamber as that in which the etch was conducted. Photoresist material removal is achieved by exposing the photoresist material to heated solvent vapors. One particularly advantageous vapor solvent comprises isopropyl alcohol. Subsequent to the photoresist material removal, the film is preferably subjected to cleaning, rinsing, and drying methods, all of which can be conducted within the same closed reaction chamber.