Applying Preliminary Bond Facilitating Metal Coating Patents (Class 228/208)
  • Patent number: 10256205
    Abstract: BGA packages with a spatially varied ball height, molds and techniques to form such packages. A template or mold with cavities may be pre-fabricated to hold solder paste material applied to the mold, for example with a solder paste printing process. The depth and/or diameter of the cavities may be predetermined as a function of spatial position within the mold working surface area. Mold cavity dimensions may be specified corresponding to package position to account for one or more pre-existing or expected spatial variations in the package, such as a package-level warpage measurement. Any number of different ball heights may be provided. The molds may be employed in a standardize process that need not be modified with each change in the mold.
    Type: Grant
    Filed: November 14, 2017
    Date of Patent: April 9, 2019
    Assignee: Intel Corporation
    Inventors: Eric J. Li, Jimin Yao, Shawna M. Liff
  • Patent number: 9620469
    Abstract: Embodiments of mechanisms for forming a semiconductor device are provided. The semiconductor device includes a contact pad over a substrate. The semiconductor device also includes a passivation layer over the substrate and a first portion of the contact pad, and a second portion of the contact pad is exposed through an opening. The semiconductor device further includes a post-passivation interconnect layer over the passivation layer and coupled to the second portion of the contact pad. In addition, the semiconductor device includes a bump over the post-passivation interconnect layer and outside of the opening. The semiconductor device also includes a diffusion barrier layer physically insulating the bump from the post-passivation interconnect layer while electrically connecting the bump to the post-passivation interconnect layer.
    Type: Grant
    Filed: November 18, 2013
    Date of Patent: April 11, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ying-Ju Chen, Hsien-Wei Chen
  • Patent number: 9006037
    Abstract: Provided are methods of forming a bump and a semiconductor device with the same. The method may include providing a substrate with pads, forming a bump maker layer to cover the pads and include a resin and solder particles, thermally treating the bump maker layer to aggregate the solder particles onto the pads, removing the resin to expose the aggregated solder particles, forming a resin layer to cover the aggregated solder particles, and reflowing the aggregated solder particles to form bumps on the pads.
    Type: Grant
    Filed: May 29, 2013
    Date of Patent: April 14, 2015
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Kwang-Seong Choi, Yong Sung Eom, Hyun-cheol Bae, Haksun Lee
  • Publication number: 20150037603
    Abstract: Methods of effecting bond adhesion between metal structures, methods of preparing articles including bonded metal structures, and articles including bonded metal structures are provided herein. In an embodiment, a method of effecting bond adhesion between metal structures includes forming a first metal structure on a substrate. The first metal structure includes grains that have a {111} crystallographic orientation, and the first metal structure has an exposed contact surface. Formation of an uneven surface topology is induced in the exposed contact surface of the first metal structure after forming the first metal structure. A second metal structure is bonded to the exposed contact surface of the first metal structure after inducing formation of the uneven surface topology in the exposed contact surface.
    Type: Application
    Filed: July 30, 2013
    Publication date: February 5, 2015
    Applicant: GLOBALFOUNDRIES, Inc.
    Inventors: Ernesto Gene de la Garza, Martin O'Toole
  • Patent number: 8822036
    Abstract: Disclosed are sintered silver bonded electronic package subcomponents and methods for making the same. Embodiments of the sintered silver bonded EPSs include topography modification of one or more metal surfaces of semiconductor devices bonded together by the sintered silver joint. The sintered silver bonded EPSs include a first semiconductor device having a first metal surface, the first metal surface having a modified topography that has been chemically etched, grit blasted, uniaxial ground and/or grid sliced connected to a second semiconductor device which may also include a first metal surface with a modified topography, a silver plating layer on the first metal surface of the first semiconductor device and a silver plating layer on the first metal surface of the second semiconductor device and a sintered silver joint between the silver plating layers of the first and second semiconductor devices which bonds the first semiconductor device to the second semiconductor device.
    Type: Grant
    Filed: March 6, 2013
    Date of Patent: September 2, 2014
    Assignee: UT-Battelle, LLC
    Inventor: Andrew A. Wereszczak
  • Publication number: 20140008419
    Abstract: The present invention relates to a joint (10) that includes a first member (11) to be jointed, a second member (12) to be jointed and a jointing layer (13) located between the first member (11) and the second member (12). The jointing layer (13) is made of Sn metal and a metallic material with a melting point higher than the melting point of the Sn metal. The present invention relates also to a method of joining this first member (11) to the second member (12).
    Type: Application
    Filed: August 6, 2013
    Publication date: January 9, 2014
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Toshihide Takahashi, Tatsuoki Kono, Mitsuhiro Oki, Akiko Suzuki
  • Publication number: 20140005796
    Abstract: Monoblock orthopedic and/or dental implants are disclosed. The monoblock implants include a ceramic articulating surface and an osseointegrative bone-contacting surface. Methods of making such implants also disclosed.
    Type: Application
    Filed: November 16, 2011
    Publication date: January 2, 2014
    Applicant: Zimmer, Inc.
    Inventors: Oludele O. Popoola, David M. Miller, Jeffrey P. Anderson, Brian H. Thomas
  • Patent number: 8602289
    Abstract: A method of room-temperature bonding a plurality of substrates via an intermediate member, includes: forming the intermediate member on a surface to be bonded of the substrate by physically sputtering a plurality of targets; and activating the surface to be bonded by an ion beam. Preferably, the target composed of a plurality of types of materials is physically sputtered. Since the materials of the intermediate member are sputtered from the plurality of targets arranged in various directions from the surface to be bonded of the substrate, the intermediate member can be uniformly formed on the surface to be bonded. Further, since the intermediate member is composed of the plurality of types of materials, the room-temperature bonding of substrates difficult to bond together when an intermediate member is composed of a single type of material can be performed without heating and excessively pressing the substrates during bonding.
    Type: Grant
    Filed: September 6, 2007
    Date of Patent: December 10, 2013
    Assignees: Mitsubishi Heavy Industries, Ltd., National Institute of Advanced Industrial Science and Technology
    Inventors: Takayuki Goto, Jun Utsumi, Kensuke Ide, Hideki Takagi, Masahiro Funayama
  • Publication number: 20130312943
    Abstract: This application provides, inter alia, processes for producing an integral bond between a high-grade steel component and an aluminum or aluminum alloy component. In an exemplary embodiment, the process comprises coating the high-grade steel first with a nickel layer and second an aluminum layer, arranging the coated high-grade steel and the aluminum or aluminum alloy components in relation to one another in such a manner that partial regions of the first and of the second component are arranged parallel to one another and either bear areally against one another or are arranged with a gap of 0 mm to 5 mm in relation to one another, and integrally bonding the coated high-grade steel component to the aluminum or aluminum alloy component by using a cold metal transfer process.
    Type: Application
    Filed: May 21, 2013
    Publication date: November 28, 2013
    Applicant: Behr GmbH & Co. KG
    Inventors: Michael WERZ, Spasoje IGNJATOVIC, Rüdiger KÖLBLIN, Klaus BONNERT, Stefan FELBER
  • Patent number: 8514030
    Abstract: Provided are an oven controlled crystal oscillator in which in a case where a metal lead is soldered to a substrate, even if cracks occur in the solder, its reliability is not reduced, and a production method. That is, an oven controlled crystal oscillator in which pre-tinning solders are formed around openings on a front surface and a rear surface of a substrate in which of a through hole for passing a metal lead therethrough is formed; and in a state where a metal lead including a solder layer (a pre-tinning solder) formed on its surface is inserted into the through hole of the substrate, the metal lead extending from the openings is soldered to the openings on the front surface and the rear surface of the substrate, so as to form a main solder, and a production method of the oven controlled crystal oscillator are provided.
    Type: Grant
    Filed: October 5, 2011
    Date of Patent: August 20, 2013
    Assignee: Nihon Dempa Kogyo Co., Ltd
    Inventors: Daisuke Nishiyama, Hiroyuki Murakoshi, Kenji Kasahara
  • Publication number: 20130206821
    Abstract: After a first coating portion formed on a bonding face of a first bonding portion and a second coating portion formed on a bonding face of a second bonding portion are removed by reverse sputtering, copper sputtering is performed to form first and second copper films. The gap between the oxide film on the outermost face of the first copper film and the oxide film on the outermost face of the second copper film is filled with a solution into which copper oxide can be eluted, thereby eluting copper oxide contained in the oxide film in the solution. By applying pressure and heat, the components contained in the solution are removed except for copper, thereby bonding the outermost face of the first copper film and the outermost face of the second copper film to each other by means of copper solid-phase diffusion.
    Type: Application
    Filed: February 20, 2013
    Publication date: August 15, 2013
    Applicant: SANYO ELECTRIC CO., LTD.
    Inventor: Sanyo Electric Co., Ltd.
  • Patent number: 8492005
    Abstract: In joining a magnesium alloy material 1 (first material) and a steel material (second material), a zinc-plated steel plate 2 plated with zinc (metal C) is used as a steel material, Al (metal D) is added to the magnesium alloy material 1. Next, eutectic melting of Mg and Zn is caused so as to remove a product produced by the eutectic melting with an oxide film 1f and impurities from a joint interface. Moreover, an Al—Mg system intermetallic compound such as Al3Mg2 and an Fe—Al system intermetallic compound such as FeAl3 are produced, whereby regenerated surfaces of both materials 1 and 2 are joined via a compound layer 3 containing those intermetallic compounds.
    Type: Grant
    Filed: January 16, 2009
    Date of Patent: July 23, 2013
    Assignee: Nissan Motor Co., Ltd.
    Inventors: Shigeyuki Nakagawa, Kenji Miyamoto, Minoru Kasukawa, Masao Aihara, Sadao Yanagida, Akio Hirose
  • Patent number: 8448842
    Abstract: An advanced copper bonding with ceramic substrate technology includes the steps of (1) forming a copper film of thickness <1 ?m on a ceramic substrate by sputtering deposition under 1.33×10?3 torr and 150° C., (2) plating a copper layer of thickness 10˜50 ?m at room temperature, and (3) bonding a copper foil to the ceramic substrate by diffusion bonding under environments of high temperature, vacuum, and negative pressure inertia gas or H2 partial pressure.
    Type: Grant
    Filed: December 22, 2011
    Date of Patent: May 28, 2013
    Assignee: Vaclong Vacuum Technology Co., Ltd.
    Inventor: Rong-Fu Wu
  • Publication number: 20130101828
    Abstract: A method for brazing a component in a power generation system, the brazed power generation system component, and braze are provided to improve repairing power generation systems. The method includes providing the component having a feature in a surface of the component and coating a particulate material with a filler material to obtain a coated particulate material. The method includes preparing the feature to obtain a treatment area and filling the treatment area in the surface of the component with the coated particulate material. The method includes heating the treatment area and surrounding component to a brazing temperature and applying oxidation protection to the treatment area. After the brazing temperature is obtained, the method includes brazing the treatment area and the screen and cooling the component to obtain a brazed joint.
    Type: Application
    Filed: October 21, 2011
    Publication date: April 25, 2013
    Applicant: GENERAL ELECTRIC COMPANY
    Inventors: Junyoung PARK, Jason Robert PAROLINI, Ibrahim UCOK, Brian Lee TOLLISON, Stephen WALCOTT, Jon Conrad SCHAEFFER
  • Patent number: 8420722
    Abstract: Provided are a composition for an anisotropic conductive adhesive, a method of forming a solder bump and a method of forming a flip chip using the same. The composition for an anisotropic conductive adhesive includes a low melting point solder particle and a thermo-curable polymer resin. The anisotropic conductive adhesive includes forming a mixture by mixing a polymer resin and a curing agent, and mixing a deforming agent, a catalyst or a reductant with the mixture.
    Type: Grant
    Filed: June 2, 2009
    Date of Patent: April 16, 2013
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Yong Sung Eom, Jong Tae Moon, Sangwon Oh, Keonsoo Jang
  • Publication number: 20130087365
    Abstract: A method has been described for making an electrical structure having an air dielectric and includes forming a first subunit including a sacrificial substrate, an electrically conductive layer including a first metal on the sacrificial substrate, and a sacrificial dielectric layer on the sacrificial substrate and the electrically conductive layer. The method further includes forming a second subunit including a dielectric layer and an electrically conductive layer thereon including the first metal, and coating a second metal onto the first metal of one or more of the first and second subunits. The method also includes aligning the first and second subunits together, heating and pressing the aligned first and second subunits to form an intermetallic compound of the first and second metals bonding adjacent metal portions together, and removing the sacrificial substrate and sacrificial dielectric layer to thereby form the electrical structure having the air dielectric.
    Type: Application
    Filed: October 5, 2011
    Publication date: April 11, 2013
    Applicant: Harris Corporation
    Inventors: Michael Raymond Weatherspoon, Louis Joseph Rendek, JR., Lawrence Wayne Shacklette, Robert Patrick Maloney, David M. Smith
  • Patent number: 8390122
    Abstract: Methods are generally provided for forming a conductive oxide layer on a substrate. In one particular embodiment, the method can include sputtering a transparent conductive oxide layer (e.g., including cadmium stannate) on a substrate from a target in a sputtering atmosphere comprising cadmium. The transparent conductive oxide layer can be sputtered at a sputtering temperature greater of about 100° C. to about 600° C. Methods are also generally provided for manufacturing a cadmium telluride based thin film photovoltaic device.
    Type: Grant
    Filed: September 19, 2011
    Date of Patent: March 5, 2013
    Assignee: Primestar Solar, Inc.
    Inventor: Scott Daniel Feldman-Peabody
  • Publication number: 20130049204
    Abstract: A semiconductor device includes a substrate and a first sintered silver layer on the substrate. The semiconductor device includes a first semiconductor chip and a first diffusion soldered layer coupling the first semiconductor chip to the first sintered silver layer.
    Type: Application
    Filed: August 22, 2011
    Publication date: February 28, 2013
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Niels Oeschler, Kirill Trunov, Roland Speckels
  • Publication number: 20130043564
    Abstract: A MEMS is attached to a bonding wafer in part by forming a support layer over the MEMS. A first eutectic layer is formed over the support layer. The eutectic layer is patterned into segments to relieve stress. A second eutectic layer is formed over the bonding wafer. A eutectic bond is formed with the segments and the second eutectic layer to attach the bonding wafer to the MEMS.
    Type: Application
    Filed: August 16, 2011
    Publication date: February 21, 2013
    Inventors: LISA H. KARLIN, Hemant D. Desai
  • Publication number: 20130022836
    Abstract: The present disclosure relates to brazed coated diamond-containing materials and methods of producing brazed coated diamond-containing materials. The method for brazing the coated diamond-containing material may include bringing a braze metal into contact with the refractory metal layer and a substrate; heating at least the braze metal above the melting temperature of the braze metal; and bringing the braze metal into contact with the substrate to form a braze metal layer to join the diamond-containing material, braze metal layer, and substrate together. An advantage of the method may include that the brazing step may be performed in air, under ambient pressure, and without the need for a protective layer.
    Type: Application
    Filed: July 19, 2012
    Publication date: January 24, 2013
    Applicant: DIAMOND INNOVATIONS, INC.
    Inventors: Thomas C. Easley, Yuanbo Lin, Dwight Dyer
  • Publication number: 20130011301
    Abstract: Hydrogen generation assemblies, hydrogen purification devices, and their components, and methods of manufacturing those assemblies, devices, and components are disclosed. In some embodiments, the assemblies may include a vaporization region with packing material configured to transfer heat from a heated exhaust stream to a liquid-containing feed stream, and/or an insulation base adjacent a combustion region and configured to reduce external temperature of an enclosure. In some embodiments, the assemblies may include a cooling block configured to maintain an igniter assembly in thermal communication with a feed stream conduit, an igniter assembly including a catalytic coating, and/or a fuel stream distribution assembly. In some embodiments, the assemblies may include a heat conducting assembly configured to conduct heat from external heaters to an enclosure portion.
    Type: Application
    Filed: July 7, 2011
    Publication date: January 10, 2013
    Inventor: David J. Edlund
  • Publication number: 20120318570
    Abstract: A bump structure comprises a first polymer block, a second polymer block, a first groove, an under bump metallurgy layer and a connection metal layer, wherein the first polymer block and the second polymer block are individual blocks. The first polymer block comprises a first connection slot, and the second polymer block comprises a second connection slot communicated with the first groove and the first connection slot. The under bump metallurgy layer covers the first polymer block and the second polymer block to form a second groove. The connection metal layer covers the under bump metallurgy layer to form a third groove, wherein the under bump metallurgy layer covers a first coverage area of the first polymer block and a second coverage area of the second polymer block and reveals a first exposure area of the first polymer block and a second exposure area of the second polymer block.
    Type: Application
    Filed: June 20, 2011
    Publication date: December 20, 2012
    Inventors: Cheng-Hung Shih, Shyh-Jen Guo, Wen-Tung Chen
  • Publication number: 20120152510
    Abstract: A bonding structure includes a first member, a second member and a bonding member. The first member has a plate shape and is made of a carbon-base material. The first member serves as a heat diffusion member that transfers heat at least in a thickness direction, which is perpendicular to a plane of the plate shape. The second member is bonded to the first member through the bonding member. The first member has a metal thin film at least on an opposed surface that is opposed to the second member. The bonding member is disposed between the opposed surface of the first member and the second member. The bonding member is provided by a sintered body of metal particle. For example, the bonding structure is employed in a cooling unit including a heat source.
    Type: Application
    Filed: December 14, 2011
    Publication date: June 21, 2012
    Applicants: Nippon Soken, Inc., DENSO CORPORATION
    Inventors: Koji Noda, Satoshi Sakimichi, Masahiro Sakamoto, Kimio Kohara
  • Patent number: 8179690
    Abstract: A cut-edge positioning type soldering structure and a method for preventing a pin deviation can prevent a plurality of pins of an electronic component from being deviated when the pins are soldered onto a printed circuit board by a solder, and each of at least two solder pads includes at least two cut edges, and the solder pads are installed in an alignment direction on the printed circuit board, such that the cut-edge positioning type soldering structure and the method for preventing a pin deviation can improve the efficiency of manufacturing processes and reduce the manufacturing cost.
    Type: Grant
    Filed: July 22, 2010
    Date of Patent: May 15, 2012
    Assignee: Askey Computer Corp.
    Inventors: Hsiang-Chih Ni, Ching-Feng Hsieh
  • Publication number: 20120112201
    Abstract: A high melting point soldering layer includes a low melting point metal layer, a first high melting point metal layer disposed on a surface of the low melting point metal layer, and a second high melting point metal layer disposed at a back side of the low melting point metal layer. The low melting point metal layer, the first high melting point metal layer, and the second high melting point metal layer are mutually alloyed by transient liquid phase bonding, by annealing not less than a melting temperature of the low melting point metal layer, diffusing the metal of the low melting point metal layer into an alloy of the first high melting point metal layer and the second high melting point metal layer. The high melting point soldering layer has a higher melting point temperature than that of the low melting point metal layer.
    Type: Application
    Filed: November 9, 2010
    Publication date: May 10, 2012
    Applicants: Board of Trustees of the Univ. of Arkansas, acting for&on behalf of the Univ. of Arkansas,Fayetevill, ROHM CO., LTD.
    Inventors: Takukazu OTSUKA, Keiji OKUMURA, Brian LYNN ROWDEN
  • Publication number: 20120043371
    Abstract: A wiring substrate includes a conductor layer and a resin insulating layer stacked alternately, solder resist layers formed on outermost surfaces on a first principal surface side and an opposing second principal surface side respectively, and outermost conductor layers exposed from opening portions formed in the respective solder resist layers. A method of manufacturing the wiring substrate includes: forming a first underlying layer and a second underlying layer on the respective outermost conductor layers; supplying a first solder onto the first underlying layer, and a second solder onto the second underlying layer; and connecting the first solder to the first underlying layer and the second solder to the second underlying layer respectively, by heating the first solder and the second solder simultaneously.
    Type: Application
    Filed: August 23, 2011
    Publication date: February 23, 2012
    Applicant: NGK SPARK PLUG CO., LTD.
    Inventors: Takahiro HAYASHI, Satoru WATANABE, Hajime SAIKI, Koji SAKUMA
  • Publication number: 20120037688
    Abstract: The invention relates to a method for producing a connection between a semiconductor component and semiconductor component and semiconductor module resistant to high temperatures and temperature changes by means of a temperature impinging process, wherein a metal powder suspension is applied to the areas of the semiconductor module to be connected later; the suspension layer is dried, outgassing the volatile components and generating a porous layer; the porous layer is pre-sealed without complete sintering taking place throughout the suspension layer; and, in order to obtain a solid electrically and thermally conductive connection of a semiconductor module to a connection partner from the group of: substrate, further semiconductor or interconnect device, the connection is a sintered connection generated without compression by increasing the temperature and made of a dried metal powder suspension that has undergone a first transport-safe contact with the connection partner in a pre-compression step and has bee
    Type: Application
    Filed: February 4, 2010
    Publication date: February 16, 2012
    Applicant: DANFOSS SILICON POWER GMBH
    Inventors: Mathias Kock, Ronald Eisele
  • Publication number: 20120006885
    Abstract: A Thermal Interface Material (“TIM”) composition of matter with improved heat conductivity comprises solderable heat-conducting particles in a bondable resin matrix and at least some of the solderable heat-conducting particles comprise a solder surface. Positioning the TIM between a first surface having a solder adhesion layer and a second surface, and then heating it results in soldering some of the solderable heat-conducting particles to one another; and some to the solder-adhesion layer on the first surface as well as adhesively bonding the resin matrix to the first surface and the second surface. The first surface can comprise an electronic device, e.g., a semiconductor device and the second surface a heat sink, such as a solderable heat sink. A product comprises an article of manufacture made by the process.
    Type: Application
    Filed: September 7, 2011
    Publication date: January 12, 2012
    Inventors: George Liang-Tai Chiu, Sung-Kwon Kang
  • Patent number: 8083121
    Abstract: In the soldering method, metal-powder-contained flux is disposed between bumps and circuit electrodes when electronic parts are mounted by soldering, the metal powder comprising a core metal formed of metal such as tin and zinc and a surface metal covering surfaces of the core metal formed of noble metal such as gold and silver. Accordingly, metal powder will not remain as residue that is liable to cause migration after the reflow process, and it is possible to assure both soldering effect and insulation effect.
    Type: Grant
    Filed: October 27, 2005
    Date of Patent: December 27, 2011
    Assignee: Panasonic Corporation
    Inventors: Tadashi Maeda, Tadahiko Sakai
  • Publication number: 20110303341
    Abstract: The invention allows for the contacting of preferably microcomponents using electrical wires. By growing metallic microdepositions on cut surfaces of microcables, a contact region is generated which simplifies the dosing and application of a contact auxiliary and allows ultrasonic bonding, comprising a defined size of the electrically conductive area and allowing the contacting of very stably insulated wires. The application of this method in a panelized manner and in series is inexpensive.
    Type: Application
    Filed: December 8, 2009
    Publication date: December 15, 2011
    Inventors: Thorsten Meiss, Tim Rossner
  • Publication number: 20110248073
    Abstract: A multi-layer seal arrangement includes a dissolution barrier between a braze alloy and a ceramic component. The inventive seal is useful for joining a ceramic component to another ceramic component or a metal component, for example. In one example, the braze comprises a gold alloy and the dissolution barrier comprises a layer of alumina on the order of 2-3 microns thick. A titanium wetting layer is provided between the alumina layer and the alloy. A metallization layer provided between the dissolution barrier and the ceramic component in one example comprises a layer of gold between two thin layers of titanium. In one particular example, a platinum mesh is included with the gold of the braze alloy to control braze flow during the brazing operation.
    Type: Application
    Filed: June 21, 2011
    Publication date: October 13, 2011
    Inventors: Sunil G. Warrier, Richard S. Bailey, Willard H. Sutton
  • Publication number: 20110233793
    Abstract: In one embodiment, a preliminary solder layer made of a Sn alloy is formed on a connecting pad of a wiring substrate. A solder bump made of a Sn alloy is formed on an electrode pad of a semiconductor chip. After contacting the preliminary solder layer and the solder bump, the preliminary solder layer and the solder bump are melted by heating to a temperature of their melting points or higher to form a solder connecting part made of a Sn alloy containing Ag and Cu. Only the preliminary solder layer of the preliminary solder layer and the solder bump is composed of a Sn alloy containing Ag.
    Type: Application
    Filed: February 18, 2011
    Publication date: September 29, 2011
    Inventors: Masayuki MIURA, Katsuhiko OYAMA
  • Publication number: 20110159313
    Abstract: [Object] To provide a joining method for dissimilar metals which are magnesium alloy and steel and difficult to be metallurgically directly joined to each other while oxide film is present at a joining surface. [Solving Means] In order to join magnesium alloy material 1 and steel plate 2 to each other, a galvanized steel plate to which Zn—Al—Mg alloy plating (a third material) is applied is used as the steel plate 2. When joining is made, ternary eutectic melting of Al—Mg—Zn is caused, so that it is discharged together with oxide film 1f and impurities from the joining interface while Al—Mg intermetallic compound such as Al3Mg2 and Fe—Al intermetallic compound such as FeAl3 are formed, thereby joining the newly generated surfaces of the magnesium alloy material 1 and the steel plate 2 to each other through a compound layer 3 containing these intermetallic compounds.
    Type: Application
    Filed: August 26, 2009
    Publication date: June 30, 2011
    Inventors: Minoru Kasukawa, Shigeyuki Nakagawa, Kenji Miyamoto
  • Publication number: 20110064963
    Abstract: The present invention provides a method for coating an article comprising applying a thermal spray coating to the article; applying a brazing material to the article; and heating the brazing material to at least a brazing temperature of the brazing material to form a resultant coating on the article, wherein the resultant coating is characterized by at least partial metallurgical bonding or at least partial alloying between the thermal spray coating and the brazing material.
    Type: Application
    Filed: September 29, 2009
    Publication date: March 17, 2011
    Inventors: Justin Lee Cheney, John Hamilton Madok
  • Publication number: 20110052401
    Abstract: A method is disclosed for joining steel and nickel alloy turbine rotor components as is a joined turbine rotor combination produced by the method. The method includes: providing a steel rotor component; providing (e.g., laying down) a nickel alloy butter layer on the steel component; providing a nickel alloy rotor component; and welding the nickel alloy butter layer to the nickel alloy component using a nickel alloy weld filler so as to join together the components. The butter layer, laid first to the steel component, can enable reliable testing, for defects, of a nickel alloy/steel fusion line.
    Type: Application
    Filed: August 24, 2010
    Publication date: March 3, 2011
    Applicant: ALSTOM TECHNOLOGY LTD
    Inventors: Richard Brendon Scarlin, Martin Reigl
  • Publication number: 20110051314
    Abstract: There are provided a ceramic electronic component and a method for producing the ceramic electronic component, where a ground electrode layer can be directly coated with lead-free solder without lowering reliabilities. Terminal electrode 3 is provided with a ground electrode layer 21 of Cu having been formed by firing, a solder layer 22 formed of a lead-free solder based on five elements of Sn—Ag—Cu—Ni—Ge, and a diffusion layer 23 having been formed by the diffusion of Ni between the ground electrode layer 21 and the solder layer 22. Because the diffusion layer 23 of Ni is formed between the ground electrode layer 21 and the solder layer 22, the diffusion layer 23, which functions as a barrier layer, suppresses the solder leach of Cu from the ground electrode layer 21. The diffusion layer 23 of Ni can also suppress the growth of fragile intermetallic compounds of Sn—Cu. Therefore, a decrease in the bonding strength between the ground electrode layer 21 and the solder layer 22 can be prevented.
    Type: Application
    Filed: August 5, 2010
    Publication date: March 3, 2011
    Applicant: TDK CORPORATION
    Inventors: Takashi SAKURAI, Shinya Yoshihara, Ko Onodera, Hisayuki Abe, Masahiko Konno, Satoshi Kurimoto, Hiroshi Shindo, Akihiro Horita, Genichi Watanabe, Yoshikazu Ito
  • Publication number: 20110024483
    Abstract: The invention relates to a method of assembling gold alloy parts that enables identical or different gold alloys, particularly gold alloys of different colors, to be assembled. This method comprises the following steps: a) a film of tin is applied over at least one portion of a face of a first gold alloy part; b) the tinned face of the first gold alloy part is brought directly into contact with a face of a second gold alloy part; c) the first and second parts are pressed against each other; and d) the assembly is heated. This method may be used to manufacture checkerboards.
    Type: Application
    Filed: July 30, 2010
    Publication date: February 3, 2011
    Applicant: DANIEL ROTH & GERALD GENTA HAUTE HORLOGERIE S.A.
    Inventor: Jérôme Pech
  • Patent number: 7875129
    Abstract: A method of assembling aluminum alloy products, such as sheets, strips or tubes, by means of fluxless brazing, where the absence of flux is made possible by using a prior treatment resulting in formation of a conversion layer on the surface of the products. The treatment involves using a solution containing K+ and F? ions and at least one acid in a quantity such that the pH of the solution is less than 3. The inventive method enables effective flux was brazing in industrial conditions, such as a for the production of heat exchangers used in motor vehicles.
    Type: Grant
    Filed: July 26, 2005
    Date of Patent: January 25, 2011
    Assignee: Alcan Rhenalu
    Inventors: Sylvestre Safrany, Michel Mediouni, Sylvain Henry, Sandrine Dulac
  • Publication number: 20100327431
    Abstract: Various thermal interface structures and methods are disclosed. In one aspect, a method of manufacturing is provided. The method includes providing plural carbon nanotubes in a thermal interface structure. The thermal interface structure is soldered to a side of a semiconductor chip. In another aspect, an apparatus is provided. The apparatus includes a thermal interface structure that has plural carbon nanotubes. A semiconductor chip is soldered to the thermal interface structure.
    Type: Application
    Filed: June 29, 2009
    Publication date: December 30, 2010
    Inventors: Maxat N. Touzelbaev, Gamal Refai-Ahmed
  • Publication number: 20100323213
    Abstract: A wear resistant multilayer overlay includes a first layer on at least a surface of an article, and a second layer metallurgically bonded to at least a portion of the first layer. The first layer includes a first continuous metallic matrix and at least one of first hard particles, blocky diamond particles, non-blocky diamond particles, TSP diamond, cubic boron nitride particles, and PCD compacts embedded in the first continuous metallic matrix, wherein the first hard particles are at least one of transition metal carbide particles and boron nitride particles. The second layer includes a second continuous metallic matrix and at least one of second hard particles, blocky diamond particles, non-blocky diamond particles, TSP diamond, cubic boron nitride particles, and PCD compacts, embedded in the second continuous metallic matrix, wherein the second hard particles are at least one of transition metal carbide particles and boron nitride particles. Related methods and articles of manufacture also are disclosed.
    Type: Application
    Filed: June 19, 2009
    Publication date: December 23, 2010
    Inventors: Trevor Aitchison, R. Allan Heflin
  • Publication number: 20100288631
    Abstract: A method for producing a ceramic sputtering target assembly has steps of providing a backing plate and forming a solder layer on a surface of the backing plate; providing a ceramic target and forming an interface layer on a surface of the ceramic target; annealing the ceramic target with the interface layer; and solder-bonding the solder layer of the backing plate and the interface layer of the ceramic target to obtain the ceramic sputtering target assembly. By annealing the interface layer made of chromium or chromium-containing alloy, the interface layer provides excellent adhesive ability to solder-bonding the solder layer and allows the ceramic target and the backing plate to be combined securely.
    Type: Application
    Filed: May 12, 2009
    Publication date: November 18, 2010
    Applicant: SOLAR APPLIED MATERIALS TECHNOLOGY CORP.
    Inventors: Kuo-Hsien WU, Cheng-Hsin TU
  • Publication number: 20100187560
    Abstract: A method for bonding two partially form-fitting surfaces of two metal bodies which contain the same metal is carried out by generating a first layer on the surface of a first one of the two bodies, the first layer containing a mixture of the metal and the oxide of the metal; generating a second layer on the first layer, the second layer containing the metal but less oxide of the metal than does the first layer; placing the partially form-fitting surfaces of the two metal bodies adjacent to each other; heating the bodies placed adjacent to each other to a temperature which lies in a target range below the melting point of the metal and above the eutectic temperature of the eutectic of the metal and the metal oxide; and holding the temperature within the target range over a predetermined or a controllable duration of time.
    Type: Application
    Filed: October 31, 2007
    Publication date: July 29, 2010
    Applicant: PERKIN ELMER OPTOELECTRONICS GMBH & CO. KG
    Inventors: Ulrich Traupe, Stefan Weise, Pellegrino Ballacchino, Edgar Spandl
  • Publication number: 20100084755
    Abstract: Stacked semiconductor chip package system vertical interconnects and related methods are disclosed. A preferred embodiment of the invention includes a first semiconductor chip with a surface bearing a plurality of first fusible metallic coupling elements. A second semiconductor chip has a plurality of second fusible metallic coupling elements. The first and second fusible metallic coupling elements correspond at the adjoining surfaces of the first and second semiconductor chips when stacked, and are fused to form a gold-tin eutectic alloy fused metallic coupling vertically interconnecting the stacked chips.
    Type: Application
    Filed: October 8, 2008
    Publication date: April 8, 2010
    Inventors: Mark Allen Gerber, Kurt Wachtler, Abram Marc Castro
  • Patent number: 7690551
    Abstract: A die attach process employs a temperature gradient lead free soft solder metal sheet or thin film as the die attach material. The sheet or thin film is formed to a uniform thickness and has a heat vaporizable polymer adhesive layer on one surface, by which the thin film is laminated onto the back metal of the silicon wafer. The thin film is lead-free and composed of acceptably non-toxic materials. The thin film remains semi-molten (that is, not flowable) in reflow temperatures in the range about 260° C. to 280° C. The polymer adhesive layer is effectively vaporized at the high reflow temperatures during the die mount.
    Type: Grant
    Filed: December 31, 2004
    Date of Patent: April 6, 2010
    Assignee: ChipPAC, Inc.
    Inventor: Ong You Yang
  • Patent number: 7690113
    Abstract: A process for producing a high temperature-resistant structure provides at least one at least partially structured metallic layer. A smooth metallic layer is deformed by a rolling process, in which oil at least partially wets the at least one layer. The oil is at least partially removed. Lubricant is fed onto at least one subsection of the at least one layer. A structure is at least partially shaped. Technical joining connections are produced for fixing the structure.
    Type: Grant
    Filed: October 30, 2006
    Date of Patent: April 6, 2010
    Assignee: EMITEC Gesellschaft fuer Emissionstechnologie mbH
    Inventor: Kait Althöfer
  • Publication number: 20100065246
    Abstract: Methods and associated structures of forming an indium containing solder material directly on an active region of a copper HIS is enabled. A copper indium containing solder intermetallic is formed on the active region of the IHS. The solder intermetallic improves the solder-TIM integration process for microelectronic packaging applications.
    Type: Application
    Filed: September 17, 2008
    Publication date: March 18, 2010
    Inventors: Abhishek Gupta, Mike Boyd, Carl Deppisch, Jinlin Wang, Daewoong Suh, Brad Drew
  • Patent number: 7658315
    Abstract: A process for brazing components formed of superalloys that contain elements prone to oxidation during brazing. At least one braze tape is applied to at least one faying surface of at least a first of the components being joined by brazing. The braze tape comprises a braze tape alloy containing the base metal of the superalloys and a melting point suppressant, and is applied so as to substantially cover the faying surface. The braze tape is then bonded to the faying surface by heating the first component to a temperature not exceeding the brazing temperature required to join the components. Thereafter, the components are assembled so that the bonded braze tape are between the respective faying surfaces of the components. The components are then brazed together by applying and heating a braze alloy to the braze temperature.
    Type: Grant
    Filed: January 9, 2006
    Date of Patent: February 9, 2010
    Assignee: General Electric Company
    Inventors: David Edwin Budinger, Ronald Lance Galley, Nripendra Nath Das
  • Publication number: 20100006625
    Abstract: Provided are a composition for an anisotropic conductive adhesive, a method of forming a solder bump and a method of forming a flip chip using the same. The composition for an anisotropic conductive adhesive includes a low melting point solder particle and a thermo-curable polymer resin. The anisotropic conductive adhesive includes forming a mixture by mixing a polymer resin and a curing agent, and mixing a deforming agent, a catalyst or a reductant with the mixture.
    Type: Application
    Filed: June 2, 2009
    Publication date: January 14, 2010
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Yong Sung EOM, Jong Tae MOON, Sangwon OH, Keonsoo JANG
  • Publication number: 20100001045
    Abstract: A method of producing standoffs in an injection molded solder (IMS) mold, which possesses cavities, each of which is filled with a solder paste using standard techniques, such as screening or IMS. This solder paste is heated to a reflow temperature at which the solder melts and forms a ball or sphere. Since solder pastes are known to reduce in volume due to the therein contained organic material burning off, the remaining solder ball will be significantly lower in volume than that of the cavity. A solder material having a lower melting point is then filled into the cavities about the solder balls. The mold and solder metal are then allowed to cool, resulting in the formation of a solid sphere of metal in the cavity surrounded by solder material of a lower melting point, which, upon transfer to a wafer, form the standoffs.
    Type: Application
    Filed: July 2, 2008
    Publication date: January 7, 2010
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Steven A. Cordes, Peter A. Gruber
  • Publication number: 20100001046
    Abstract: A solder machine uses various linear actuators to move a PWB carrier in three degrees of freedom relative to a solder bath, to facilitate safe loading and unloading of PWBs onto the carrier while the carrier is distanced from the bath, and then to move the carrier over the bath, lower it, and tilt it as necessary to effect soldering.
    Type: Application
    Filed: July 3, 2008
    Publication date: January 7, 2010
    Inventors: Esteban Arturo Alvarez Serrano, Horman Armando Millan Sanchez