Abstract: A hybrid heterostructure includes a semiconductor layer comprising indium antimonide, a superconductor layer comprising aluminum, and a screening layer between the semiconductor layer and the superconductor layer, the screening layer comprising indium arsenide. By including a screening layer of indium arsenide between the semiconductor layer of indium antimonide and the superconductor layer of aluminum, a high-performance and durable hybrid heterostructure suitable for use in quantum computing devices is provided.

Abstract: An optoelectronic device comprising a semiconductor structure includes a p-type active region, an n-type active region, and an i-type active region. The semiconductor structure is comprised solely of one or more superlattices, where each superlattice is comprised of a plurality of unit cells. Each unit cell can comprise a layer of GaN and a layer of AlN. In some cases, a combined thickness of the layers comprising the unit cells in the i-type active region is thicker than a combined thickness of the unit cells in the n-type active region, and is thicker than a combined thickness of the unit cells in the p-type active region. The layers in the unit cells in each of the three regions can all have thicknesses that are less than or equal to a critical layer thickness required to maintain elastic strain.

Abstract: An optoelectronic device comprising a semiconductor structure includes a p-type active region, an n-type active region, and an i-type active region. The semiconductor structure is comprised solely of one or more superlattices, where each superlattice is comprised of a plurality of unit cells. Each unit cell can comprise a layer of GaN and a layer of AlN. In some cases, a combined thickness of the layers comprising the unit cells in the i-type active region is thicker than a combined thickness of the unit cells in the n-type active region, and is thicker than a combined thickness of the unit cells in the p-type active region. The layers in the unit cells in each of the three regions can all have thicknesses that are less than or equal to a critical layer thickness required to maintain elastic strain.

Abstract: An optical semiconductor element comprises: an AlN substrate; an n-type semiconductor layer composed of an AlGaN layer, the AlGaN layer being grown on the AlN substrate and being pseudomorphic with the AlN substrate, an Al composition or the AlGaN layer being reduced with an increase in distance from the AlN substrate; an active layer which is grown on the n-type semiconductor layer; and a p-type semiconductor layer which is grown on the active layer.

Abstract: According to an aspect of the present disclosure, there is provided a III-N semiconductor structure comprising: a semiconductor-on-insulator substrate; a buffer structure comprising a superlattice including at least a first superlattice block and a second superlattice block formed on the first superlattice block, the first superlattice block including a repetitive sequence of first superlattice units, each first superlattice unit including a stack of layers of AlGaN, wherein adjacent layers of the stack have different aluminum content, the second superlattice block including a repetitive sequence of second superlattice units, each second superlattice unit including a stack of layers of AlGaN, wherein adjacent layers of the stack have different aluminum content, wherein an average aluminum content of the second superlattice block is greater than an average aluminum content of the first superlattice block; and a III-N semiconductor channel layer arranged on the buffer structure.

Abstract: A transistor is fabricated by growing an epitaxial layer of semiconductor material on a semiconductor layer and forming an opening extending through the epitaxial layer at the gate location. This opening provides, from the epitaxial layer, a source epitaxial region on one side of the opening and a drain epitaxial region on an opposite side of the opening. The source epitaxial region and a first portion of the semiconductor layer underlying the source epitaxial region are annealed into a single crystal transistor source region. Additionally, the drain epitaxial region and a second portion of the semiconductor layer underlying the drain epitaxial region are annealed into a single crystal transistor drain region. A third portion of the semiconductor layer between the transistor source and drain regions forms a transistor channel region. A transistor gate electrode is then formed in the opening above the transistor channel region.

Abstract: A method for making a CMOS image sensor may include forming a plurality of laterally adjacent photodiodes on a semiconductor substrate having a first conductivity types by forming a retrograde well extending downward into the substrate from a surface thereof and having a second conductivity type, forming a first well around a periphery of the retrograde well also having the second conductivity type, and forming a second well within the retrograde well having the first conductivity type. Furthermore, first and second superlattices may be respectively formed overlying each of the first and second wells, with each of the first and second superlattices comprising a plurality of stacked groups of layers, and each group of layers comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions.

Abstract: A device may include a substrate and an active region. This active region may include a stack of semiconductor gain materials stacked along a stacking direction. The latter may extend substantially perpendicular to a plane of the substrate. The active region may be furthermore tapered so as to widen toward the substrate. In addition, the device may include a pair of doped layers semiconductor materials, the pair may include an n-doped layer and a p-doped layer arranged on the substrate and on opposite. The doped layers may be arranged on the substrate and on opposite, lateral sides of the tapered active region, respectively. The device may include an electron blocking layer, which may extend both at a first interface, between a p-doped layer and the substrate, and at a second interface, between the tapered active region and the p-doped layer, along a lateral side of the tapered active region.

Abstract: A semiconductor optical device 1 includes an active layer 4 provided on a substrate 2, a clad layer 5 provided on the active layer 4, and a contact layer 7 provided on the clad layer 5. The contact layer 7 contains a first impurity and a second impurity different from the first impurity. A semiconductor light source includes the active layer 4 provided on the substrate 2, the clad layer 5 provided on the active layer 4, and the contact layer 7 provided on the clad layer 5. The contact layer 7 contains the first impurity and the second impurity different from the first impurity.

Abstract: An UV photodetector includes: a substrate, a template layer formed on the substrate, an intrinsic AlGaN layer formed on the template layer, a first n-type AlGaN layer and a second n-type AlGaN layer formed on the intrinsic AlGaN layer side-by-side and separated by a gap, wherein the gap exposes the intrinsic AlGaN layer. Another UV photodetector includes: an UV transparent substrate, an UV transparent template layer formed on the substrate, a first UV transparent n-type AlGaN layer formed on the UV transparent template layer, an intrinsic AlGaN layer formed on the first UV transparent n-type AlGaN layer, a second n-type AlGaN layer formed on the intrinsic AlGaN layer, and a p-type layer formed on the second n-type AlGaN layer.

Abstract: The disclosed embodiments provide a system that implements an optical interface. The system includes a semiconductor chip with a silicon layer, which includes a silicon waveguide, and an interface layer (which can be comprised of SiON) disposed over the silicon layer, wherein the interface layer includes an interface waveguide. The system also includes an optical coupler that couples an optical signal from the silicon waveguide in the silicon layer to the interface waveguide in the interface layer, wherein the interface waveguide channels the optical signal in a direction parallel to a top surface of the semiconductor chip. The system additionally includes a mirror, which is oriented to reflect the optical signal from the interface waveguide in a surface-normal direction so that the optical signal exits the top surface of the semiconductor chip.

Abstract: There is provided a method for manufacturing a nanostructure semiconductor light emitting device, including: forming a mask having a plurality of openings on a base layer; growing a first conductivity-type semiconductor layer on exposed regions of the base layer such that the plurality of openings are filled, to form a plurality of nanocores; partially removing the mask such that side surfaces of the plurality of nanocores are exposed; heat-treating the plurality of nanocores after partially removing the mask; sequentially growing an active layer and a second conductivity-type semiconductor layer on surfaces of the plurality of nanocores to form a plurality of light emitting nanostructures, after the heat treatment; and planarizing upper parts of the plurality of light emitting nanostructures such that upper surfaces of the nanocores are exposed.

Abstract: There are disclosed herein various implementations of semiconductor structures including III-Nitride interlayer modules. One exemplary implementation comprises a substrate and a first transition body over the substrate. The first transition body has a first lattice parameter at a first surface and a second lattice parameter at a second surface opposite the first surface. The exemplary implementation further comprises a second transition body, such as a transition module, having a smaller lattice parameter at a lower surface overlying the second surface of the first transition body and a larger lattice parameter at an upper surface of the second transition body, as well as a III-Nitride semiconductor layer over the second transition body. The second transition body may consist of two or more transition modules, and each transition module may include two or more interlayers. The first and second transition bodies reduce strain for the semiconductor structure.

Abstract: A broad area laser diode is configured to include an anti-guiding layer located outside of the active region of the device. The anti-guiding layer is formed of a high refractive index material that serves to de-couple unwanted, higher-order lateral modes (attributed to thermal lensing problems) from the lower-order mode output beam of output signal from the laser diode. The anti-guiding layer is formed using a single epitaxial growth step either prior to or subsequent to the steps used to grow the epitaxial layers forming the laser diode itself, thus creating a structure that provides suppression of unwanted higher-order modes without requiring a modification of specific process steps used to fabricate the laser diode itself.

Abstract: A terahertz source implementing a {hacek over (C)}erenkov difference-frequency generation scheme in a quantum cascade laser. The laser includes an undoped or semi-insulating InP substrate with an exit facet that is polished at an angle between 10° to 40°. The laser further includes a first waveguide cladding layer(s) in contact with an active layer (arranged as a multiple quantum well structure) and a current extraction layer on top of the substrate. Furthermore, the laser includes a second waveguide cladding layer(s) on top of the active layer, where the first and second waveguide cladding layers are disposed to form a waveguide structure by which terahertz radiation generated in the active layer is guided inside the laser. The terahertz radiation is emitted into the substrate at a {hacek over (C)}erenkov angle relative to a direction of the nonlinear polarization wave in the active layer, and once in the substrate, propagates towards the exit facet.

Abstract: Apparatus and methods are provided for heat removal and spreading from a field effect transistor (FET) including a substrate, a first source, a first gate, and a drain on the substrate, and a poly-diamond dielectric thermally coupled to the first gate wherein the poly-diamond dielectric facilitates heat removal from a top of the FET.

Abstract: A nitride semiconductor wafer includes a silicon substrate, a first layer, a second layer, a third layer, a fourth layer, a fifth layer, and a sixth layer. The first layer is provided on the silicon substrate. The second layer is provided on the first layer. The third layer is provided on the second layer. The fourth layer is provided on the third layer. The fifth layer is provided on the fourth layer. The sixth layer is provided on the fifth layer. A composition ratio x4 of the fourth layer decreases in a first direction from the third layer toward the fifth layer. A maximum value of the composition ratio x4 is not more than a composition ratio of the third layer. A minimum value of the composition ratio x4 is not less than a composition ratio of the fifth layer.

Abstract: An apparatus for outputting audio signals. The apparatus for outputting audio signals includes a pulse density modulation (PDM) unit for PDM modulating an input audio signal to output a modulated audio signal, a driving signal generator for generating at least one driving signal to control switching amplification operations based on the modulated audio signal, and a power switching amplifier having at least one switch that is turned on or turned off in response to the driving signal and performs the switching amplification operations for using the at least one switch to output an amplified audio signal that corresponds to the modulated audio signal, wherein the at least one switch includes at least one from among a gallium nitride (GaN) transistor, gallium arsenide (GaAs) transistor, and a silicon carbide (SiC) transistor.

Abstract: An artificial composite object combines a quantum of sound with a matter excitation. A phonon in a confinement structure containing the matter excites it from an initial state to an excited state corresponding to a frequency of the phonon. Relaxation of the matter back to the initial state emits a phonon of the same frequency into the confinement structure. The phonon confinement structure, for example, a cavity, traps the emitted phonon thereby allowing further excitation of the matter. The coupling between the phonon and the matter results in a quantum quasi-particle referred to as a phoniton. The phoniton can find application in a wide variety of quantum systems such as signal processing and communications devices, imaging and sensing, and information processing.

Abstract: A nitride semiconductor wafer includes a silicon substrate, a first layer, a second layer, a third layer, a fourth layer, a fifth layer, and a sixth layer. The first layer is provided on the silicon substrate. The second layer is provided on the first layer. The third layer is provided on the second layer. The fourth layer is provided on the third layer. The fifth layer is provided on the fourth layer. The sixth layer is provided on the fifth layer. A composition ratio x4 of the fourth layer decreases in a first direction from the third layer toward the fifth layer. A maximum value of the composition ratio x4 is not more than a composition ratio of the third layer. A minimum value of the composition ratio x4 is not less than a composition ratio of the fifth layer.

Abstract: A method of forming nanowire devices. The method includes forming a stressor layer circumferentially surrounding a semiconductor nanowire. The method is performed such that, due to the stressor layer, the nanowire is subjected to at least one of radial and longitudinal strain to enhance carrier mobility in the nanowire. Radial and longitudinal strain components can be used separately or together and can each be made tensile or compressive, allowing formulation of desired strain characteristics for enhanced conductivity in the nanowire of a given device.

Abstract: A quantum cascade laser includes a semiconductor substrate including a principal surface; a mesa waveguide disposed on the principal surface of the semiconductor substrate, the mesa waveguide including a light emitting region and an upper cladding layer disposed on the light emitting region, the mesa waveguide extending in a direction orthogonal to a reference direction; and a current blocking layer formed on a side surface of the mesa waveguide. The light emitting region includes a plurality of core regions and a plurality of buried regions. The core regions and the buried regions are alternately arranged in the reference direction. The core region at a central portion of the mesa waveguide has a width smaller than a width of the core region at a peripheral portion of the mesa waveguide in the reference direction.

Abstract: A quantum cascade laser includes a semiconductor substrate including a principal surface; a mesa waveguide disposed on the principal surface of the semiconductor substrate, the mesa waveguide including a light emitting region and an upper cladding layer disposed on the light emitting region, the mesa waveguide extending in a direction orthogonal to a reference direction; and a current blocking layer formed on a side surface of the mesa waveguide. The light emitting region includes a plurality of core regions and a plurality of buried regions. The core regions and the buried regions are alternately arranged in the reference direction. The core region at a central portion of the mesa waveguide has a width larger than a width of the core region at a peripheral portion of the mesa waveguide in the reference direction.

Abstract: A method of growing III-N material on a silicon substrate includes the steps of epitaxially growing a single crystal rare earth oxide on a silicon substrate, epitaxially growing a single crystal rare earth nitride on the single crystal rare earth oxide, and epitaxially growing a layer of single crystal III-N material on the single crystal rare earth nitride.

Abstract: Disclosed is a wafer comprising a first layer of GaSb grown on a GaSb substrate by molecular beam epitaxy (MBE), an oxide layer deposited on the surface of the first layer, and a cap layer deposited on the surface of the oxide layer. The wafer was capped with an arsenic (As) layer after the growth of the first layer. The As layer was removed from the wafer before the oxide layer was deposited on the surface of the first layer. Also disclosed is a method of forming a wafer. The method comprises growing a first layer of GaSb on a GaSb substrate by MBE, capping the wafer with an As layer after the growth of the first layer, removing the As layer from the wafer, depositing an oxide layer on the surface of the first layer, and depositing a cap layer on the surface of the oxide layer.

Abstract: A uni-terminal transistor device is described. In one embodiment, an n-channel transistor comprises a first semiconductor layer having a discrete hole level H0; a second semiconductor layer having a conduction band minimum EC2; a wide bandgap semiconductor barrier layer disposed between the first and the second semiconductor layers; a gate dielectric layer disposed above the first semiconductor layer; and a gate metal layer disposed above the gate dielectric layer and having an effective workfunction selected to position the discrete hole level H0 below the conduction band minimum Ec2 for zero bias applied to the gate metal layer and to obtain n-terminal characteristics.

Abstract: A method of analyzing a nitride semiconductor layer in which a mixing ratio at a ternary mixed-crystal nitride semiconductor layer can be analyzed non-destructively, simply, and precisely, even its surface is covered with a cap layer is provided. The nitride semiconductor layer having an AN layer or a BN layer with a thickness of 0.5 to 10 nm that is stacked on an AxB1-xN layer (A and B: 13 group elements, 0?x?1) is subjected to reflection spectroscopy to obtain a reflection spectrum of the AxB1-xN layer. Let an energy value in a peak position of the reflection spectrum be a band gap energy Egap, and let a band gap energy value of AxB1-xN (x=1) be EA and a band gap energy value of AxB1-xN (x=0) be EB, x is calculated from Equation Egap=(1?x)EB+xEA?bx(1?x) (where b is bowing parameter corresponding to A and B).

Abstract: Disclosed are semiconductor devices and methods of manufacturing the same. The semiconductor device includes: a first conductive type semiconductor layer including a first lower conductive type semiconductor layer and a first upper conductive type semiconductor layer; a V-pit passing through at least one portion of the first upper conductive type semiconductor layer; a second conductive type semiconductor layer placed over the first conductive type semiconductor and filling the V-pit; and an active layer interposed between the first and second conductive type semiconductor layers with the V-pit passing through the active layer. The first upper conductive type semiconductor layer has a higher defect density than the first lower conductive type semiconductor layer and includes a V-pit generation layer comprising a starting point of the V-pit.

Abstract: A GaN based semiconductor light-emitting device is provided. The light-emitting device includes a first GaN based compound semiconductor layer of an n-conductivity type; an active layer; a second GaN based compound semiconductor layer; an underlying layer composed of a GaN based compound semiconductor, the underlying layer being disposed between the first GaN based compound semiconductor layer and the active layer; and a superlattice layer composed of a GaN based compound semiconductor doped with a p-type dopant, the superlattice layer being disposed between the active layer and the second GaN based compound semiconductor layer.

Abstract: A semiconductor device includes a superlattice buffer layer formed on a substrate. A first semiconductor layer is formed by a nitride semiconductor on the superlattice buffer layer. A second semiconductor layer is formed by a nitride semiconductor on the first semiconductor layer. A gate electrode, a source electrode and a drain electrode are formed on the second semiconductor layer. The superlattice buffer layer is forced by alternately and periodically laminating a first superlattice formation layer, and a second superlattice formation layer. The first super lattice formation layer is formed by AlxGa1-xN and the second superlattice formation layer is formed by AlyGa1-yN, where a relationship x>y is satisfied. A concentration of an impurity element serving as an acceptor doped into a portion or a whole of the second super lattice formation layer is higher than a concentration of the impurity element serving as an acceptor, doped into the first superlattice formation layer.

Abstract: A structure and method for cooling a three-dimensional integrated circuit (3DIC) are provided. A cooling element is configured for thermal connection to the 3DIC. The cooling element includes a plurality of individually controllable cooling modules disposed at a first plurality of locations relative to the 3DIC. Each of the cooling modules includes a cold pole and a heat sink. The cold pole is configured to absorb heat from the 3DIC. The heat sink is configured to dissipate the heat absorbed by the cold pole and is coupled to the cold pole via an N-type semiconductor element and via a P-type semiconductor element. A temperature sensing element includes a plurality of thermal monitoring elements disposed at a second plurality of locations relative to the 3DIC for measuring temperatures at the second plurality of locations. The measured temperatures control the plurality of cooling modules.

Abstract: An electro-magnetic radiation detector is described. The electro-magnetic radiation detector includes a detector material and a voltage biasing element. The detector material includes a substantially regular array of nano-particles embedded in a matrix material. The voltage biasing element is configured to apply a bias voltage to the matrix material such that electrical current is directly generated based on a cooperative plasmon effect in the detector material when electro-magnetic radiation in a predetermined wavelength range is incident upon the detector material, where the dominant mechanism for decay in the cooperative plasmon effect is non-radiative.

Abstract: A semiconductor device may reduce a dislocation density and tensile stress by forming a plurality of interlayers between neighboring clad layers. The semiconductor device may include a plurality of clad layers on a substrate and a plurality of interlayers between neighboring clad layers.

Abstract: A transistor device having a graphene base for the transport of electrons into a collector is provided. The transistor consists of a heterostructure comprising an electron emitter, an electron collector, and a graphene material base layer consisting of one or more sheets of graphene situated between the emitter and the collector. The transistor also can further include an emitter transition layer at the emitter interface with the base and/or a collector transition layer at the base interface with the collector. The electrons injected into the graphene material base layer can be “hot electrons” having an energy E substantially greater than EF, the Fermi energy in the graphene material base layer or can be “non-hot electrons” having an energy E approximately equal to than EF. The electrons can have the properties of ballistic transit through the base layer.

Abstract: Disclosed herein is a semiconductor device, including: a substrate; and a superlattice thin film formed on the substrate, wherein the superlattice thin film is configured such that insulator layers and semiconductor layers are alternately laminated on the substrate. The superlattice thin film is characterized in that, since it is formed by the lamination of a semiconductor layer and an insulator layer, the semiconductor layer and insulator layer constituting the superlattice thin film may be composed of a crystalline material, an amorphous material or a mixture thereof, and thus various kinds of materials for solving the mismatch in lattice constant between conventional superlattices made of different kinds of semiconductor materials can be used without limitations.

Abstract: In at least one embodiment of the optoelectronic semiconductor chip (1), the latter is based on a nitride material system and comprises at least one active quantum well (2). The at least one active quantum well (2) is designed to generate electromagnetic radiation when in operation. Furthermore, the at least one active quantum well (2) comprises N successive zones (A) in a direction parallel to a growth direction z of the semiconductor chip (1), N being a natural number greater than or equal to 2. At least two of the zones (A) of the active quantum well (2) have mutually different average indium contents c. Furthermore the at least one active quantum well (2) fulfills the condition: 40??c(z)dz?2.5N?1.5?dz?80.

Abstract: An ultraviolet (UV) light-emitting diode including an n-type semiconductor layer, an active layer disposed on the n-type semiconductor layer, a p-type semiconductor layer disposed on the active layer and formed of p-type AlGaN, and a p-type graphene layer disposed on the p-type semiconductor layer and formed of graphene doped with a p-type dopant. The UV light-emitting diode has improved light emission efficiency by lowering contact resistance with the p-type semiconductor layer and maximizing UV transmittance.

Abstract: A method for producing a semiconductor element includes a step of forming a multiple quantum well in which a GaSb layer and an InAs layer are alternately stacked on a GaSb substrate by MOVPE, wherein, in the step of forming a multiple quantum well, an InSb film is formed on at least one of a lower-surface side and an upper-surface side of the InAs layer so as to be in contact with the InAs layer.

Abstract: An epitaxial wafer for a heterojunction type FET includes an AlN primary layer, a stepwisely composition-graded buffer layer structure, a superlattice buffer layer structure, a GaN channel layer, and a nitride semiconductor electron supply layer, which are sequentially provided on a Si substrate, the stepwisely composition-graded buffer layer structure including a plurality of AlGaN buffer layers provided on each other such that an Al composition ratio is sequentially reduced, an uppermost layer thereof having a composition of AlxGa1—xN (0<x), a plurality of sets of an AlyGa1?yN (y?1) superlattice constituting layer and an AlzGa1?zN (0<z<y) superlattice constituting layer being provided on each other alternately starting from one of the AlyGa1?yN superlattice constituting layer and the AlzGa1?zN superlattice constituting layer in the superlattice buffer layer structure, the AlxGa1?xN buffer layer and the AlzGa1?zN superlattice constituting layer satisfying x?0.05?z?x+0.05.

Abstract: The disclosure relates to multiple quantum well (MQW) structures for intrinsic regions of monolithic photovoltaic junctions within solar cells which are substantially lattice matched to GaAs or Ge. The disclosed MQW structures incorporate quantum wells formed of quaternary InGaAsP, between barriers of InGaP.

Abstract: The present application provides nitride semiconductor nanoparticles, for example nanocrystals, made from a new composition of matter in the form of a novel compound semiconductor family of the type group II-III-N, for example ZnGaN, ZnInN, ZnInGaN, ZnAlN, ZnAlGaN, ZnAlInN and ZnAlGaInN. This type of compound semiconductor nanocrystal is not previously known in the prior art. The invention also discloses II-N semiconductor nanocrystals, for example ZnN nanocrystals, which are a subgroup of the group II-III-N semiconductor nanocrystals. The composition and size of the new and novel II-III-N compound semiconductor nanocrystals can be controlled in order to tailor their band-gap and light emission properties. Efficient light emission in the ultraviolet-visible-infrared wavelength range is demonstrated.

Abstract: A semiconductor light-emitting element manufacturing method including: a first step in which a first n-type semiconductor layer is laminated onto a substrate in a first organometallic chemical vapor deposition apparatus; and a second step in which a regrowth layer, a second n-type semiconductor layer, an active layer, and a p-type semiconductor layer are sequentially laminated onto the aforementioned first n-type semiconductor layer in a second organometallic chemical vapor deposition apparatus.

Abstract: A superlattice layer including a plurality of periods, each of which is formed from a plurality of sub-layers is provided. Each sub-layer comprises a different composition than the adjacent sub-layer(s) and comprises a polarization that is opposite a polarization of the adjacent sub-layer(s). In this manner, the polarizations of the respective adjacent sub-layers compensate for one another. Furthermore, the superlattice layer can be configured to be at least partially transparent to radiation, such as ultraviolet radiation.

Abstract: The present disclosure involves a method of packaging light-emitting diodes (LEDs). According to the method, a plurality of LEDs is provided over an adhesive tape. The adhesive tape is disposed on a substrate. In some embodiments, the substrate may be a glass substrate, a silicon substrate, a ceramic substrate, and a gallium nitride substrate. A phosphor layer is coated over the plurality of LEDs. The phosphor layer is then cured. The tape and the substrate are removed after the curing of the phosphor layer. A replacement tape is then attached to the plurality of LEDs. A dicing process is then performed to the plurality of LEDs after the substrate has been removed. The removed substrate may then be reused for a future LED packaging process.

Abstract: A nitride semiconductor light-emitting device is formed of an n-type nitride semiconductor layer, a trigger layer, a V-pit expanding layer, a light-emitting layer, and a p-type nitride semiconductor layer provided in this order. The light-emitting layer has a V-pit formed therein. The trigger layer is made of a nitride semiconductor material having a lattice constant different from that of a material that forms an upper surface of the n-type nitride semiconductor layer. The V-pit expanding layer is made of a nitride semiconductor material having a lattice constant substantially identical to that of the material that forms the upper surface of the n-type nitride semiconductor layer, and the V-pit expanding layer has a thickness of 5 nm or more and 5000 nm or less.

Abstract: III-N material grown on a silicon substrate includes a single crystal rare earth oxide layer positioned on a silicon substrate. The rare earth oxide is substantially crystal lattice matched to the surface of the silicon substrate. A first layer of III-N material is positioned on the surface of the rare earth oxide layer. An inter-layer of aluminum nitride (AlN) is positioned on the surface of the first layer of III-N material and an additional layer of III-N material is positioned on the surface of the inter-layer of aluminum nitride. The inter-layer of aluminum nitride and the additional layer of III-N material are repeated n-times to reduce or engineer strain in a final III-N layer. A cap layer of AlN is grown on the final III-N layer and a III-N layer of material with one of an LED structure and an HEMT structure is grown on the AlN cap layer.

Abstract: A method for manufacturing a functional material including a porous metal complex with nanoparticles included therein, the method including a configuration of adding more than one particle constituent raw material constituting the nanoparticles and a porous metal complex to a solvent, and then synthesizing nanoparticles included in the porous metal complex by heating to a desired temperature. In addition, provided is an electronic component including an electronic component element using a functional material including a porous metal complex with nanoparticles included therein.

Abstract: There is provided an anode for an organic electronic device. The anode is a conducting inorganic material having an oxidized surface layer. The surface layer is non-conductive and hole-transporting.

Abstract: This invention provides a germanium electroluminescence device and a fabricating method of the same for using germanium of an indirect bandgap semiconductor without modifying a bandgap as a light-emitting layer which emits a 1550 nm-wavelength light and enabling to use not only as infrared LEDs itself but also as light sources for optical communication systems.

Abstract: A vertical geometry light emitting diode is disclosed that is capable of emitting light in the red, green, blue, violet and ultraviolet portions of the electromagnetic spectrum. The light emitting diode includes a conductive silicon carbide substrate, an InGaN quantum well, a conductive buffer layer between the substrate and the quantum well, a respective undoped gallium nitride layer on each surface of the quantum well, and ohmic contacts in a vertical geometry orientation.