Quantum Well Patents (Class 257/14)
  • Patent number: 10388224
    Abstract: A quantum dot light emitting device includes a grating device which includes a grating region that has a particular grating interval, and a quantum dot layer located above the grating region. The device provides high-purity color light based on a selection of a wavelength band by the grating region in correspondence with a wavelength band of light emitted from the quantum dot layer.
    Type: Grant
    Filed: March 6, 2017
    Date of Patent: August 20, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hyochul Kim, Yeonsang Park, Kyungsang Cho, Weonkyu Koh, Younggeun Roh
  • Patent number: 10388848
    Abstract: Embodiments of the present disclosure describe use of isotopically purified materials in donor- or acceptor-based spin qubit devices and assemblies. An exemplary spin qubit device assembly may include a semiconductor host layer that includes an isotopically purified material, a dopant atom in the semiconductor host layer, and a gate proximate to the dopant atom. An isotopically purified material may include a lower atomic-percent of isotopes with nonzero nuclear spin than the natural abundance of those isotopies in the non-isotopically purified material. Reducing the presence of isotopes with nonzero nuclear spin in a semiconductor host layer may improve qubit coherence and thus performance of spin qubit devices and assemblies.
    Type: Grant
    Filed: March 19, 2018
    Date of Patent: August 20, 2019
    Assignee: Intel Corporation
    Inventors: Nicole K. Thomas, James S. Clarke, Jessica M. Torres, Lester Lampert, Ravi Pillarisetty, Hubert C. George, Kanwaljit Singh, Jeanette M. Roberts, Roman Caudillo, Zachary R. Yoscovits, David J. Michalak
  • Patent number: 10381511
    Abstract: A nitride semiconductor structure and a semiconductor light emitting device are revealed. The semiconductor light emitting device includes a substrate disposed with a first type doped semiconductor layer and a second type doped semiconductor layer. A light emitting layer is disposed between the first type doped semiconductor layer and the second type doped semiconductor layer. The second type doped semiconductor layer is doped with a second type dopant at a concentration larger than 5×1019 cm ?3 while a thickness of the second type doped semiconductor layer is smaller than 30 nm. Thereby the semiconductor light emitting device provides a better light emitting efficiency.
    Type: Grant
    Filed: October 2, 2017
    Date of Patent: August 13, 2019
    Assignee: Genesis Photonics Inc.
    Inventors: Yen-Lin Lai, Jyun-De Wu, Yu-Chu Li
  • Patent number: 10347824
    Abstract: Apparatuses, systems, and methods are disclosed for magnetoresistive random access memory. A magnetic tunnel junction for storing data includes a fixed layer, a barrier layer, and a composite free layer. A barrier layer is disposed between a fixed layer and a composite free layer. A composite free layer includes a ferromagnetic amorphous layer and an in-plane anisotropy free layer. A spin Hall effect (SHE) layer may be coupled to the composite free layer of the magnetic tunnel junction. The SHE layer may be configured such that an in-plane electric current within the SHE layer causes a spin current in the composite free layer.
    Type: Grant
    Filed: November 21, 2017
    Date of Patent: July 9, 2019
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventor: Young-Suk Choi
  • Patent number: 10347783
    Abstract: Various examples are provided for hot carrier spectral photodetectors that can be tuned. In one example, among others, a hot-carrier photodetector includes a graded barrier; an absorber disposed on the graded barrier; and a second barrier disposed on the absorber. For example, the absorber can include p-type doped GaAs. The graded barrier is disposed between the absorber and an injector, which can include p-type doped GaAs. In some implementations, the hot-carrier detector can include multiple barriers and absorbers. The hot-carrier photodetector can include an optical source (e.g., a LED) to trigger the VLWIR response in the photodetector.
    Type: Grant
    Filed: August 27, 2014
    Date of Patent: July 9, 2019
    Assignee: Georgia State University Research Foundation, Inc.
    Inventors: A. G. Unil Perera, Yanfeng Lao
  • Patent number: 10348245
    Abstract: Superconducting device applications implemented with two surface acoustic wave resonators coupled to a Josephson ring modulator are provided. A method can include receiving, by a unitary Josephson mixer and from a first superconducting surface acoustic wave resonator of a superconducting device, a first surface acoustic wave signal that comprises one or more phonons that resonate at a first frequency, and receiving, by the unitary Josephson mixer and from a radio frequency source operatively coupled to the unitary Josephson mixer, a radio frequency control signal. The method can also include mixing the first surface acoustic wave signal and the radio frequency control signal and outputting a second surface acoustic wave signal based on mixing the first surface acoustic wave signal and the radio frequency control signal. The second surface acoustic wave signal can comprise one or more phonons that resonate at a second frequency.
    Type: Grant
    Filed: July 30, 2018
    Date of Patent: July 9, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: Baleegh Abdo
  • Patent number: 10325963
    Abstract: The present disclosure provides a display unit of a display device including a light emitting unit and a light converting layer disposed on the light emitting unit. The display unit emits an output light under an operation of the highest gray level, the output light having an output spectrum, an intensity integral of the output spectrum from 380 nm to 470 nm defines as a first intensity integral, an intensity integral of the output spectrum from 580 nm to 780 nm defines as a second intensity integral, a ratio of the first intensity integral over the second intensity integral defines as a first ratio, and the first ratio is greater than 0% and less than or equal to 2.5%.
    Type: Grant
    Filed: June 12, 2017
    Date of Patent: June 18, 2019
    Assignee: InnoLux Corporation
    Inventors: Hsiao-Lang Lin, Jui-Jen Yueh, Kuan-Feng Lee, Jia-Yuan Chen
  • Patent number: 10311189
    Abstract: Three-dimensional electromagnetic field analysis is performed for a plurality of positional patterns of a first wiring board internal structure model including one glass cloth on the upper side of differential lines and also for a plurality of positional patterns of a second wiring board internal structure model including one glass cloth on the lower side of differential lines to calculate skews, and the calculated skews are summed relating to a plurality of wiring board patterns configured by combining a plurality of combination patterns obtained by combining the plurality of positional patterns of the first model and a plurality of combination patterns obtained by combining the plurality of positional patterns of the second model to calculate a total skew and then a skew distribution in a wiring board having a certain line length is acquired based on the total skew.
    Type: Grant
    Filed: April 9, 2014
    Date of Patent: June 4, 2019
    Assignee: FUJITSU LIMITED
    Inventors: Hideaki Nagaoka, Taiga Fukumori, Daisuke Mizutani
  • Patent number: 10304535
    Abstract: A switch activated by a single control photon for routing a single target photon from either of two switch inputs to either of two switch outputs. The device is based on a single quantum emitter, such as an atom, coupled to a fiber-coupled, chip-based optical micro-resonator. A single reflected control photon toggles the switch from high reflection to high transmission mode, with no additional control fields required. The control and target photons are both in-fiber and practically identical, for compatibility with scalable architectures for quantum information processing.
    Type: Grant
    Filed: March 30, 2016
    Date of Patent: May 28, 2019
    Assignee: YEDA RESEARCH AND DEVELOPMENT CO. LTD.
    Inventors: Barak Dayan, Itay Shomroni, Serge Rosenblum
  • Patent number: 10290779
    Abstract: A light emitting element includes a light emitting member that is formed of at least two kinds of an oxide material and has a plate shape; and a light transmitting member that collimates a light emitted from the light emitting member and has a plano-convex shape, in which a contact portion between the light transmitting member and the light emitting member is continuous.
    Type: Grant
    Filed: November 28, 2017
    Date of Patent: May 14, 2019
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Shinnosuke Akiyama, Kei Toyota, Masato Mori
  • Patent number: 10277010
    Abstract: A semiconductor laser includes a mesa structure disposed on a principal surface of a substrate, the mesa structure extending in a direction of an axis parallel to the principal surface, the mesa structure including an active region that includes a quantum well, the active region having top and bottom surfaces, and first, second, third and fourth side surfaces; an emitter region disposed on at least one of the first and second side surfaces, and the top and bottom surfaces; and a collector region including a quantum filter structure disposed on at least one of the side surfaces. The collector region is separated from the emitter region on the mesa structure. The first and second side surfaces extend in the direction of the axis. The third side surface extends in a direction intersecting the axis.
    Type: Grant
    Filed: January 29, 2018
    Date of Patent: April 30, 2019
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Tsukuru Katsuyama, Takashi Kato
  • Patent number: 10271385
    Abstract: The invention of the application relates to obtaining a three dimensional coating on fabrics with dip coating method of silver nanowires, which allow fabric to breathe, do not limit the flexibility or restrict the use of the fabric, and heating these coatings with an applied voltage. Moreover, this coating also enables fabrics to be antibacterial and flame retardant.
    Type: Grant
    Filed: August 23, 2016
    Date of Patent: April 23, 2019
    Inventors: Husnu Emrah Unalan, Doga Doganay, Sahin Coskun
  • Patent number: 10263041
    Abstract: Various embodiment include optical and optoelectronic devices and methods of making same. Under one aspect, an optical device includes an integrated circuit having an array of conductive regions, and an optically sensitive material over at least a portion of the integrated circuit and in electrical communication with at least one conductive region of the array of conductive regions. Under another aspect, a film includes a network of fused nanocrystals, the nanocrystals having a core and an outer surface, wherein the core of at least a portion of the fused nanocrystals is in direct physical contact and electrical communication with the core of at least one adjacent fused nanocrystal, and wherein the film has substantially no defect states in the regions where the cores of the nanocrystals are fused. Additional devices and methods are described.
    Type: Grant
    Filed: May 24, 2018
    Date of Patent: April 16, 2019
    Assignee: InVisage Technologies, Inc.
    Inventors: Edward Hartley Sargent, Jason Paul Clifford, Gerasimos Konstantatos, Ian Howard, Ethan J.D. Klem, Larissa Levina
  • Patent number: 10255556
    Abstract: The present disclosure provides a quantum processor realized in a semiconductor material and method to operate the quantum processor to implement adiabatic quantum computation. The quantum processor comprises a plurality of qubit elements disposed in a two-dimensional matrix arrangement. The qubits are implemented using the nuclear or electron spin of phosphorus donor atoms. Further, the processor comprises a control structure with a plurality of control members, each arranged to control a plurality of qubits disposed along a line or a column of the matrix. The control structure is controllable to perform adiabatic quantum error corrected computation.
    Type: Grant
    Filed: November 3, 2015
    Date of Patent: April 9, 2019
    Assignees: NEWSOUTH INNOVATIONS PTY LIMITED, UNIVERSITY OF MELBOURNE
    Inventors: Lloyd Christopher Leonard Hollenberg, Charles David Hill, Michelle Yvonne Simmons, Eldad Peretz, Sven Rogge, Martin Fuechsle, Samuel James Hile
  • Patent number: 10249684
    Abstract: The present disclosure is directed toward carbon based diodes, carbon based resistive change memory elements, resistive change memory having resistive change memory elements and carbon based diodes, methods of making carbon based diodes, methods of making resistive change memory elements having carbon based diodes, and methods of making resistive change memory having resistive change memory elements having carbons based diodes. The carbon based diodes can be any suitable type of diode that can be formed using carbon allotropes, such as semiconducting single wall carbon nanotubes (s-SWCNT), semiconducting Buckminsterfullerenes (such as C60 Buckyballs), or semiconducting graphitic layers (layered graphene). The carbon based diodes can be pn junction diodes, Schottky diodes, other any other type of diode formed using a carbon allotrope. The carbon based diodes can be placed at any level of integration in a three dimensional (3D) electronic device such as integrated with components or wiring layers.
    Type: Grant
    Filed: March 5, 2018
    Date of Patent: April 2, 2019
    Assignee: Nantero, Inc.
    Inventors: Claude L. Bertin, Thomas Rueckes, X. M. Henry Huang, C. Rinn Cleavelin
  • Patent number: 10243101
    Abstract: A light emitting diode can include a metal support layer: a GaN-based semiconductor structure having a less than 5 microns thickness on the metal support layer, the GaN-based semiconductor structure including a p-type GaN-based semiconductor layer, an active layer on the p-type GaN-based semiconductor layer, and an n-type GaN-based semiconductor layer on the active layer; a p-type electrode on the metal support layer and including a plurality of metal layers; an n-type electrode on a flat portion of an upper surface of the GaN-based semiconductor structure, and the n-type electrode contacts the flat portion; a metal pad layer on the n-type electrode; and an insulating layer including a first part disposed on the upper surface of the GaN-based semiconductor structure, and a second part disposed on an entire side surface of the GaN-based semiconductor structure, in which the metal pad layer includes a first portion having a flat bottom surface on the n-type electrode, and a second portion having stepped surface
    Type: Grant
    Filed: December 4, 2017
    Date of Patent: March 26, 2019
    Assignee: LG INNOTEK CO., LTD.
    Inventors: Jong Lam Lee, In-kwon Jeong, Myung Cheol Yoo
  • Patent number: 10233390
    Abstract: Light-emitting materials are made from a porous light-emitting semiconductor having quantum dots (QDs) disposed within the pores. According to some embodiments, the QDs have diameters that are essentially equal in size to the width of the pores. The QDs are formed in the pores by exposing the porous semiconductor to gaseous QD precursor compounds, which react within the pores to yield QDs. According to certain embodiments, the pore size limits the size of the QDs produced by the gas-phase reactions. The QDs absorb light emitted by the light-emitting semiconductor material and reemit light at a longer wavelength than the absorbed light, thereby “down-converting” light from the semiconductor material.
    Type: Grant
    Filed: February 17, 2017
    Date of Patent: March 19, 2019
    Assignee: Nanoco Technologies Ltd.
    Inventors: Nigel Pickett, Nathalie Gresty
  • Patent number: 10229365
    Abstract: The present disclosure provides a quantum processor realized in a semiconductor material and method to operate the quantum processor to implement error corrected quantum computation. The quantum processor comprises a plurality of qubit elements disposed in a two-dimensional matrix arrangement. The qubits are implemented using the nuclear or electron spin of phosphorus donor atoms. Further, the processor comprises a control structure with a plurality of control members, each arranged to control a plurality of qubits disposed along a line or a column of the matrix. The control structure is controllable to perform topological quantum error corrected computation.
    Type: Grant
    Filed: November 3, 2015
    Date of Patent: March 12, 2019
    Assignees: NewSouth Innovations Pty Limited, University of Melbourne
    Inventors: Martin Fuechsle, Samuel James Hile, Charles David Hill, Lloyd Christopher Leonard Hollenberg, Matthew Gregory House, Eldad Peretz, Sven Rogge, Michelle Yvonne Simmons
  • Patent number: 10222314
    Abstract: A flow channel device, a complex permittivity measuring apparatus, and a dielectric cytometry system are provided which can improve the measurement accuracy. A constriction portion having a constricted space is disposed between an inflow port and an outflow port of a flow channel. Electrodes are arranged between the inflow port and the constriction portion and between the outflow port and the constriction portion. The conductance of the constriction portion at a low-limit frequency is less than the combined conductance of an inflow channel portion and an outflow channel portion. The capacitance of the constriction portion at a high-limit frequency is less than the combined capacitance of the inflow channel portion and the outflow channel portion.
    Type: Grant
    Filed: January 7, 2010
    Date of Patent: March 5, 2019
    Assignee: Sony Corporation
    Inventors: Yoichi Katsumoto, Shinji Omori
  • Patent number: 10217632
    Abstract: A method of forming a semiconductor device is provided. The method includes depositing an aluminum-base interlayer on a silicon substrate, the aluminum-base interlayer having a thickness of less than about 100 nanometers; and growing a III-V compound material on the aluminum-base interlayer. The aluminum-base interlayer deposited directly on silicon allows for continuous and planar growth of III-V compound materials on the interlayer, which facilitates the manufacture of high quality electronic devices.
    Type: Grant
    Filed: June 9, 2016
    Date of Patent: February 26, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Cheng-Wei Cheng, Sanghoon Lee, Kuen-Ting Shiu
  • Patent number: 10217896
    Abstract: An optoelectronic semiconductor chip is disclosed. In an embodiment the optoelectronic semiconductor chip includes a p-type semiconductor region, an n-type semiconductor region, and an active layer arranged between the p-type semiconductor region and the n-type semiconductor region. The active layer is designed as a multiple quantum well structure, wherein the multiple quantum well structure has a first region of alternating first quantum well layers and first barrier layers and a second region having at least one second quantum well layer and at least one second barrier layer. The at least one second quantum well layer has an electronic band gap (EQW2) that is less than the electronic band gap (EQW1) of the first quantum well layers, and the at least one second barrier layer has an electronic band gap (EB2) that is greater than the electronic band gap (EB1) of the first barrier layers.
    Type: Grant
    Filed: November 25, 2015
    Date of Patent: February 26, 2019
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventors: Andreas Rudolph, Petrus Sundgren, Ivar Tangring
  • Patent number: 10205861
    Abstract: A transmissive optical shutter and a method of fabricating the same are provided. The transmissive optical shutter includes a first contact layer, an epitaxial layer disposed over the first contact layer, the epitaxial layer being configured to modulate intensity of incident light having a specific wavelength, a second contact layer disposed on the epitaxial layer, a first electrode disposed on the first contact layer, at least one second electrode disposed on the second contact layer, and a substrate disposed under the first contact layer.
    Type: Grant
    Filed: May 22, 2015
    Date of Patent: February 12, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sanghun Lee, Changyoung Park, Yonghwa Park
  • Patent number: 10204181
    Abstract: Systems and methods of modeling the structure and behavior of the quantum continuum based on geometrical principles are provided. In some embodiments, systems and methods of modeling quantum structure and behavior may include modeling a region of space as a three-dimensional projection of a field of N-dimensional hard-spheres, modeling a stable particle within the region of space as a locally stably packed set of hard-spheres, defining an energy subspace comprising one or more additional dimensions, and modeling an energy of the stable particle as an amount of hard-sphere geometry shifted out of the three spatial dimensions into the energy subspace sufficient for the set of hard-spheres to pack stably.
    Type: Grant
    Filed: July 8, 2016
    Date of Patent: February 12, 2019
    Assignee: Omnisent LLC
    Inventors: Joseph Eric Henningsen, Clifford Tureman Lewis
  • Patent number: 10205432
    Abstract: A piezoelectric thin film resonator includes: a piezoelectric film located on a substrate, and formed of stacked lower and upper piezoelectric films; lower and upper electrodes facing each other across at least a part of the piezoelectric film; and an insertion film inserted between the lower and upper piezoelectric films, wherein an air gap including a resonance region where the lower and upper electrodes face each other across the piezoelectric film and being larger than the resonance region is located under the lower electrode, and a multilayered film formed of the lower piezoelectric film, the insertion film, and the upper piezoelectric film is located in at least a part of a region located further out than an outer outline of the resonance region, further in than an outer outline of the air gap, and surrounding the resonance region, and is not located in a center region of the resonance region.
    Type: Grant
    Filed: November 18, 2016
    Date of Patent: February 12, 2019
    Assignee: TAIYO YUDEN CO., LTD.
    Inventors: Tsuyoshi Yokoyama, Jiansong Liu
  • Patent number: 10193067
    Abstract: Generally discussed herein are techniques for and systems and apparatuses configured to control phonons using an electric field. In one or more embodiments, an apparatus can include electrical contacts, two quantum dots embedded in a semiconductor such that when an electrical bias is applied to the electrical contacts, the electric field produced by the electrical bias is substantially parallel to an axis through the two quantum dots, and a phononic wave guide coupled to the semiconductor, the phononic wave guide configured to transport phonons therethrough.
    Type: Grant
    Filed: July 7, 2017
    Date of Patent: January 29, 2019
    Assignee: The Regents of the University of California
    Inventor: Michael Scheibner
  • Patent number: 10186835
    Abstract: The monolithic integration of optically-pumped and electrically-injected III-nitride light-emitting devices. This structure does not involve the growth of p-type layers after an active region for a first III-nitride light-emitting device, and thus avoids high temperature growth steps after the fabrication of the active region for the first III-nitride light emitting device. Since electrical injection in such a structure cannot be possible, a second III-nitride light-emitting device is used to optically pump the first III-nitride light emitting device. This second III-nitride light emitting device emits light at a shorter wavelength region of the optical spectrum than the first III-nitride light emitting device, so that it can be absorbed by the active region of the first III-nitride light-emitting device, which in turn emits light at a longer wavelength region of the optical spectrum than the second III-nitride light emitting device.
    Type: Grant
    Filed: December 30, 2014
    Date of Patent: January 22, 2019
    Assignee: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Robert M. Farrell, Shuji Nakamura, Claude C. A. Weisbuch
  • Patent number: 10186676
    Abstract: Embodiments related to emissive devices for displays are discussed. Some embodiments include light emitting diodes including an electron transport layer core having a tube shape with an inner and an outer sidewall, an emission layer on the inner and outer sidewalls, and a hole transport layer on the emission layer, displays and systems including such light emitting diodes, and methods for fabricating them. Other embodiments include emissive laser devices having an emission layer between a hole transport layer and an electron transport layer and first and second metasurface mirrors adjacent to the hole transport layer and the electron transport layer, respectively, displays and systems including such emissive laser devices, and methods for fabricating them.
    Type: Grant
    Filed: March 12, 2018
    Date of Patent: January 22, 2019
    Assignee: Intel Corporation
    Inventors: Khaled Ahmed, Ali Khakifirooz, Richmond Hicks
  • Patent number: 10173454
    Abstract: The invention relates to a security and/or value document having a security feature, to an ink for making the security feature, to a method for making such a security and/or value document, and to a method for verifying such a security and/or value document.
    Type: Grant
    Filed: July 7, 2016
    Date of Patent: January 8, 2019
    Inventor: Malte Pflughoefft
  • Patent number: 10162210
    Abstract: The present disclosure provides a touch panel, a method for producing the same and a display apparatus. The touch panel includes: a first substrate, a second substrate opposed to the first substrate, a display medium layer between the first substrate and the second substrate, a black matrix arranged on one of the first substrate and the second substrate, a plurality of driving electrode units and a plurality of inductive electrode units arranged alternatively on the other one of the first substrate and the second substrate, and each of the plurality of driving electrode units or the plurality of inductive electrode units includes a plurality of transparent electrodes and projections of boundaries of the transparent electrodes onto the substrate having the black matrix are covered by the black matrix or coincide with the range of the black matrix.
    Type: Grant
    Filed: October 28, 2014
    Date of Patent: December 25, 2018
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventor: Xiangxiang Zou
  • Patent number: 10153273
    Abstract: A semiconductor device is provided that comprises a base structure, a first channel layer overlying the base structure, a second channel layer overlying the first channel layer, and first, second, and third ohmic contacts overlying the second channel layer. The semiconductor device further comprises a metal-semiconductor heterodimension field effect transistor that is formed between the first and second ohmic contacts, the metal-semiconductor heterodimension field effect transistor including a first gate formed through the first and second channel layers. The semiconductor device yet further comprises a high electron mobility transistor formed between the second and third ohmic contacts, the high electron mobility transistor including a second gate formed through the second channel layer without extending through the first channel layer.
    Type: Grant
    Filed: December 5, 2017
    Date of Patent: December 11, 2018
    Assignee: NORTHROP GRUMMAN SYSTEMS CORPORATION
    Inventors: Roger S. Tsai, Weidong Liu, Yeong-Chang Chou
  • Patent number: 10146070
    Abstract: An optical phase modulator 100 according to an embodiment of this disclosure comprises a rib-type waveguide structure 110 comprising: a PN junction 106 comprising Si and formed in a lateral direction on a substrate; and a Si1-xGex layer 108 that is doped with a p-type impurity and comprises at least one layer laminated on the PN junction 106, so as to be electrically connected to the PN junction 106.
    Type: Grant
    Filed: February 2, 2016
    Date of Patent: December 4, 2018
    Assignee: PHOTONICS ELECTRONICS TECHNOLOGY RESEARCH ASSOCIATION
    Inventors: Junichi Fujikata, Shigeki Takahashi, Mitsuru Takenaka, Younghyun Kim
  • Patent number: 10141500
    Abstract: A magnetoelectric converting element includes a substrate, a magnetosensitive layer, a first insulating layer, an underlying conductive layer, a second insulating layer, and a terminal conductor. The magnetosensitive layer is formed on the substrate. The first insulating layer is formed with first opening for exposing a part of the magnetosensitive layer. The underlying conductive layer is formed on the exposed part of the magnetosensitive layer. The second insulating layer is formed with a second opening for exposing a part of the underlying conductive layer. The terminal conductor is formed on the exposed part of the underlying conductive layer. The second opening is arranged to be located inside the first opening in plan view.
    Type: Grant
    Filed: July 3, 2017
    Date of Patent: November 27, 2018
    Assignee: ROHM CO., LTD.
    Inventors: Isamu Nishimura, Michihiko Mifuji, Satoshi Nakagawa
  • Patent number: 10141437
    Abstract: A CMOS device includes a PMOS transistor with a first quantum well structure and an NMOS device with a second quantum well structure. The PMOS and NMOS transistors are formed on a substrate.
    Type: Grant
    Filed: June 16, 2017
    Date of Patent: November 27, 2018
    Assignee: Intel Corporation
    Inventors: Suman Datta, Mantu K. Hudait, Mark L. Doczy, Jack T. Kavalieros, Amlan Majumdar, Justin K. Brask, Been-Yih Jin, Matthew V. Metz, Robert S. Chau
  • Patent number: 10128439
    Abstract: A phononic transistor can be realized by arranging a row of cantilevered structures with attached magnets, elastically extending upward upon application of a magnetic repulsive force to the magnets. In the extended configuration, the phonons are transmitted from source to drain, while in the flattened configuration the phonons are blocked from transmission. A gate element controls the ON and OFF states of the phononic transistor.
    Type: Grant
    Filed: April 17, 2018
    Date of Patent: November 13, 2018
    Assignees: CALIFORNIA INSTITUTE OF TECHNOLOGY, ETH ZUERICH
    Inventors: Osama R. Bilal, Chiara Daraio, Andre Foehr
  • Patent number: 10128417
    Abstract: Embodiments of a display device including barrier layer coated quantum dots and a method of making the barrier layer coated quantum dots are described. Each of the barrier layer coated quantum dots includes a core-shell structure and a hydrophobic barrier layer disposed on the core-shell structure. The hydrophobic barrier layer is configured to provide a distance between the core-shell structure of one of the quantum dots with the core-shell structures of other quantum dots that are in substantial contact with the one of the quantum dots. The method for making the barrier layer coated quantum dots includes forming reverse micro-micelles using surfactants and incorporating quantum dots into the reverse micro-micelles. The method further includes individually coating the incorporated quantum dots with a barrier layer and isolating the barrier layer coated quantum dots with the surfactants of the reverse micro-micelles disposed on the barrier layer.
    Type: Grant
    Filed: December 2, 2016
    Date of Patent: November 13, 2018
    Assignee: Nanosys, Inc.
    Inventors: Jason Hartlove, Veeral Hardev, Shihai Kan, Jian Chen, Jay Yamanaga, Christian Ippen, Wenzhuo Guo, Charles Hotz, Robert Wilson
  • Patent number: 10115859
    Abstract: A symmetrical quantum well active layer provides enhanced internal quantum efficiency. The quantum well active layer includes an inner (central) layer and a pair of outer layers sandwiching the inner layer. The inner and outer layers have different thicknesses and bandgap characteristics. The outer layers are relatively thick and include a relatively low bandgap material, such as InGaN. The inner layer has a relatively lower bandgap material and is sufficiently thin to act as a quantum well delta layer, e.g., comprising approximately 6 ? or less of InN. Such a quantum well structure advantageously extends the emission wavelength into the yellow/red spectral regime, and enhances spontaneous emission. The multi-layer quantum well active layer is sandwiched by barrier layers of high bandgap materials, such as GaN.
    Type: Grant
    Filed: December 15, 2010
    Date of Patent: October 30, 2018
    Assignee: Lehigh University
    Inventors: Nelson Tansu, Hongping Zhao, Guangyu Liu, Gensheng Huang
  • Patent number: 10109762
    Abstract: A light source includes an upper electrode layer, a lower electrode layer, and an active layer interposed therebetween. At least one of the upper and lower electrode layers is divided into a plurality of electrodes separated from each other in an in-plane direction of the active layer. The separated electrodes independently inject current into a plurality of different regions in the active layer. The light source emits light by injecting current from the upper and lower electrode layers into the active layer, guide the light in the in-plane direction, and output the light. The plurality of different regions in the active layer include a first region not including a light exit end and a second region including the light exit end, and the second region is configured to emit light of at least first-order level. The active layer has an asymmetric multiple quantum well structure.
    Type: Grant
    Filed: September 26, 2013
    Date of Patent: October 23, 2018
    Assignee: Canon Kabushiki Kaisha
    Inventors: Kenji Yamagata, Toshimitsu Matsuu, Takeshi Yoshioka, Takeshi Uchida
  • Patent number: 10101520
    Abstract: The present disclosure provides a light conversion film and a preparation method thereof, and a liquid crystal display device. The light conversion film comprises a first substrate, a thin film layer, a quantum dot layer in which quantum dots are distributed, and a second substrate, which are all successively stacked, wherein said thin film layer is a transparent sheet having an electric field on a surface thereof, and said quantum dots are orderly arrayed due to said electric field.
    Type: Grant
    Filed: April 4, 2016
    Date of Patent: October 16, 2018
    Assignees: HISENSE ELECTRIC CO., LTD., HISENSE USA CORPORATION, HISENSE INTERNATIONAL CO., LTD.
    Inventors: Xuhai Liu, Jianwei Cao, Shunming Huang, Fulin Li
  • Patent number: 10103328
    Abstract: According to one embodiment, a nonvolatile memory device includes a first conductive layer, a second conductive layer, and an intermediate layer. The first conductive layer includes a first element. The first element includes a at least one selected from the group consisting of Ag, Cu, Ni, Co, Ti, Al, and Au. The intermediate layer is provided between the first conductive layer and the second conductive layer. The intermediate layer includes an oxide. The oxide includes a second element and a third element. The second element includes at least one second element being selected from the group consisting of Ti, Ta, Hf, W, Mg, Al, and Zr. The third element is different from the second element and includes at least one selected from the group consisting of Si, Ge, Hf, Al, Ta, W, Zr, Ti, and Mg.
    Type: Grant
    Filed: December 21, 2016
    Date of Patent: October 16, 2018
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Takayuki Ishikawa, Harumi Seki, Shosuke Fujii, Masumi Saitoh
  • Patent number: 10096748
    Abstract: Wavelength converters, including polarization-enhanced carrier capture converters, for solid state lighting devices, and associated systems and methods are disclosed. A solid state radiative semiconductor structure in accordance with a particular embodiment includes a first region having a first value of a material characteristic and being positioned to receive radiation at a first wavelength. The structure can further include a second region positioned adjacent to the first region to emit radiation at a second wavelength different than the first wavelength. The second region has a second value of the material characteristic that is different than the first value, with the first and second values of the characteristic forming a potential gradient to drive electrons, holes, or both electrons and holes in the radiative structure from the first region to the second region. In a further particular embodiment, the material characteristic includes material polarization.
    Type: Grant
    Filed: March 28, 2016
    Date of Patent: October 9, 2018
    Assignee: Micron Technology, Inc.
    Inventors: Martin F. Schubert, Vladimir Odnoblyudov
  • Patent number: 10074056
    Abstract: Systems and methods are provided for performing noise-resilient quantum operations. A set of control signals are applied to a system to provide a first Hamiltonian for the system. The system includes an array of physical qubits and a plurality of coupling mechanisms configured such that each pair of neighboring physical qubits within the array is coupled by an associated coupling mechanism. The first Hamiltonian represents, for each coupling mechanism, a coupling strength between zero and a maximum value. An adiabatic interpolation of the Hamiltonian of the system from the first Hamiltonian to a second Hamiltonian is performed. The second Hamiltonian represents, for at least one of the plurality of coupling mechanisms, a coupling strength different from that of the first Hamiltonian.
    Type: Grant
    Filed: August 1, 2016
    Date of Patent: September 11, 2018
    Assignee: Northrop Grumman Systems Corporation
    Inventor: Ryan J. Epstein
  • Patent number: 10069035
    Abstract: One embodiment relates to a light-emitting device, a method for manufacturing the light-emitting device, a light-emitting device package, and a lighting system. The light-emitting device, according to the one embodiment, can comprise: a first conductive semiconductor layer; an active layer on the first conductive semiconductive layer; a gallium nitride based superlattice layer on the active layer; and a second conductive semiconductor layer on the gallium nitride based superlattice layer. The gallium nitride based superlattice layer can comprise: a first gallium nitride based superlattice layer on the active layer; and a second gallium nitride based superlattice layer on the first gallium nitride based superlattice layer.
    Type: Grant
    Filed: July 24, 2015
    Date of Patent: September 4, 2018
    Assignee: LG INNOTEK CO., LTD.
    Inventors: Chan Keun Park, Jae Woong Han
  • Patent number: 10050414
    Abstract: An array of monolithic wavelength division multiplexed (WDM) vertical cavity surface emitting lasers (VCSELs) is provided with quantum well intermixing. Each VCSEL includes a bottom distributed Bragg reflector (DBR), an upper distributed Bragg reflector, and a laser cavity therebetween. The laser cavity includes a multiple quantum well (MQW) layer sandwiched between a lower separate confinement heterostructure (SCH) and an upper SCH layer. Each MQW region experiences a different amount of quantum well intermixing and concomitantly a different lasing wavelength shift.
    Type: Grant
    Filed: January 22, 2015
    Date of Patent: August 14, 2018
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Sagi Varghese Mathai, Michael Renne Ty Tan
  • Patent number: 10031887
    Abstract: Techniques for improving the performance of a quantum processor are described. The techniques include reading out a fraction of the qubits in a quantum processor and utilizing one or more post-processing operations to reconstruct qubits of the quantum processor that are not read. The reconstructed qubits may be determined using a perfect sampler to provide results that are strictly better than reading all of the qubits directly from the quantum processor. The composite sample that includes read qubits and reconstructed qubits may be obtained faster than if all qubits of the quantum processor are read directly.
    Type: Grant
    Filed: September 3, 2015
    Date of Patent: July 24, 2018
    Assignee: D-WAVE SYSTEMS INC.
    Inventor: Jack Raymond
  • Patent number: 10026863
    Abstract: A method of manufacturing a sensor array includes providing a carrier glass substrate, forming an amorphous silicon layer over the carrier glass substrate, forming a first heat buffer layer over the amorphous silicon layer; forming a mirror layer over the first heat buffer layer; forming a second heat buffer layer over the mirror layer; forming a flexible substrate over the second heat buffer layer; and forming an active device layer over the flexible substrate. The method of the present invention further comprises exposing the sensor array to light from a flash lamp and then detaching the carrier glass substrate from the sensor array. The method of the present invention optionally further comprises filtering the light from the flash lamp to wavelengths below 350 nm.
    Type: Grant
    Filed: April 20, 2017
    Date of Patent: July 17, 2018
    Assignee: DPIX, LLC
    Inventors: Frank Caris, Shawn Michael O'Rourke, Byung-Kyu Park, Terri Renae Pederson
  • Patent number: 10026834
    Abstract: A method of manufacturing an enhanced device and an enhance device are provided. The method comprises: preparing a substrate, and forming a non-planar structure in the substrate; depositing a nitride channel layer on the substrate, a gate region, a source region and a drain region being defined on the nitride channel layer, the gate region of the nitride channel layer having a non-planar structure transferred from the non-planar structure of the substrate; depositing a nitride barrier layer on the nitride channel layer, the nitride barrier layer having a non-planar structure located above and corresponding to the non-planar structure of the nitride channel layer, the nitride barrier layer and the nitride channel layer forming a nitride channel layer/nitride barrier layer heterojunction.
    Type: Grant
    Filed: June 23, 2016
    Date of Patent: July 17, 2018
    Assignee: ENKRIS SEMICONDUCTOR, INC.
    Inventor: Kai Cheng
  • Patent number: 10020639
    Abstract: A laser diode arrangement comprising: at least one semiconductor substrate; at least two laser stacks based on the AlInGaN material system, each laser stack having an active zone, wherein at least one of the at least two laser stacks comprises a two-dimensional structure of laser diodes; and at least one intermediate layer. The laser stacks and the intermediate layer are grown monolithically on the semiconductor substrate. The intermediate layer is arranged between the laser stacks. The active zone of the first laser stack can be actuated separately from the active zone of the at least one further laser stack.
    Type: Grant
    Filed: May 26, 2017
    Date of Patent: July 10, 2018
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventors: Alfred Lell, Martin Strassburg
  • Patent number: 10008543
    Abstract: Various embodiment include optical and optoelectronic devices and methods of making same. Under one aspect, an optical device includes an integrated circuit having an array of conductive regions, and an optically sensitive material over at least a portion of the integrated circuit and in electrical communication with at least one conductive region of the array of conductive regions. Under another aspect, a film includes a network of fused nanocrystals, the nanocrystals having a core and an outer surface, wherein the core of at least a portion of the fused nanocrystals is in direct physical contact and electrical communication with the core of at least one adjacent fused nanocrystal, and wherein the film has substantially no defect states in the regions where the cores of the nanocrystals are fused. Additional devices and methods are described.
    Type: Grant
    Filed: October 3, 2017
    Date of Patent: June 26, 2018
    Assignee: INVISAGE TECHNOLOGIES, INC.
    Inventors: Edward Hartley Sargent, Jason Paul Clifford, Gerasimos Konstantatos, Ian Howard, Ethan J. D. Klem, Larissa Levina
  • Patent number: 10000381
    Abstract: Systems and methods for MBE growing of group-III Nitride alloys, comprising establishing an average reaction temperature range from about 250 C to about 850 C; introducing a nitrogen flux at a nitrogen flow rate; introducing a first metal flux at a first metal flow rate; and periodically stopping and restarting the first metal flux according to a first flow duty cycle. According to another embodiment, the system comprises a nitrogen source that provides nitrogen at a nitrogen flow rate, and, a first metal source comprising a first metal effusion cell that provides a first metal at a first metal flow rate, and a first metal shutter that periodically opens and closes according to a first flow duty cycle to abate and recommence the flow of the first metal from the first metal source. Produced alloys include AlN, InN, GaN, InGaN, and AlInGaN.
    Type: Grant
    Filed: September 21, 2015
    Date of Patent: June 19, 2018
    Assignee: Georgia Tech Research Corporation
    Inventors: Michael William Moseley, William Alan Doolittle
  • Patent number: 9996802
    Abstract: An optical system comprising a charged quantum dot having, a charged carrier, first and second ground state levels and a plurality of excited state levels, the first and second ground state energy levels having different spin states such that the said charged carrier cannot transfer between the first and second ground state energy levels without changing its spin state, the system further comprising a controller adapted to control a first radiating beam with energy not more than 100 micro-eV from a first transition within said quantum dot from a first ground state level to a selected excited state level from the plurality of excited state levels to, the system being adapted to enhance the decay rate of a second transition within said quantum dot from the selected excited state level to a second ground state level, but not a first transition, such that a photon is produced due to scattering of a photon from the first radiating beam, wherein the controller is adapted to irradiate the quantum dot with the fir
    Type: Grant
    Filed: February 16, 2017
    Date of Patent: June 12, 2018
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Anthony John Bennett, Andrew James Shields