Abstract: An image sensor includes a storage device, where the storage device includes a memory element, a first dielectric layer and a light shielding element. The memory element includes a storage node and a storage transistor gate, where the storage transistor gate is located over the storage node. The first dielectric layer is located over a portion of the storage transistor gate. The light shielding element is located on the first dielectric layer and includes a semiconductor layer. The semiconductor layer is electrically isolated from the memory element, where the light shielding element is overlapped with at least a part of a perimeter of the storage transistor gate in a vertical projection on a plane along a stacking direction of the memory element and the light shielding element, and the stacking direction is normal to the plane.

Abstract: An ultraviolet detecting silicon carbide junction field effect transistor with a transistor gate junction positioned proximate to the outer surface to receive ultraviolet: light and flow an ultraviolet light induced photo current when reverse biased.

Abstract: An image sensor includes a substrate having a plurality of unit pixels, a photoelectric device portion and a storage device portion disposed in the substrate and constituting the plurality of unit pixels, a device isolation structure disposed in the substrate and partitioning the plurality of unit pixels, and an overflow gate providing an overflow path between the photoelectric device portion and the storage device portion according to a certain voltage, wherein the device isolation structure is partially opened at a boundary between the photoelectric device portion and the storage device portion.

Abstract: An image display element includes pixels, a driving circuit substrate, a microlens, and an inter-pixel partition. The pixels are disposed in an array, each including a micro light emitting element. The driving circuit substrate includes a driving circuit configured to supply a current to the micro light emitting element and cause the micro light emitting element to emit light. The microlens is disposed for each of the pixels. The inter-pixel partition is disposed between the pixels and extends from a light emitting surface of the micro light emitting element to the microlens.

Abstract: An image sensor and an image processing method of the image sensor are provided. The image sensor includes: a spectral filter including a plurality of unit filters arranged in two dimensions and having different wavelengths; an image sensor including a pixel array receiving light transmitted through the spectral filter and outputting image signals; and a processor performing image processing on image signals output from the pixel array.

Abstract: An image sensor includes a storage device, where the storage device includes a memory element, a first dielectric layer and a light shielding element. The memory element includes a storage node and a storage transistor gate, where the storage transistor gate is located over the storage node. The first dielectric layer is located over a portion of the storage transistor gate. The light shielding element is located on the first dielectric layer and includes a semiconductor layer. The semiconductor layer is electrically isolated from the memory element, where the light shielding element is overlapped with at least a part of a perimeter of the storage transistor gate in a vertical projection on a plane along a stacking direction of the memory element and the light shielding element, and the stacking direction is normal to the plane.

Abstract: An imaging device includes a pixel including a photoelectric conversion region, a first transfer transistor coupled to the photoelectric conversion region, a first floating diffusion, a second floating diffusion, a second transfer transistor coupled between the first floating diffusion and the second floating diffusion to control access to the second floating diffusion, a third transfer transistor coupled to the photoelectric conversion region, a third floating diffusion coupled, a fourth floating diffusion, and a fourth transfer transistor coupled between the third floating diffusion and the fourth floating diffusion to control access to the fourth floating diffusion. The imaging device includes a first wiring layer including a first wiring connected to the second floating diffusion, a second wiring connected to the fourth floating diffusion, and a third wiring connected to ground and capacitively coupled with the first wiring and the second wiring.

Abstract: A semiconductor element, a semiconductor element preparing method, and a solid state imaging apparatus. The semiconductor element comprises: a group of first modulation grids, a group of second modulation grids, a semiconductor region, a first storage region, and a second storage region. The group of first modulation grids and the group of second modulation grids are respectively provided with different voltages, the potential of a signal charge transfer path in the semiconductor region is changed, and signal charges are controlled to move along a second direction; the first storage region is directly connected to the first modulation grids, so that when the voltage of the first storage region is higher than the voltage of the first modulation grids, and the first storage region attracts first signal charges retained in the first modulation grids.

Abstract: The present disclosure relates to a solid-state imaging element and an electronic device capable of increasing the capacitance of a charge holding unit. The solid-state imaging element includes a pixel including a photodiode, an FD that accumulates charges generated in the photodiode, and a charge holding unit that is connected in parallel with the FD. The charge holding unit includes a wiring capacitance formed by parallel running of a first wiring connected to a first potential and a second wiring connected to a second potential different from the first potential. The present disclosure can be applied to a solid-state imaging element that performs global shutter type imaging.

Abstract: A compact camera includes an image sensor, a transparent layer, and a microlens (ML) layer, between the image sensor and the transparent layer. The ML layer forms (a) a first ML array having a plurality of first MLs, and (b) a second ML array with a plurality of second MLs interleaved with the plurality of first MLs. The compact camera also includes a baffle layer, between the ML layer and the image sensor, that forms a plurality of first aperture stops each aligned with a different one of the first MLs and a plurality of second aperture stops each aligned with a different one of the second MLs. The first MLs each have a first set of optical characteristics and the second MLs each have a second set of optical characteristics that are different from the first set of optical characteristics.

Abstract: A pixel cell with an elevated floating diffusion region is formed to reduce diffusion leakage (e.g., gate induced drain leakage, junction leakage, etc.). The floating diffusion region can be elevated by separating a doped floating diffusion region from the semiconductor substrate by disposing an intervening layer (e.g., undoped, lightly doped, etc.) on the semiconductor substrate and beneath the doped floating diffusion region. For instance, the elevated floating diffusion region can be formed by stacked material layers composed of a lightly or undoped base or intervening layer and a heavy doped (e.g., As doped) “elevated” layer. In some examples, the stacked material layers can be formed by first and second epitaxial growth layers.

Abstract: Systems and methods for implementing a detector array are disclosed. According to certain embodiments, a substrate comprises a plurality of sensing elements including a first element and a second element. The detector comprises a switching element configured to connect the first element and the second element. The switching region may be controlled based on signals generated in response to the sensing elements receiving electrons with a predetermined amount of energy.

Abstract: A semiconductor structure and method for manufacturing thereof are provided. The semiconductor structure includes a silicon substrate having a first surface, a III-V layer on the first surface of the silicon substrate and over a first active region, and an isolation region in a portion of the III-V layer extended beyond the first active region. The first active region is in proximal to the first surface. The method includes the following operations. A silicon substrate having a first device region and a second device region is provided, a first active region is defined in the first device region, a III-V layer is formed on the silicon substrate, an isolation region is defined across a material interface in the III-V layer by an implantation operation, and an interconnect penetrating through the isolation region is formed.

Abstract: An imaging arrangement comprising: a plurality of pixels arranged in a matrix; and a signal processing arrangement. A first and a second line of the matrix each comprise a light-receiving pixel and a reference pixel, the light-receiving pixels each receive incident light and output a light signal based on the incident light, and each reference pixel outputs a pixel signal for forming an address signal. The processing arrangement provides a first address signal and a second address signal, wherein: the first address signal indicates the position of the first line and comprises a signal value based on the pixel signal from the first line; and the second address signal indicates the position of the second line and comprises a signal value based on the pixel signal from the second line; and the signal value of the first address signal is different to the signal value of the second address signal.

Abstract: An image sensing device includes a semiconductor substrate, a material layer, a lens layer, and a lens capping layer. The semiconductor substrate includes a pixel region, which include a plurality of unit pixels, and a pixel-array peripheral region located outside of and peripheral to the pixel region. The material layer is disposed over the semiconductor substrate in the pixel region and the pixel-array peripheral region, and includes a first trench extending to a predetermined depth in the pixel-array peripheral region. The lens layer is disposed over the material layer in the pixel region and collects incident light into a unit pixel in the pixel region. The lens capping layer is disposed over the lens layer and the material layer and includes an edge region formed to fill the first trench.

Abstract: According to one embodiment, a display device includes a gate line extending in a first direction, first and second source lines crossing the gate line and arranged in the first direction, a first light-shielding layer having first and second openings, and an oxide semiconductor layer crossing the gate line, and in the display device, the first opening and the second opening are arranged in a second direction crossing the first direction between the first source line and the second source line, the gate line is located between the first opening and the second opening, and the oxide semiconductor layer has a first overlapping portion overlapping the first opening.

Abstract: A method for forming a pixel includes forming, in a semiconductor substrate, a wide trench having an upper depth with respect to a planar top surface of the semiconductor substrate. The method also includes ion-implanting a floating-diffusion region between the planar top surface and a junction depth in the semiconductor substrate. In a cross-sectional plane perpendicular to the planar top surface, the floating-diffusion region has (i) an upper width between the planar top surface and the upper depth, and (ii) between the upper depth and the junction depth, a lower width that exceeds the upper width. Part of the floating-diffusion region is beneath the wide trench and between the upper depth and the junction depth.

Abstract: A Lidar system includes a light emitter and an array of photodetectors. The Lidar system includes a computer having a processor and a memory storing instructions executable by the processor to actuate the light emitter to output a series of shots. The instructions include instructions to provide a first bias voltage to the photodetectors for a first period of time after the light emitter emits a first subset of the series of shots. The instructions includes instructions to provide a second bias voltage to at least one of the photodetectors for a second period of time after the light emitter emits a second subset of the series of shots, the second bias voltage greater that the first bias voltage, the second subset of shots emitted after the first subset of the series of shots.

Abstract: An image sensor includes a storage device, where the storage device includes a memory element, a first dielectric layer and a light shielding element. The memory element includes a storage node and a storage transistor gate, where the storage transistor gate is located over the storage node. The first dielectric layer is located over a portion of the storage transistor gate. The light shielding element is located on the first dielectric layer and includes a semiconductor layer. The semiconductor layer is electrically isolated from the memory element, where the light shielding element is overlapped with at least a part of a perimeter of the storage transistor gate in a vertical projection on a plane along a stacking direction of the memory element and the light shielding element, and the stacking direction is normal to the plane.

Abstract: A method is provided for fabricating an avalanche photodiode (APD) device, in particular, a separate absorption charge multiplication (SACM) APD device. The method includes forming a first contact region and a second contact region in a semiconductor layer. Further, the method includes forming a first mask layer above at least a first contact region of the semiconductor layer adjacent to the first contact region, and forming a second mask layer above and laterally overlapping the first mask layer. Thereby, a mask window is defined by the first mask layer and the second mask layer, and the first mask layer and/or the second mask layer are formed above a second contact region of the semiconductor layer adjacent to the second contact region.

Abstract: The present technique relates to a solid-state imaging device and an imaging apparatus that enable provision of a solid-state imaging device having superior color separation and high sensitivity. The solid-state imaging device includes a semiconductor layer in which a surface side becomes a circuit formation surface, photoelectric conversion units PD1 and PD2 of two layers or more that are stacked and formed in the semiconductor layer, and a longitudinal transistor Trl in which a gate electrode is formed to be embedded in the semiconductor layer from a surface of the semiconductor layer. The photoelectric conversion unit PD1 of one layer in the photoelectric conversion units of the two layers or more is formed over a portion of the gate electrode of the longitudinal transistor Trl embedded in the semiconductor substrate and is connected to a channel formed by the longitudinal transistor Trl.

Abstract: Some embodiments of the present disclosure provide a semiconductor-based photon-counting sensor comprising a metal-insulator-semiconductor internal photoemission (e.g., thermionic-emission) detector formed on and/or in a first surface of a semiconductor substrate, and at least one jot formed on and/or in a second side of a semiconductor substrate. The at least one MIS photoemission detector and the at least one jot are configured such that a photocarrier generated in response to a photon incident on the MIS thermionic-emission detector is readout by the at least one jot.

Abstract: An image sensor includes a substrate having a first surface, a charge storage portion disposed in the substrate, a light-blocking pattern disposed on the first surface overlapping the charge storage portion, and a low-refractive index pattern on the light-blocking pattern.

Abstract: An imaging element according to an embodiment of the present disclosure includes a first photoelectric conversion section and a second photoelectric conversion section that are stacked in order from light incident side and that selectively detect and photoelectrically convert light beams of different wavelength bands, and the second photoelectric conversion section is disposed at an interval narrower than a pixel pitch of the first photoelectric conversion section.

Abstract: An organic photoelectric conversion device includes first and second organic photoelectric conversion elements which convert light into electrical energy. The first and second organic photoelectric conversion elements are disposed to be stacked in this order along an incident direction of the light. The first organic photoelectric conversion element includes a first element main body including a first substrate, first and second transparent electrodes, and an organic photoelectric conversion unit having sensitivity in a first wavelength band of the light, and a first protective film that covers the first element main body. The second organic photoelectric conversion element includes a second element main body including a second substrate, a third transparent electrode, an electrode, and an organic photoelectric conversion unit having sensitivity in a second wavelength band of the light, and a second protective film that covers the second element main body.

Abstract: An image sensor having pixels that include two patterned semiconductor layers. The top patterned semiconductor layer contains the photoelectric elements of pixels having substantially 100% fill-factor. The bottom patterned semiconductor layer contains transistors for detecting, resetting, amplifying and transmitting signals charges received from the photoelectric elements. The top and bottom patterned semiconductor layers may be separated from each other by an interlayer insulating layer that may include metal interconnections for conducting signals between devices formed in the patterned semiconductor layers and from external devices.

Abstract: An image sensor having pixels that include two patterned semiconductor layers. The top patterned semiconductor layer contains the photoelectric elements of pixels having substantially 100% fill-factor. The bottom patterned semiconductor layer contains transistors for detecting, resetting, amplifying and transmitting signals charges received from the photoelectric elements. The top and bottom patterned semiconductor layers may be separated from each other by an interlayer insulating layer that may include metal interconnections for conducting signals between devices formed in the patterned semiconductor layers and from external devices.

Abstract: There is provided a solid-state image sensor including pixels each at least including light receiving parts receiving light to generate charge, a transfer part transferring the charge accumulated in the light receiving parts, and memory parts holding the charge transferred via the transfer part, and a predetermined number of elements shared by the plurality of pixels, the predetermined number of elements being for outputting a pixel signal at a level corresponding to the charge, wherein one or some of the plurality of pixels is/are a correction pixel(s) outputting a correction pixel signal used for correcting a pixel signal outputted from pixels other than the one or some of the plurality of pixels, and one or some of the predetermined number of elements is/are formed on a wiring layer side of the light receiving parts included in the correction pixel(s).

Abstract: An image sensor includes: a switching element disposed on a substrate; a photoelectric conversion element connected to the switching element; a first protective film directly covering the photoelectric conversion element; and a first organic film formed at a layer above the switching element, the first organic film being in contact with the first protective film, wherein the first organic film covers a first end portion of the photoelectric conversion element, the first end portion being at least a part of an end portion of the photoelectric conversion element, wherein the first organic film has a first covering portion at an end of the first organic film, wherein the first covering portion covers the first end portion, wherein the first covering portion is inclined down towards the photoelectric conversion element, and wherein the first organic film covers only the first end portion of the photoelectric conversion element.

Abstract: A multi-spectral photodetector is provided, comprising: a plurality of N photodetectors where N is an integer such that N?2, each photodetector comprising an anode and a cathode separated from one another by a region of interest, all produced in a semiconductor material; at least one electrical contact for all of the N anodes; and an electrical contact associated with each of the N cathodes; said photodetectors being stacked on top of one another such that the anodes and the cathodes and finally the regions of interest of two consecutive photodetectors in the stack are arranged face to face, this stack making it possible to define a face, termed the active face of the multi-spectral photodetector, common to all the photodetectors of the stack, defined by the face of the first region of interest of the first photodetector of the stack via which photons are intended to enter the stack.

Abstract: According to one embodiment, a display device includes a gate line extending in a first direction, first and second source lines crossing the gate line and arranged in the first direction, a first light-shielding layer having first and second openings, and an oxide semiconductor layer crossing the gate line, and in the display device, the first opening and the second opening are arranged in a second direction crossing the first direction between the first source line and the second source line, the gate line is located between the first opening and the second opening, and the oxide semiconductor layer has a first overlapping portion overlapping the first opening.

Abstract: Disclosed are an organic photoelectric device including a first electrode and a second electrode facing each other and a photoelectric conversion layer disposed between the first electrode and the second electrode and selectively absorbing light in a green wavelength region, wherein the photoelectric conversion layer includes a first and second photoelectric conversion materials, a light-absorption full width at half maximum (FWHM) in a green wavelength region of the first photoelectric conversion material is narrower than the light-absorption FWHM in a green wavelength region of the second photoelectric conversion material, and the first and second photoelectric conversion materials satisfy Relationship Equation 1, and an image sensor and an electronic device including the same. Tm2(° C.)?Ts2(10)(° C.)?Tm1(° C.)?Ts1(10)(° C.

Abstract: The photodetector device comprises a substrate (1) of semiconductor material, a sensor region (2) in the substrate, a plurality of grid elements (4) arranged at a distance (d) from one another above the sensor region, the grid elements having a refractive index, a region of lower refractive index (3), the grid elements being arranged on the region of lower refractive index, and a further region of lower refractive index (5) covering the grid elements.

Abstract: The present technique relates to a solid-state imaging device and an imaging apparatus that enable provision of a solid-state imaging device having superior color separation and high sensitivity. The solid-state imaging device includes a semiconductor layer in which a surface side becomes a circuit formation surface, photoelectric conversion units PD1 and PD2 of two layers or more that are stacked and formed in the semiconductor layer, and a longitudinal transistor Tr1 in which a gate electrode is formed to be embedded in the semiconductor layer from a surface of the semiconductor layer. The photoelectric conversion unit PD1 of one layer in the photoelectric conversion units of the two layers or more is formed over a portion of the gate electrode of the longitudinal transistor Tr1 embedded in the semiconductor substrate and is connected to a channel formed by the longitudinal transistor Tr1.

Abstract: Various embodiments of the present application are directed to a method for forming a thin semiconductor-on-insulator (SOI) substrate without implantation radiation and/or plasma damage. In some embodiments, a device layer is epitaxially formed on a sacrificial substrate and an insulator layer is formed on the device layer. The insulator layer may, for example, be formed with a net charge that is negative or neutral. The sacrificial substrate is bonded to a handle substrate, such that the device layer and the insulator layer are between the sacrificial and handle substrates. The sacrificial substrate is removed, and the device layer is cyclically thinned until the device layer has a target thickness. Each thinning cycle comprises oxidizing a portion of the device layer and removing oxide resulting from the oxidizing.

Abstract: An image sensor may include a semiconductor substrate in which a photodiode is formed; a metal interconnection layer located above the semiconductor substrate; and an absorption layer located between the semiconductor substrate and the metal interconnection layer, wherein the absorption layer is configured to absorb light travelling through the semiconductor substrate.

Abstract: A semiconductor device and a method for fabricating the same are provided. The semiconductor device includes a substrate, first and second recesses spaced apart from each other in a first direction within the substrate, a first gate electrode filling the first recess and protruding above the substrate, a second gate electrode filling the second recess and protruding above the substrate, a first source/drain formed between the first and second recesses, a second source/drain formed in an opposite direction to the first source/drain with respect to the first recess, and a third source/drain formed in an opposite direction to the first source/drain with respect to the second recess and electrically connected to the second source/drain.

Abstract: A theatre lighting apparatus including a base housing; and a lamp housing; wherein the lamp housing is remotely positioned in relation to the base housing by a motor; and wherein the lamp housing is comprised of a plurality of light sources and a plurality of lenses. Each of the plurality of lenses has a first surface and a second surface; each second surface of each of the plurality of lenses has an inner portion and a perimeter portion; and wherein the inner portion of each of the plurality of lenses is substantially more polished, and substantially less diffuse that the corresponding perimeter portion of each of the plurality of lenses so that light is transmitted in a substantially uniform direction through the inner portion of each of the plurality of lenses and light is transmitted in a scattered manner through the perimeter portion of each of the plurality of lenses.

Abstract: A semiconductor device structure includes a first chip including a plurality of dielectric layers and a multi-layered metal structure embedded in the plurality of dielectric layer, a second chip bonded to the first chip to generate a bonding interface and including a metal structure, a first via structure extending through the first chip and crossing the bonding interface into the metal structure in the second chip, and a second via structure extending in the first chip and electrically connected to the multi-layered metal structure in the first chip. The first via structure further includes a first via metal and a first via dielectric layer, the first via dielectric layer interposes between the first via metal and the plurality of dielectric layers of the first chip and extends from the first chip to the metal structure in the second chip.

Abstract: Disclosed herein is a solid-state imaging apparatus including: a semiconductor base; a photodiode created on the semiconductor base and used for carrying out photoelectric conversion; a pixel section provided with pixels each having the photodiode; a first wire created by being electrically connected to the semiconductor base for the pixel section through a contact section and being extended in a first direction to the outside of the pixel section; a second wire made from a wiring layer different from the first wire and created by being extended in a second direction different from the first direction to the outside of the pixel section; and a contact section for electrically connecting the first and second wires to each other.

Abstract: An imaging device includes: a semiconductor substrate; a photoelectric conversion element that, in operation, generates a signal by performing photoelectric conversion on incident light; a multilayer wiring structure including a first wiring layer and a second wiring layer which are provided between the semiconductor substrate and the photoelectric conversion element; and a circuitry that is provided in the semiconductor substrate and the multilayer wiring structure, and, in operation, processes the signal. The circuitry includes a first transistor and a first capacitance element. The first transistor includes a first gate, and a first source region and a first drain region which are provided in the semiconductor substrate. The first capacitance element includes a first electrode, a second electrode, and a dielectric film disposed between the first electrode and the second electrode. The first electrode is disposed between the photoelectric conversion element and the first gate of the first transistor.

Abstract: A ferroelectric memory device includes a substrate, an interfacial insulation layer disposed on the substrate, a recombination induction layer disposed on the interfacial insulation layer, a ferroelectric layer disposed on the recombination induction layer, and a gate electrode disposed on the ferroelectric layer. The recombination induction layer includes a material containing holes acting as a majority carrier.

Abstract: The present disclosure provides CMOS image sensors. A CMOS image sensor includes a substrate having a first region and a second region connecting with the first region at a first end of the first region; a transfer transistor formed on the surface of the substrate in the second region; a floating diffusion (FD) region formed in the surface of the substrate at one side of the transfer transistor in the second region; a third implanting region formed in the surface of the substrate 200 in the first region, being formed from a first implanting region; a second implanting region and an adjacent fifth implanting region formed under the third implanting region; and a fourth implanting region formed under the second implanting region and the fifth implanting region, being electrically connected with the third implanting region by the fifth implanting region.

Abstract: A solid-state imaging device is provided, which includes a photodiode having a first conductivity type semiconductor area that is dividedly formed for each pixel; a first conductivity type transfer gate electrode formed on the semiconductor substrate via a gate insulating layer in an area neighboring the photodiode, and transmitting signal charges generated and accumulated in the photodiode; a signal reading unit reading a voltage which corresponds to the signal charge or the signal charge; and an inversion layer induction electrode formed on the semiconductor substrate via the gate insulating layer in an area covering a portion or the whole of the photodiode, and composed of a conductor or a semiconductor having a work function. An inversion layer is induced, which is formed by accumulating a second conductivity type carrier on a surface of the inversion layer induction electrode side of the semiconductor area through the inversion layer induction electrode.

Abstract: The present application discloses a light emitting diode comprising a substrate; and a light emitting layer on the substrate. The light emitting layer comprises, an N-type doped layer; a quantum well active layer; and a P-type doped layer. At least one of the N-type doped layer and the P-type doped layer comprises an uneven layer adapted to concentrate light emitting from the light emitting layer.

Abstract: The present technology relates to a solid-state imaging device, a manufacturing method of a solid-state imaging device, and an electronic device, in which degradation of transfer characteristics of a photo diode can be suppressed. A floating diffusion is formed to reach the same depth as a layer of a photo diode formed on a silicon substrate, and a transfer transistor gate is formed therebetween. A channel that is opened/closed by control of the transfer transistor gate is formed in the silicon substrate formed with the photo diode. With this configuration, charge accumulated in the photo diode can be transferred to the floating diffusion in a vertical direction relative to the depth direction, and degradation of transfer characteristics caused by elimination of the transfer channel can be suppressed by setting the transfer channel in the depth direction. The present technology can be applied to a solid-state imaging device.

Abstract: An pixel unit includes a photoelectric conversion element, a transfer transistor having a transfer gate abutting on the photoelectric conversion element, and a floating diffusion region on which the transfer gate abuts, wherein the transfer gate includes a first gate portion having a first gate width in a gate width direction, the first gate portion abutting on the floating diffusion region and extending away from the floating diffusion region in a gate length direction, and a second gate portion having a second gate width narrower than the first gate width in the gate width direction, the second gate portion extending continuously from the first gate portion in the gate length direction, and wherein a width of the second gate portion gradually decreases from the first gate width to the second gate width toward a direction away from the first gate portion.

Abstract: The present technology relates to a solid-state imaging apparatus, a manufacturing method therefor, and an electronic apparatus by which fine pixel signals can be suitably generated. A charge accumulation section that is formed on a first semiconductor substrate and accumulates photoelectrically converted charges, a charge-retaining section that is formed on a second semiconductor substrate and retains charges accumulated in the charge accumulation section, and a transfer transistor that is formed on the first semiconductor substrate and the second semiconductor substrate and transfers charges accumulated in the charge accumulation section to the charge-retaining section are provided. A bonding interface between the first semiconductor substrate and the second semiconductor substrate is formed in a channel of the transfer transistor.

Abstract: A method of manufacturing a bipolar junction transistor (BJT) structure is provided. Pattern etching through a second semiconductor layer and recessing a silicon germanium layer are performed to form a plurality of vertical fins each including a silicon germanium pattern, a second semiconductor pattern and a hard mask pattern sequentially stacked on a first semiconductor layer above a substrate. First spacers are formed on sidewalls of the plurality of vertical fins. Exposed silicon germanium layer above the first semiconductor layer is directionally etched away. A germanium oxide layer is conformally coated to cover all exposed top and sidewall surfaces. Condensation annealing followed by silicon oxide strip is performed. The first spacers, remaining germanium oxide layer and the hard mask pattern are removed. A dielectric material is deposited to isolate the plurality of vertical fins.

Abstract: A circuit for automatically measuring gain of a built-in trans-impedance amplifier includes a current source built in a trans-impedance amplifier chip for generating a constant current to an input end of the trans-impedance amplifier. The circuit samples a voltage amplitude at an output end of the trans-impedance amplifier using a voltage amplitude sampling device, and calculates the gain of the trans-impedance amplifier. The current source has a constant reference voltage source, a reference current generator, a clock source, an AC switch, and an off-chip precision resistor. The circuit is configured to measure gain of trans-impedance amplifiers directly.