Abstract: A display includes: a substrate having a pixel region and a sensor region in which photo-sensor parts are formed; an illuminating section operative to illuminate the substrate from one surface side of the substrate; a thin film photodiode disposed in the sensor region, having at least a P-type semiconductor region and an N-type semiconductor region, and operative to receive light incident from the other surface side of the substrate; and a metallic film formed on the one surface side of the substrate so as to face the thin film photodiode through an insulator film, operative to restrain light generated from the illuminating section from being directly incident on the thin film photodiode from the one surface side, and fixed to a predetermined potential, wherein in the thin film photodiode, the width of the P-type semiconductor region and the width of the N-type semiconductor region are different from each other.

Abstract: The invention provides a semiconductor device manufactured with a plurality of photodiodes so that it does not short circuit, and includes an opening without leakage. A second semiconductor layer (12, 16) of second conductivity type is formed on a main surface of a first semiconductor layer (10, 11) of the first conductivity type. Element-separating regions (13, 14, 15, 17) are formed at least on the second semiconductor layer to separate the device into the regions of photodiodes (PD1-PD4). A conductive layer (18) is formed on the second semiconductor layer 16 in a divided pattern that provides a segment for each photodiode and is connected to the second semiconductor layer (16) along the an outer periphery with respect to all photodiodes. An insulation layer (19, 21) is formed on the entire surface to cover conductive layer (18). An opening, which reaches the second semiconductor layer (16), is formed in the insulation layer (19, 21) in the region inside the pattern of conductive layer (18).

Abstract: A method of manufacturing a solid state imaging device having a photo-electric conversion portion array and a transfer electrode array, these arrays being provided in parallel to each other, upper surfaces and side wall surfaces of the transfer electrode array being covered with a light-shielding layer, and a transparent layer showing an oxidizing property at the time of film formation, the transparent layer being formed on the photo-electric conversion parts and the light-shielding layer.

Abstract: An image sensor includes an epi-layer of a first conductivity type formed in a substrate, a photodiode formed in the epi-layer, and a first doping region of a second conductivity type formed under the photodiode to separate the first doping region from the photodiode.

Abstract: The present invention provides a high-speed charge-transfer photodiode encompassing a first conductivity type semiconductor layer (20) serving as a charge-generation region; and a second conductivity type surface-buried region (21a) serving as a charge-transfer region of charges generated by the charge-generation region, wherein a specified direction in the surface-buried region (21a) provided along a plane parallel to a surface of the semiconductor layer (20) is assigned as a charge-transfer direction of the charges, and at least one of a variation of widths of the surface-buried region (21a) measured in an orthogonal direction to the charge-transfer direction and a variation of impurity concentration distributions of the surface-buried region (21a), which are measured along the charge-transfer direction, is determined such that an electric field distribution in the charge-transfer direction is constant.

Abstract: A backside illuminated imaging sensor includes a semiconductor layer, a metal interconnect layer and a silicide light reflecting layer. The semiconductor layer has a front surface and a back surface. An imaging pixel that includes a photodiode region is formed within the semiconductor layer. The metal interconnect layer is electrically coupled to the photodiode region and the silicide light reflecting layer is coupled between the metal interconnect layer and the front surface of the semiconductor layer. In operation, the photodiode region receives light from the back surface of the semiconductor layer, where a portion of the received light propagates through the photodiode region to the silicide light reflecting layer. The silicide light reflecting layer is configured to reflect the portion of light received from the photodiode region.

Abstract: Provided are an image sensor and a method of fabricating the same. The image sensor according to an embodiment includes a semiconductor substrate including a circuit region; a metal interconnection layer including a metal interconnection and an interlayer dielectric on the semiconductor substrate; a plurality of first pixel isolation layers on the interlayer dielectric, each of the first pixel isolation layers protruding above a top surface of the interlayer dielectric; and a light receiving portion between the first pixel isolation layers, the light receiving portion including protruding portions along sidewalls of the first pixel isolation layers.

Abstract: The present invention is a pixel sensor cell and method of making the same. The pixel sensor cell approximately doubles the available signal for a given quanta of light. The device of the present invention utilizes the holes produced by impinging photons in a pixel sensor cell circuit. A pixel sensor cell having reduced complexity includes an n-type collection well region formed beneath a surface of a substrate for collecting electrons generated by electromagnetic radiation impinging on the pixel sensor cell and a p-type collection well region formed beneath the surface of the substrate for collecting holes generated by the impinging photons. A circuit structure having a first input is coupled to the n-type collection well region and a second input is coupled to the p-type collection well region, wherein an output signal of the pixel sensor cell is the magnitude of the difference of a signal of the first input and a signal of the second input.

Abstract: Disclosed are a CMOS image sensor and a method for manufacturing the same, capable of improving the characteristics of the image sensor by increasing junction capacitance of a floating diffusion area. The CMOS image sensor generally includes a photodiode and a plurality of transistors (e.g., transfer, reset, drive, and select transistors), a first conductive type semiconductor substrate, having an active area including a photodiode area, a floating diffusion area, and a voltage input/output area, a gate electrode of each transistor on the active area, a first conductive type first well area in the semiconductor substrate corresponding to the voltage input/output area, a first conductive type second well area in the semiconductor substrate corresponding to the floating diffusion area, and a second conductive type diffusion area in the semiconductor substrate at opposed sides of each gate electrode.

Abstract: A thin film transistor array substrate and a fabricating method thereof are disclosed. The thin film transistor array substrate protects a thin film transistor without a protective film and accordingly reduces the manufacturing cost. In the thin film transistor array substrate, a gate electrode is connected to a gate line. A source electrode is connected to a data line crossing the gate line to define a pixel area. A drain electrode is opposed to the source electrode with a channel therebetween. A semiconductor layer is in the channel. A pixel electrode in the pixel area contacts the drain electrode over substantially the entire overlapping area between the two. A channel protective film is provided on the semiconductor layer corresponding to the channel to protect the semiconductor layer.

Abstract: It is intended to provide a solid-state image pickup element capable of reducing an area of a read channel to increase a light-receiving area. The solid-state image pickup element comprises a p-type planar semiconductor, a hole formed in the p-type planar semiconductor, a p+-type region formed in a bottom of the hole, a p+-type isolation region formed in a part of a sidewall of the hole and connected to the p+-type region, an n-type photoelectric conversion region formed beneath the p+-type region, a transfer electrode formed on the entire sidewall of the hole through a gate dielectric film, a CCD channel region formed in a top of the p-type planar semiconductor, and a read channel formed in a region of the p-type planar semiconductor between the n-type photoelectric conversion region and the CCD channel region.

Abstract: CMOS image sensors and methods of fabricating the same. The CMOS image sensors include a pixel array region having an active pixel portion and an optical block pixel portion which encloses the active pixel portion. The optical block pixel portion includes an optical block metal pattern for blocking light. The optical block metal pattern may be connected to a ground portion.

Abstract: Disclosed herein is a solid-state imaging device including: a semiconductor substrate; a sensor of impurity diffusion layer formed on the surface layer of said semiconductor substrate; a negative charge accumulation layer formed on said sensor from an insulating material containing a first metallic substance; and an interfacial layer formed between said sensor and said negative charge accumulation layer from an insulating material containing a second metallic substance having greater electronegativity than said first metallic substance.

Abstract: An active pixel using a photodiode with multiple species of P type dopants is disclosed. The pixel comprises a photodiode formed in a semiconductor substrate. The photodiode is a P? region formed within an N-type region. The P? region is formed from an implant of boron and an implant of indium. Further, the pixel includes a transfer transistor formed between the photodiode and a floating node and selectively operative to transfer a signal from the photodiode to the floating node. Finally, the pixel includes an amplification transistor controlled by the floating node.

Abstract: A method of manufacturing a solid state imaging device having a photo-electric conversion portion array and a transfer electrode array, these arrays being provided in parallel to each other, upper surfaces and side wall surfaces of the transfer electrode array being covered with a light-shielding layer, and a transparent layer showing an oxidizing property at the time of film formation, the transparent layer being formed on the photo-electric conversion parts and the light-shielding layer.

Abstract: The method for manufacturing a CMOS image sensor is employed to prevent bridge phenomenon between adjacent microlenses by employing openings between the microlenses. The method includes the steps of: preparing a semiconductor substrate including isolation regions and photodiodes therein obtained by a predetermined process; forming an interlayer dielectric (ILD), metal interconnections and a passivation layer formed on the semiconductor substrate in sequence; forming a color filter array having a plurality of color filters on the passivation layer; forming an over-coating layer (OCL) on the color filter array by using a positive photoresist or a negative photoresist; forming openings in the OCL by patterning the OCL by using a predetermined mask; and forming dome-typed microlenses on a patterned OCL.

Abstract: An image sensor comprises a substrate of a first conductivity type. First and second pixels are arrayed over the substrate. A potential barrier is formed in a region of the substrate corresponding to the first pixel but not in a region of the substrate corresponding to the second pixel. The second pixel is responsive to a color having a wavelength longer than the color to which the first pixel is responsive. The potential barrier is doped with dopants by a high energy ion implantation dopants or by an ion implantation or diffusion during epitaxial growth of the P-type epitaxial layer.

Abstract: A solid-state imaging apparatus includes a plurality of photosensitive cells, and a driving unit provided for driving the plurality of photosensitive cells. Each photosensitive cell includes a photodiode formed to be exposed on a surface of a semiconductor substrate for the purpose of accumulating signal charge obtained by subjecting incident light to photoelectric conversion, a transfer transistor for transferring signal charge accumulated by the photodiode, a floating diffusion layer for temporarily accumulating signal charge transferred by the transfer transistor, and an amplifier transistor for amplifying signal charge temporarily accumulated in the floating diffusion layer. A source/drain diffusion layer provided in the amplifier transistor is covered with a salicide layer, and the floating diffusion layer is formed to be exposed on a surface of the semiconductor substrate.

Abstract: The present invention includes methods for producing GaAs/Si composites, GaAs/Si composites, apparatus for preparing GaAs/Si composites, and a variety of electronic and photoelectric circuits and devices incorporating GaAs/Si composites of the present invention.

Abstract: Provided is an image sensor. The image sensor includes a semiconductor substrate, an interlayer dielectric, metal interconnections, a first electrode, a lower electrode, a second electrode, and a photodiode. The semiconductor substrate has at least one transistor thereon. The interlayer dielectric is on the semiconductor substrate. The metal interconnections pass through the interlayer dielectric. The first electrode is in the interlayer dielectric between the metal interconnections. The lower electrode is on the interlayer dielectric to connect to the metal interconnection. The second electrode is on the interlayer dielectric at a position corresponding to the first electrode, and a gap region is between the second electrode and the lower electrode. The photodiode is on the interlayer dielectric with the lower electrode and the second electrode.

Abstract: A trench isolation having a sidewall and bottom implanted region located within a substrate of a first conductivity type is disclosed. The sidewall and bottom implanted region is formed by an angled implant, a 90 degree implant, or a combination of an angled implant and a 90 degree implant, of dopants of the first conductivity type. The sidewall and bottom implanted region located adjacent the trench isolation reduces surface leakage and dark current.

Abstract: A light emitting display device includes a light emitting diode and a thin film transistor on a substrate, the light emitting diode and thin film transistor being electrically coupled to each other, and a photo diode on the substrate, the photo diode including an N-type doping region, a P-type doping region, and an intrinsic region between the N-type doping region and the P-type doping region, the intrinsic region including amorphous silicon.

Abstract: A light-emitting diode (LED) apparatus includes an epitaxial multilayer, a micro/nano rugged layer and an anti-reflection layer. The epitaxial multilayer has a first semiconductor layer, an active layer and a second semiconductor layer in sequence. The micro/nano rugged layer is disposed on the first semiconductor layer of the epitaxial multilayer. The anti-reflection layer is disposed on the micro/nano rugged layer. In addition, a manufacturing method of the LED apparatus is also disclosed.

Abstract: This invention provides a type of solid-state image pickup device characterized by the fact that for a solid-state image pickup device with a broad dynamic range, it is possible to suppress the dark current than photoelectrons overflowing from the photodiode, as well as its driving method. Plural pixels are integrated in an array configuration on a semiconductor substrate. Each pixel has the following parts: photodiode (CPD), transfer transistor (?T), floating diffusion (CFD), accumulating capacitive element (CS), accumulating transistor (?S), and a reset transistor. During the accumulating period of photoelectric charge, voltage (?) over that applied on the semiconductor substrate, or ?0.6 V or lower than the voltage applied on the semiconductor substrate, is applied as an OFF potential on the gate electrode of at least one transfer transistor, the accumulating transistor and the reset transistor.

Abstract: A complementary metal-oxide-semiconductor (CMOS) image sensor comprises a first photosensitive diode comprising a first semiconductor material is formed in a first semiconductor substrate. A second photosensitive diode comprising a second semiconductor material, which has a different light detection wavelength range than the first semiconductor material, is formed in a second semiconductor substrate. Semiconductor devices for holding and detecting charges comprising a sensing circuit of the CMOS image sensor may also be formed in the second semiconductor substrate. The first semiconductor substrate and the second semiconductor substrate are bonded so that the first photosensitive diode is located underneath the second photosensitive diode. The vertical stack of the first and second photosensitive diodes detects light in the combined detection wavelength range of the first and second semiconductor materials. Sensing devices may be shared between the first and second photosensitive diodes.

Abstract: The embodiment relates to a complementary metal oxide semiconductor (CMOS) image sensor and more particularly, to a CMOS image sensor and a manufacturing method thereof capable of improving electron storing capacity in a floating diffusion area. The CMOS image sensor includes a first gate electrode on a semiconductor substrate; a photodiode in the semiconductor substrate on one side of the first gate electrode; a floating diffusion area in the semiconductor substrate on an opposite side of the first gate electrode; a capacitor including a lower capacitor electrode connected to the floating diffusion area, a dielectric layer on the lower capacitor electrode, and an upper capacitor electrode; a drive capacitor coupled to the lower capacitor electrode and having a second gate electrode connected to the floating diffusion area. The electron storing capacity of the floating diffusion node is increased, making it possible to improve the dynamic range of the image sensor.

Abstract: A solid-state imaging device includes a pixel including a buried photodiode formed inside a substrate, a buried floating diffusion formed at a depth equal to that of the buried photodiode in the substrate so as to face a bottom of a trench portion formed in the substrate, and a buried gate electrode formed at the bottom of the trench portion in order to transfer a signal charge from the buried photodiode to the buried floating diffusion.

Abstract: An image sensor with an image area having a plurality of photodetectors of a first conductivity type includes a substrate of the second conductivity type; a first layer of the first conductivity type spanning the image area; a second layer of the second conductivity type; wherein the first layer is between the substrate and the second layer, and the plurality of photodetectors is disposed in the second layer and abut the first layer.

Abstract: An imager having a pixel cell having an associated strained silicon layer. The strained silicon layer increases charge transfer efficiency, decreases image lag, and improves blue response in imaging devices.

Abstract: A hypersensitive semiconductor die structure is disclosed, in which flip-chip packaging is used in conjunction with a modified SOI die in which a thick silicon support substrate has been removed to increase sensitivity of the sensing device. Rather than being located beneath layers of interconnects and dielectric, the disclosed structure places the sensing devices close to the surface, more closely exposed to the environment in which sensing is to occur. The structure also allows for the placement of sensing films on nearer to the sensing devices and/or an oxide layer overlying the sensing devices.

Abstract: A method and apparatus for operating an imager pixel that includes the act of applying a relatively small first polarity voltage and a plurality of pulses of a second polarity voltage on the gate of a transfer transistor during a charge integration period.

Abstract: An n-type region as a charge storage region of a photodiode is buried in a substrate. The interface between silicon and a silicon oxide film is covered with a high concentration p-layer and a lower concentration p-layer is formed only in the portion immediately below a floating electrode for signal extraction. Electrons generated by light are stored in the charge storage region, thereby changing the potential of the portion of the p-layer at the surface of the semiconductor region. The change is transmitted through a thin insulating film to the floating electrode by capacitive coupling and read out by a buffer transistor. Initialization of charges is executed by adding a positive high voltage to the gate electrode of a first transfer transistor such that the electrons stored in the charge storage region are transferred to the n+ region and generation of reset noise is protected.

Abstract: Disclosed is a CMOS image sensor including a gate electrode of a finger type transfer transistor for controlling the saturation state of a floating diffusion region according to the luminance level (i.e. low luminance or high luminance). The CMOS image sensor includes first and second photodiode regions for generating electrons in response to incident light, and a transfer transistor positioned between the first and second photodiodes for receiving the generated electrons transferred from the first and/or second photodiode.

Abstract: An image sensor includes a light receiving device in a substrate, a color filter over the light receiving device, a buffer film over the color filter, and a microlens on the buffer film. The microlens has a concave bottom face and a convex top face. The buffer film has a substantially flat top outside the microlens and has a convex top face below the microlens.

Abstract: A CMOS image sensor cell includes a semiconductor active region of first conductivity type having a surface thereon and a P-N junction photodiode in the active region. A drive transistor is also provided in the semiconductor active region. The drive transistor has a gate electrode that is configured to receive charge generated in the P-N junction photodiode during an image capture operation (i.e., during capture of photons received from an image). This drive transistor has a gate electrode and a contoured channel region extending underneath the gate electrode. The contoured channel region has an effective channel length greater than a length of the gate electrode.

Abstract: A solid-state imaging device, a line sensor and an optical sensor for enhancing a wide dynamic range while keeping high sensitivity with a high S/N ratio, and a method of operating a solid-state imaging device for enhancing a wide dynamic range while keeping high sensitivity with a high S/N ratio are provided. The solid-state imaging device comprises an integrated array of a plurality of pixels, each of which comprises a photodiode PD for receiving light and generating photoelectric charges, a transfer transistor Tr1 for transferring the photoelectric charges, and a storage capacitor element C connected to the photodiode PD at least through the transfer transistor Tr1 for accumulating, at least through the transfer transistor Tr1, the photoelectric charge overflowing from the photodiode PD during accumulating operation.

Abstract: A dual-pixel full color CMOS imager comprises a two-photodiode stack including an n doped substrate, a bottom photodiode, and a top photodiode. The bottom photodiode has a bottom p doped layer at a first depth overlying the substrate and a bottom n doped layer cathode overlying the bottom p doped layer. The top photodiode has a top p doped layer overlying the bottom n doped layer and a top n doped layer cathode overlying the top p doped layer. A single photodiode including a bottom p doped layer overlies the substrate at a third depth. The third depth is less than, or equal to the first depth. A bottom n doped layer overlies the bottom p doped layer, a top p doped layer directly overlies the bottom n doped layer without an intervening layer, and a top n doped layer overlies the top p doped layer.

Abstract: A solid-state imaging device includes: an imaging region including a plurality of light-receiving parts; a first transfer section provided on the imaging region and transferring, in a first direction, signals generated by the light-receiving parts; a second transfer section provided at a first side of the imaging region and transferring, in a second direction intersecting the first direction, the signals transferred from the first transfer section; an output circuit for outputting the signals; and bonding pads provided at the first side of the imaging region with the second transfer section sandwiched between the imaging region and the bonding pads. The bonding pads are arranged in a plurality of rows each extending in the second direction. Each of the bonding pads in one of the rows at least partially overlaps one of the bonding pads in another one of the rows when viewed in the first direction.

Abstract: An image sensor has a semiconductor substrate of a first conductivity type having a photo-detecting surface and a semiconductor region of a second conductivity type disposed under the photo-detecting surface and forming a junction with the semiconductor substrate. A dielectric body is provided in the semiconductor substrate beneath the junction so that a width of the dielectric body in a direction parallel to the photo-detecting surface does not extend beyond a width of the semiconductor region in the direction parallel to the photo-detecting surface. The dielectric body is polarized due to charges forming a depletion region generated by the semiconductor substrate and the semiconductor region. A width of the dielectric body is approximately equal to a width of an inner surface of the depletion in the direction parallel to the photo-detecting surface of the semiconductor substrate.

Abstract: A method, apparatus, and system that provides one or more charge collecting protection regions in a pixel array, each formed below a storage region of a pixel cell, but not below at least one photosensor of one pixel of the array. The storage region includes a floating diffusion region and/or a storage gate in the pixel cell of the imaging device. The protection regions can keep stray charges from reaching the storage regions.

Abstract: A solid-state imaging device includes: an imaging region including a plurality of light-receiving parts; a first transfer section provided on the imaging region and transferring, in a first direction, signals generated by the light-receiving parts; a second transfer section provided at a first side of the imaging region and transferring, in a second direction intersecting the first direction, the signals transferred from the first transfer section; an output circuit for outputting the signals; and bonding pads provided at the first side of the imaging region with the second transfer section sandwiched between the imaging region and the bonding pads. The bonding pads are arranged in a plurality of rows each extending in the second direction. Each of the bonding pads in one of the rows at least partially overlaps one of the bonding pads in another one of the rows when viewed in the first direction.

Abstract: A dual-pixel full color complementary metal oxide semiconductor (CMOS) imager is provided, along with an associated fabrication process. Two stand-alone pixels are used for three-color detection. The first pixel is a single photodiode, and the second pixel has two photodiodes built in a stacked structure. The two photodiode stack includes an n doped substrate, a bottom photodiode, and a top photodiode. The bottom photodiode has a bottom p doped layer overlying the substrate and a bottom n doped layer cathode overlying the bottom p doped layer. The top photodiode has a top p doped layer overlying the bottom n doped layer and a top n doped layer cathode overlying the top p doped layer. The single photodiode includes the n doped substrate, a p doped layer overlying the substrate, and an n doped layer cathode overlying the p doped layer.

Abstract: A CMOS image sensor includes a pinned photodiode and a transfer gate that are formed using a thick mask that is self-aligned to at least one edge of the polysilicon gate structure to facilitate both the formation of a deep implant and to provide proper alignment between the photodiode implant and the gate. In one embodiment a drain side implant is formed concurrently with the deep n-type implant of the photodiode. After the deep implant, the mask is removed and a shallow p+ implant is formed to complete the photodiode. In another embodiment, the polysilicon is etched to define only a drain side edge, a shallow drain side implant is performed, and then a thick mask is provided and used to complete the gate structure, and is retained during the subsequent high energy implant. Alternatively, the high energy implant is performed prior to the shallow drain side implant.

Abstract: The object of the invention is to provide a semiconductor device that can form photodiodes that do not short circuit, without damage that causes leakage, despite formation of the opening part, and its manufacturing method. The second semiconductor layer (12, 16) of the second conductivity type is formed on the main surface of the first semiconductor layer (10, 11) of the first conductivity type. Element-separating regions (13, 14, 15, 17) formed at least on the second semiconductor layer separate the device into the regions of plural photodiodes (PD1-PD4). Conductive layer 18 is formed on the second semiconductor layer 16 in a pattern that is divided for each of the photodiodes and is connected to the second semiconductor layer 16 along the outer periphery with respect to all of the plural photodiodes. Insulation layer (19, 21) is formed on the entire surface to cover conductive layer 18.

Abstract: An imager device that has an isolation structure such that pinned photodiode characteristics are maintained without increasing doping levels. The invention provides an isolation structure to maintain pinned photodiode characteristics without increasing doping levels around the photodiode. By creating a substrate region surrounding the charge-collection region of the photodiode, the photodiode may be electrically isolated from the bulk substrate. This region fixes the depletion region so that it does not migrate toward the surface of the substrate or the STI region. By doing so, the region prevents charge from being depleted from the substrate and the accumulation region, reducing dark current.

Abstract: Provided is a solid-state CMOS image sensor, specifically a CMOS image sensor pixel that has stacked photo-sites, high sensitivity, and low dark current. In an image sensor including an array of pixels, each pixel includes: a standard photo-sensing and charge storage region formed in a first region under a surface portion of a substrate and collecting photo-generated carriers; a second charge storage region formed adjacent to the surface portion of the substrate and separated from the standard photo-sensing and charge storage region; and a potential barrier formed between the first region and a second region underneath the first region and diverting the photo-generated carriers from the second region to the second charge storage region.

Abstract: The present invention is a pixel sensor cell and method of making the same. The pixel sensor cell approximately doubles the available signal for a given quanta of light. The device of the present invention utilizes the holes produced by impinging photons in a pixel sensor cell circuit. A pixel sensor cell having reduced complexity includes an n-type collection well region formed beneath a surface of a substrate for collecting electrons generated by electromagnetic radiation impinging on the pixel sensor cell and a p-type collection well region formed beneath the surface of the substrate for collecting holes generated by the impinging photons. A circuit structure having a first input is coupled to the n-type collection well region and a second input is coupled to the p-type collection well region, wherein an output signal of the pixel sensor cell is the magnitude of the difference of a signal of the first input and a signal of the second input.

Abstract: A theme is to prevent the generation of noise due to damage in a photodetecting portion in a mounting process in a photodiode array, a method of manufacturing the same, and a radiation detector. In a photodiode array, wherein a plurality of photodiodes (4) are formed in array form on a surface at a side of an n-type silicon substrate (3) onto which light to be detected is made incident and penetrating wirings (8), which pass through from the incidence surface side to the back surface side, are formed for the photodiodes (4), the photodiode array (1) is arranged with a transparent resin film (6), which covers the formed regions of the photodiodes (4) and transmits the light to be detected, provided at the incidence surface side.

Abstract: A solid-state image sensing device includes a plurality of pixels. Each pixel has a photodiode, a first transistor, and a second transistor. The photodiode is constituted by a first-conductivity-type semiconductor region and a second-conductivity-type semiconductor region. The first and second conductivity types are opposite to each other. The first transistor has a first-conductivity-type drain region formed in the second-conductivity-type semiconductor region to transfer signal charge to the drain region. The second transistor has a source region and a drain region which are formed in the second-conductivity-type semiconductor region and which have the first conductivity type. At least one second-conductivity-type potential barrier is provided under the drain region of the first transistor and the source region and/or the drain region of the second transistor.

Abstract: A lock in pinned photodiode photodetector includes a plurality of output ports which are sequentially enabled. Each time when the output port is enabled is considered to be a different bin of time. A specified pattern is sent, and the output bins are investigated to look for that pattern. The time when the pattern is received indicates the time of flight. A CMOS active pixel image sensor includes a plurality of pinned photodiode photodetectors that use a common output transistor. In one configuration, the charge from two or more pinned photodiodes may be binned together and applied to the gate of an output transistor.