Single Strip Of Sensors (e.g., Linear Imager) Patents (Class 257/234)
  • Patent number: 7786516
    Abstract: A multiple layer tunnel insulator is fabricated between a substrate and a discrete trap layer. The properties of the multiple layers determines the volatility of the memory device. The composition of each layer and/or the quantity of layers is adjusted to fabricate either a DRAM device, a non-volatile memory device, or both simultaneously.
    Type: Grant
    Filed: September 18, 2008
    Date of Patent: August 31, 2010
    Assignee: Micron Technology, Inc.
    Inventor: Arup Bhattacharyya
  • Patent number: 7768040
    Abstract: An imager device is disclosed including a first substrate having an array of photo-sensitive elements formed thereon, a first conductive layer formed above the first substrate, a first conductive member extending through the first substrate, the first conductive member being conductively coupled to the first conductive layer, a standoff structure formed above the first substrate, a second conductive layer formed above the standoff structure, the second conductive layer being conductively coupled to the first conductive layer, and an electrically powered device positioned above the standoff structure, the electrically powered device being electrically coupled to the second conductive layer.
    Type: Grant
    Filed: October 23, 2006
    Date of Patent: August 3, 2010
    Assignee: Micron Technology, Inc.
    Inventor: Warren Farnworth
  • Patent number: 7745834
    Abstract: A semiconductor image sensor includes: a semiconductor imaging element including an imaging area, a peripheral circuit area, and an electrode area; cylindrical electrodes provided on electrode terminals so as to be electrically connected with an external device; and a transparent resin layer provided on the upper surface of the semiconductor imaging element. The upper surface of each cylindrical electrode and the upper surface of the transparent resin layer are substantially of the same height.
    Type: Grant
    Filed: June 21, 2006
    Date of Patent: June 29, 2010
    Assignee: Panasonic Corporation
    Inventors: Masanori Minamio, Toshiyuki Fukuda
  • Patent number: 7741660
    Abstract: An imager device that has an isolation structure such that pinned photodiode characteristics are maintained without increasing doping levels. The invention provides an isolation structure to maintain pinned photodiode characteristics without increasing doping levels around the photodiode. By creating a substrate region surrounding the charge-collection region of the photodiode, the photodiode may be electrically isolated from the bulk substrate. This region fixes the depletion region so that it does not migrate toward the surface of the substrate or the STI region. By doing so, the region prevents charge from being depleted from the substrate and the accumulation region, reducing dark current.
    Type: Grant
    Filed: December 11, 2006
    Date of Patent: June 22, 2010
    Assignee: Micron Technology, Inc.
    Inventor: Chandra Mouli
  • Patent number: 7723766
    Abstract: A solid-state image sensing device includes a plurality of pixels. Each pixel has a photodiode, a first transistor, and a second transistor. The photodiode is constituted by a first-conductivity-type semiconductor region and a second-conductivity-type semiconductor region. The first and second conductivity types are opposite to each other. The first transistor has a first-conductivity-type drain region formed in the second-conductivity-type semiconductor region to transfer signal charge to the drain region. The second transistor has a source region and a drain region which are formed in the second-conductivity-type semiconductor region and which have the first conductivity type. At least one second-conductivity-type potential barrier is provided under the drain region of the first transistor and the source region and/or the drain region of the second transistor.
    Type: Grant
    Filed: March 14, 2008
    Date of Patent: May 25, 2010
    Assignee: Canon Kabushiki Kaisha
    Inventors: Mahito Shinohara, Shunsuke Inoue
  • Patent number: 7709913
    Abstract: An image sensor package includes a substrate, a sensor chip, a frame, a lens element and at least a pair of guide pins. The sensor chip is mounted on the substrate, and has two opposite sides and a sensing region, which has a sensing region central axis. The frame is mounted on the substrate, and has an aperture and an inner space with the sensor chip disposed therein. The lens element is disposed inside the aperture and has a lens central axis. The guide pins locate oppositely inside the inner space of the frame with an interval between the tips of the guide pins substantially identical to the distance between the opposite sides of the sensor chip, wherein the central line of the interval between the tips of the guide pins defines a positioning line, which substantially coincides with the lens central axis; wherein the tip of each guide pin is aligned with one of the opposite sides of the sensor chip such that the positioning line is substantially coincided with the sensing region central axis.
    Type: Grant
    Filed: February 28, 2008
    Date of Patent: May 4, 2010
    Assignee: Advanced Semiconductor Engineering Inc.
    Inventor: Jian Cheng Chen
  • Patent number: 7705381
    Abstract: A solid-state image sensing device includes a plurality of pixels. Each pixel has a photodiode, a first transistor, and a second transistor. The photodiode is constituted by a first-conductivity-type semiconductor region and a second-conductivity-type semiconductor region. The first and second conductivity types are opposite to each other. The first transistor has a first-conductivity-type drain region formed in the second-conductivity-type semiconductor region to transfer signal charge to the drain region. The second transistor has a source region and a drain region which are formed in the second-conductivity-type semiconductor region and which have the first conductivity type. At least one second-conductivity-type potential barrier is provided under the drain region of the first transistor and the source region and/or the drain region of the second transistor.
    Type: Grant
    Filed: June 23, 2008
    Date of Patent: April 27, 2010
    Assignee: Canon Kabushiki Kaisha
    Inventors: Mahito Shinohara, Shunsuke Inoue
  • Patent number: 7671402
    Abstract: A solid-state imaging device includes: a substrate; a photoelectric transducer that is provided within the substrate and generates light-generated charge in accordance with incident light; a floating diffusion that retains the light-generated charge generated from the photoelectric transducer; a transfer and retention unit that is provided between the photoelectric transducer and the floating diffusion for a purpose of controlling a transfer of the light-generated charge and has a charge-retaining region that can retain the light-generated charge generated from the photoelectric transducer; a reset unit that initializes a potential of the floating diffusion; an amplifying transistor that generates an output based on a potential of the floating diffusion; a selection transistor that selectively outputs an output of the amplifying transistor; and an excessive charge-discharging unit that discharges excessive electric charge generated from the photoelectric transducer.
    Type: Grant
    Filed: February 7, 2008
    Date of Patent: March 2, 2010
    Assignee: Seiko Epson Corporation
    Inventor: Kazunobu Kuwazawa
  • Patent number: 7649259
    Abstract: A semiconductor device includes a first wiring line group made of a metal, wiring lines of the first wiring line group being arranged in parallel with each other, a second wiring line group which is made of a semiconductor and crosses the first wiring line group, wiring lines of the second wiring line group being arranged in parallel with each other and being movable in the vicinity of each intersection with the wiring lines of the first wiring line group, and a plurality of metal regions which are formed to be joined with the wiring lines constituting the second wiring line group, and have a work function different from that of the metal forming the first wiring line group.
    Type: Grant
    Filed: December 27, 2005
    Date of Patent: January 19, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Mizuki Ono, Yuichi Motoi
  • Patent number: 7612425
    Abstract: An image sensor includes: a light source that irradiates a light on an object; a lens body that converges a reflection of the light from the object; a plurality of IC chips that receive the reflection passed through the lens body; and a transparent member provided between the IC chips and the lens body. The transparent member includes a refractive index changing region provided at a portion opposite to a gap between adjacent IC chips. A refractive index in the refractive index changing region increases continuously or stepwise toward an inner portion of the transparent member from a surface of the transparent member on an IC chips side so that the refractive index changing region refracts a part of the reflection to be incident into the gap to the IC chips.
    Type: Grant
    Filed: October 17, 2006
    Date of Patent: November 3, 2009
    Assignee: Mitsubishi Electric Corporation
    Inventors: Takafumi Endo, Yohei Nokami
  • Patent number: 7605411
    Abstract: An HCCD includes a channel 21 that transfers electric charges in an X direction, a channel 25 that transfers the electric charges in a Z1 direction, a channel 23 that transfers the electric charges in a Z2 direction, and a channel 22 that connects the channels 23, 25 to the channel 21. The following relation is satisfied in impurity concentration of the channels: channel 21 channel 22 channel 23, 25. A fixed DC voltage is applied to branch electrodes 12a, 12b above the channel 22. The channel 22 has protrusion portions 19 that protrude inward from an outer circumference, which connects T1 and T2, and an outer circumference, which connects T3 and T4. The protrusion portions 19 causes charges below the transfer electrode 11b to move near the center of the channel 22 in a Y direction. Thereby, the travel distance of the charges in the channel 22 is reduced.
    Type: Grant
    Filed: July 17, 2008
    Date of Patent: October 20, 2009
    Assignee: Fujifilm Corporation
    Inventors: Hirokazu Shiraki, Makoto Kobayashi, Katsumi Ikeda
  • Patent number: 7576401
    Abstract: An optical module includes an image sensor having an active area and a window mounted directly to the image sensor above the active area. The optical module further includes a mount mounted to the window, the mount supporting a barrel having a lens assembly. By mounting the window directly to the image sensor and the mount directly to the window, the substrate surface area of the optical module is minimized.
    Type: Grant
    Filed: July 7, 2005
    Date of Patent: August 18, 2009
    Assignee: Amkor Technology, Inc.
    Inventors: Arsenio de Guzman, Robert F. Darveaux, Young Ho Kim
  • Patent number: 7535038
    Abstract: A solid-state image pickup device for preventing crosstalk between adjacent pixels by providing an overflow barrier at the deep potion of a substrate. A partial P type region is provided at the predetermined position of a lower layer region of the vertical transfer register and a channel stop region. This P type region adjusts potential in the lower layer region of the vertical transfer register and the channel stop region. Accordingly, since the potential in the lower layer region of the vertical transfer register and the channel stop region at both sides of the lower layer region is low, electric charges photoelectrically-converted by the sensor region are blocked by this potential barrier and cannot be diffused easily.
    Type: Grant
    Filed: August 11, 2003
    Date of Patent: May 19, 2009
    Assignee: Sony Corporation
    Inventors: Kazushi Wada, Kouichi Harada, Shuji Otsuka, Mitsuru Sato
  • Patent number: 7468532
    Abstract: An imaging device having a pixel array in which one plate of a storage capacitor is coupled to a storage node while another plate is formed by an electrode of a photo-conversion region.
    Type: Grant
    Filed: July 12, 2005
    Date of Patent: December 23, 2008
    Assignee: Aptina Imaging Corporation
    Inventor: Jeffrey A. McKee
  • Patent number: 7459732
    Abstract: A gas-sensitive field-effect transistor may be formed from a substrate with a gas-sensitive layer and a transistor processed separately and then assembled. The substrate may be patterned to form spacers by which the height of an air gap between the transistor and the sensitive layer may be adjustable to a relatively precise degree. Formation of the spacers can be achieved by patterning the substrate using material-removal techniques. The height of the spacers may be adjusted in the layer thickness of the gas-sensitive layer and for the transistor fabricated using a CMOS process. Suitable techniques for producing recesses between the spacers include, for example, polishing, cutting, sandblasting, lithographic dry etching, or wet-chemical etching. Suitable materials for the substrate may include, for example, glass, ceramic, aluminum oxide, silicon, or a dimensionally stable polymer.
    Type: Grant
    Filed: March 31, 2006
    Date of Patent: December 2, 2008
    Assignee: Micronas GmbH
    Inventors: Maximilian Fleischer, Uwe Lampe, Hans Meixner, Roland Pohle, Ralf Schneider, Elfriede Simon
  • Patent number: 7456443
    Abstract: High electron mobility transistors are provided that include a non-uniform aluminum concentration AlGaN based cap layer having a high aluminum concentration adjacent a surface of the cap layer that is remote from the barrier layer on which the cap layer is provided. High electron mobility transistors are provided that include a cap layer having a doped region adjacent a surface of the cap layer that is remote from the barrier layer on which the cap layer is provided. Graphitic BN passivation structures for wide bandgap semiconductor devices are provided. SiC passivation structures for Group III-nitride semiconductor devices are provided. Oxygen anneals of passivation structures are also provided. Ohmic contacts without a recess are also provided.
    Type: Grant
    Filed: November 23, 2004
    Date of Patent: November 25, 2008
    Assignee: Cree, Inc.
    Inventors: Adam William Saxler, Scott Sheppard, Richard Peter Smith
  • Patent number: 7456449
    Abstract: A semiconductor apparatus has a substrate to which is attached a thin semiconductor film including at least one semiconductor device. An interconnecting line links the semiconductor film with electrical circuitry on the substrate. The interconnecting line includes a pad located on the substrate, between the thin semiconductor film and the electrical circuitry. The pad, which is wider than other parts of the interconnecting line, can be used as a probe pad for testing the apparatus, and in particular for testing the electrical circuitry on the substrate before the thin semiconductor film is attached.
    Type: Grant
    Filed: November 30, 2004
    Date of Patent: November 25, 2008
    Assignee: Oki Data Corporation
    Inventors: Hiroyuki Fujiwara, Takahito Suzuki, Susumu Chihara, Mitsuhiko Ogihara, Ichimatsu Abiko, Masaaki Sakuta
  • Patent number: 7456892
    Abstract: Disclosed is a horizontal transfer line in which first horizontal transfer pulses are applied to transfer electrodes via a commonly connected electrode line, second horizontal transfer pulses are applied to transfer electrodes via a commonly connected electrode line, and final horizontal transfer pulses are applied to a final transfer electrode via an electrode line independent of the above-mentioned electrode lines. Since the independent electrode line is independent of the other electrode lines, amount of capacitance produced in equivalent terms is reduced. The final transfer pulses exhibit a steep characteristic, thereby improving transfer efficiency. The input/output characteristic of the horizontal transfer line is improved as a result.
    Type: Grant
    Filed: April 12, 2004
    Date of Patent: November 25, 2008
    Assignee: Fujifilm Corporation
    Inventor: Naoki Kubo
  • Publication number: 20080239116
    Abstract: A method and apparatus for correcting linear shift parallax error in multi-array image systems. Average pixel cell signal values for pixel cells within a summing window of each column or row of at least two sub-arrays are computed during read-out. The images of the sub-arrays are correlated based on the averages, then shifted based on a result of the correlation function to correct the exhibited parallax error. The summation, correlation, and shifting can be performed by a pixel pipeline processing circuit.
    Type: Application
    Filed: March 27, 2007
    Publication date: October 2, 2008
    Inventor: Scott Smith
  • Patent number: 7423305
    Abstract: A solid-state image sensing device includes a plurality of pixels. Each pixel has a photodiode, a first transistor, and a second transistor. The photodiode is constituted by a first-conductivity-type semiconductor region and a second-conductivity-type semiconductor region. The first and second conductivity types are opposite to each other. The first transistor has a first-conductivity-type drain region formed in the second-conductivity-type semiconductor region to transfer signal charge to the drain region. The second transistor has a source region and a drain region which are formed in the second-conductivity-type semiconductor region and which have the first conductivity type. At least one second-conductivity-type potential barrier is provided under the drain region of the first transistor and the source region and/or the drain region of the second transistor.
    Type: Grant
    Filed: December 27, 2005
    Date of Patent: September 9, 2008
    Assignee: Canon Kabushiki Kaisha
    Inventors: Mahito Shinohara, Shunsuke Inoue
  • Patent number: 7417272
    Abstract: Embodiments of the invention provide an image sensor having an improved dynamic range. A pixel cell comprises at least one transistor structure. The transistor structure comprises at least one semiconductor channel region, at least one gate for controlling the channel region, and first and second leads respectively coupled to a source region on one side of the at least one channel region and a drain region on an opposite side of the at least one channel region. The transistor structure has at least two threshold voltages associated with the at least one channel region, and an I-V characteristic of the transistor structure is determined at least in part by the threshold voltages.
    Type: Grant
    Filed: October 20, 2006
    Date of Patent: August 26, 2008
    Assignee: Micron Technology, Inc.
    Inventor: Chandra Mouli
  • Patent number: 7414276
    Abstract: A solid-state image pickup device includes a semiconductor substrate, a photosensitive pixel which converts incident light on the semiconductor substrate into a signal charge, and a charge detection section which converts the converted signal charge into an output signal. The device further includes a charge transfer section which is disposed between the photosensitive pixel and the charge detection section and which temporarily stores the signal charge and which transfers the stored signal charge to the charge detection section by application of sequential pulses.
    Type: Grant
    Filed: July 30, 2004
    Date of Patent: August 19, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Makoto Monoi
  • Patent number: 7402849
    Abstract: A microfabricated probe array for nanolithography and process for designing and fabricating the probe array. The probe array consists of individual probes that can be moved independently using thermal bimetallic actuation or electrostatic actuation methods. The probe array can be used to produce traces of diffusively transferred chemicals on the substrate with sub-1 micrometer resolution, and can function as an arrayed scanning probe microscope for subsequent reading and variation of transferred patterns.
    Type: Grant
    Filed: March 7, 2005
    Date of Patent: July 22, 2008
    Assignee: The Board of Trustees of the University of Illinois
    Inventors: Chang Liu, Ming Zhang, David Andrew Bullen
  • Patent number: 7382009
    Abstract: To provide an amplification type solid state image pickup device enabling lower noise, higher gain, and higher sensitivity than any conventional amplification type solid state image pickup device.
    Type: Grant
    Filed: July 29, 2004
    Date of Patent: June 3, 2008
    Assignee: Canon Kabushiki Kaisha
    Inventor: Mahito Shinohara
  • Patent number: 7352028
    Abstract: A solid-state imaging device includes: a substrate; a photoelectric transducer that is provided within the substrate and generates light-generated charge in accordance with incident light; a floating diffusion that retains the light-generated charge generated from the photoelectric transducer; a transfer and retention unit that is provided between the photoelectric transducer and the floating diffusion for a purpose of controlling a transfer of the light-generated charge and has a charge-retaining region that can retain the light-generated charge generated from the photoelectric transducer; a reset unit that initializes a potential of the floating diffusion; an amplifying transistor that generates an output based on a potential of the floating diffusion; a selection transistor that selectively outputs an output of the amplifying transistor; and an excessive charge-discharging unit that discharges excessive electric charge generated from the photoelectric transducer.
    Type: Grant
    Filed: September 19, 2005
    Date of Patent: April 1, 2008
    Assignee: Seiko Epson Corporation
    Inventor: Kazunobu Kuwazawa
  • Patent number: 7352020
    Abstract: The present invention aims to provide a solid-state imaging apparatus that realizes less leakage current, high image quality and low noise during the driving operation, and manufacturing method for the same. A MOS type imaging apparatus 1 includes an imaging region 10 and a driving region 20 both formed on a p-type silicon substrate (hereinafter called an “Si substrate”) 31. The imaging region 10 includes six pixels 11 to 16 disposed in a shape of a matrix having 2 rows and 3 columns. The driving region 20 includes a timing generation circuit 21, a vertical shift resistor 22, a horizontal shift resistor 23, a pixel selection circuit 24, and so on. All transistors included in the pixels 11 to 16 in the imaging region and the circuits 21 to 24 in the driving circuit region 20 are of n-channel MOS type.
    Type: Grant
    Filed: September 12, 2002
    Date of Patent: April 1, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Takumi Yamaguchi
  • Patent number: 7327000
    Abstract: In a method of making graphite devices, a preselected crystal face of a crystal is annealed to create a thin-film graphitic layer disposed against selected face. A preselected pattern is generated on the thin-film graphitic layer. A functional structure includes a crystalline substrate having a preselected crystal face. A thin-film graphitic layer is disposed on the preselected crystal face. The thin-film graphitic layer is patterned so as to define at least one functional structure.
    Type: Grant
    Filed: December 14, 2005
    Date of Patent: February 5, 2008
    Assignee: Georgia Tech Research Corp.
    Inventors: Walt A. DeHeer, Claire Berger, Phillip N. First
  • Patent number: 7294897
    Abstract: Microelectronic imagers, methods for packaging microelectronic imagers, and methods for forming electrically conductive through-wafer interconnects in microelectronic imagers are disclosed herein. In one embodiment, a microelectronic imaging die can include a microelectronic substrate, an integrated circuit, and an image sensor electrically coupled to the integrated circuit. A bond-pad is carried by the substrate and electrically coupled to the integrated circuit. An electrically conductive through-wafer interconnect extends through the substrate and is in contact with the bond-pad. The interconnect can include a passage extending completely through the substrate and the bond-pad, a dielectric liner deposited into the passage and in contact with the substrate, first and second conductive layers deposited onto at least a portion of the dielectric liner, and a conductive fill material deposited into the passage over at least a portion of the second conductive layer and electrically coupled to the bond-pad.
    Type: Grant
    Filed: June 29, 2004
    Date of Patent: November 13, 2007
    Assignee: Micron Technology, Inc.
    Inventors: Salman Akram, Charles M. Watkins, Kyle K. Kirby, Alan G. Wood, William M. Hiatt
  • Patent number: 7276749
    Abstract: A microcrystalline germanium image sensor array. The array includes a number of pixel circuits fabricated in or on a substrate. Each pixel circuit comprises a charge collecting electrode for collecting electrical charges and a readout means for reading out the charges collected by the charge collecting electrode. A photodiode layer of charge generating material located above the pixel circuits convert electromagnetic radiation into electrical charges. This photodiode layer includes microcrystalline germanium and defines at least an n-layer, and i-layer and a p-layer. The sensor array also includes and a surface electrode in the form of a grid or thin transparent layer located above the layer of charge generating material. The sensor is especially useful for imaging in visible and near infrared spectral regions of the electromagnetic spectrum and provides imaging with starlight illumination.
    Type: Grant
    Filed: February 24, 2006
    Date of Patent: October 2, 2007
    Assignee: e-Phocus, Inc.
    Inventors: Peter Martin, Michael G. Engelman, Calvin Chao, Teu Chiang Hsieh, Milan Pender
  • Patent number: 7253458
    Abstract: A complementary metal oxide semiconductor field effect transistor (CMOS-FET) image sensor. An active photosensing pixel is formed on a substrate. At least one side of the pixel has a width equal to or less than approximately 3 ?m. At least one dielectric layer is disposed on the substrate covering the pixel. A color filter is disposed on the least one dielectric layer. A microlens array is disposed on the color filter of the pixel, and the sum of the thickness of all dielectric layers and the color filter divided by the pixel width is equal to or less than approximately 1.87.
    Type: Grant
    Filed: November 4, 2004
    Date of Patent: August 7, 2007
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Tzu-Hsuan Hsu, Dun-Nian Yaung, Wen-De Wang, Ho-Ching Chien, Shou-Gwo Wuu
  • Patent number: 7238977
    Abstract: A pixel cell has controlled photosensor anti-blooming leakage by having dual pinned voltage regions, one of which is used to set the anti-blooming characteristics of the photosensor. Additional exemplary embodiments also employ an anti-blooming transistor in conjunction with the dual pinned photosensor. Other exemplary embodiments provide a pixel with two pinned voltage regions and two anti-blooming transistors. Methods of fabricating the exemplary pixel cells are also disclosed.
    Type: Grant
    Filed: August 19, 2004
    Date of Patent: July 3, 2007
    Assignee: Micron Technology, Inc.
    Inventors: Sungkwon C. Hong, Alex Krymski
  • Patent number: 7230288
    Abstract: A solid-state image pickup device includes: a plurality of light receiving portions arranged in a matrix, and a vertical transfer register which is four-phase driven by first, second, third and fourth transfer electrodes of a three-layer structure. The vertical transfer register is provided for each of columns of the light receiving portions. The first and third transfer electrodes of the first layer are alternately arranged in a charge transfer direction, and the adjacent two of the first and third transfer electrodes extend in parallel to each other between the light receiving portions. With this solid-state image pickup device, the accumulated charge capacity of each transfer region composed of the adjacent transfer electrodes for two-phases is equalized and the area of the light receiving portion is increased irrespective of variations in processed dimension between the transfer electrodes.
    Type: Grant
    Filed: August 7, 2006
    Date of Patent: June 12, 2007
    Assignee: Sony Corporation
    Inventors: Junji Yamane, Kunihiko Hikichi
  • Patent number: 7199410
    Abstract: An active pixel is described comprising a semiconductor substrate and a radiation sensitive source of carriers in the substrate, such as for instance, a photodiode. A non-carrier storing, carrier collecting region in the substrate is provided for attracting carriers from the source as they are generated. At least one doped or inverted region of a first conductivity is provided in or on the substrate for storing the carriers before read-out. At least one non-carrier storing, planar current flow, carrier transport pathway is provided from or through the carrier collecting region to the at least one doped or inverted region to transfer the carriers without intermediate storage to the read-out electronics.
    Type: Grant
    Filed: December 13, 2000
    Date of Patent: April 3, 2007
    Assignee: Cypress Semiconductor Corporation (Belgium) BVBA
    Inventor: Bart Dierickx
  • Patent number: 7141841
    Abstract: Embodiments of the invention provide an image sensor having an improved dynamic range. A pixel cell comprises at least one transistor structure. The transistor structure comprises at least one semiconductor channel region, at least one gate for controlling the channel region, and first and second leads respectively coupled to a source region on one side of the at least one channel region and a drain region on an opposite side of the at least one channel region. The transistor structure has at least two threshold voltages associated with the at least one channel region, and an I-V characteristic of the transistor structure is determined at least in part by the threshold voltages.
    Type: Grant
    Filed: July 3, 2003
    Date of Patent: November 28, 2006
    Assignee: Micron Technology, Inc.
    Inventor: Chandra Mouli
  • Patent number: 7129531
    Abstract: A programmable resistance memory element comprising an adhesion layer between the programmable resistance material and at least one of the electrodes. Preferably, the adhesion layer is a titanium rich titanium nitride composition.
    Type: Grant
    Filed: May 21, 2003
    Date of Patent: October 31, 2006
    Assignee: Ovonyx, Inc.
    Inventors: Jeffrey P. Fournier, Sergey A. Kostylev
  • Patent number: 7091532
    Abstract: An image sensor includes a substrate containing photosensitive areas; an insulator spanning the substrate; and a first and second layer of a multi-layer metalization structure wherein the first layer forms the light shield regions over portions of the photosensitive area as well as forming circuit interconnections and barrier regions to prevent spiking into the substrate or gates at contacts in the non-imaging area, and the second layer spanning the interconnections and barrier regions of the first layer only over the non-imaging area.
    Type: Grant
    Filed: January 25, 2005
    Date of Patent: August 15, 2006
    Assignee: Eastman Kodak Company
    Inventor: Eric G. Stevens
  • Patent number: 7061030
    Abstract: A semiconductor device includes a transfer channel for transferring charge generated by photoelectric conversion, an insulating film formed on the transfer channel, and a transfer electrode for applying a transfer voltage to the transfer channel via the insulating film. The insulating film has the first thickness and a second thickness that is thinner than the first thickness. The insulating film has the first thickness below both ends of the transfer electrode in a width direction of the transfer channel that is orthogonal to a charge transfer direction through the transfer channel, and the insulating film has the second thickness on a part including a center of the transfer channel in the width direction.
    Type: Grant
    Filed: September 1, 2004
    Date of Patent: June 13, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Hiroshi Tanaka
  • Patent number: 7057220
    Abstract: The invention provides an imager having a p-n-p photodiode with an ultrashallow junction depth. A p+ junction layer of the photodiode is doped with indium to decrease transient enhanced diffusion effects, minimize fixed pattern noise and fill factor loss.
    Type: Grant
    Filed: October 9, 2003
    Date of Patent: June 6, 2006
    Assignee: Micron Technology, Inc.
    Inventor: Chandra Mouli
  • Patent number: 7026690
    Abstract: The invention includes BIFETRAM devices. Such devices comprise a bipolar transistor in combination with a field effect transistor (FET) in a three-dimensional stacked configuration. The memory devices can be incorporated within semiconductor-on-insulator (SOI) constructions. The base region of the bipolar device can be physically and electrically connected to one of the source/drain regions of the FET to act as a storage node for the memory cell. The semiconductor material of the SOI constructions can comprise Si/Ge, and the active region of the FET can extend into the Si/Ge. The SOI constructions can be formed over any of a number of substrates, including, for example, semiconductive materials, glass, aluminum oxide, silicon dioxide, metals and/or plastics.
    Type: Grant
    Filed: February 12, 2003
    Date of Patent: April 11, 2006
    Assignee: Micron Technology, Inc.
    Inventor: Arup Bhattacharyya
  • Patent number: 6998657
    Abstract: More complete charge transfer is achieved in a CMOS or CCD imager by reducing the spacing in the gaps between gates in each pixel cell, and/or by providing a lightly doped region between adjacent gates in each pixel cell, and particularly at least between the charge collecting gate and the gate downstream to the charge collecting gate. To reduce the gaps between gates, an insulator cap with spacers on its sidewalls is formed for each gate over a conductive layer. The gates are then etched from the conductive layer using the insulator caps and spacers as hard masks, enabling the gates to be formed significantly closer together than previously possible, which, in turn increases charge transfer efficiency. By providing a lightly doped region on between adjacent gates, a more complete charge transfer is effected from the charge collecting gate.
    Type: Grant
    Filed: October 21, 2003
    Date of Patent: February 14, 2006
    Assignee: Micron Technology, Inc.
    Inventor: Howard E. Rhodes
  • Patent number: 6982443
    Abstract: A plurality of apertures is formed in at least one first insulating layer disposed over a sensor formed in a semiconductor substrate. A second insulating layer is disposed over the at least one first insulating layer and the plurality of apertures in the at least one first insulating layer. The apertures form hollow regions in the at least one first insulating layer over the sensor, allowing more light or energy to pass through the at least one first insulating layer to the sensor, and increasing the sensitivity of the sensor.
    Type: Grant
    Filed: March 12, 2004
    Date of Patent: January 3, 2006
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tzu-Hsuan Hsu, Shou-Gwo Wuu, Ho-Ching Chien, Dun-Nian Yaung
  • Patent number: 6974973
    Abstract: An imager temperature sensor and a current correction apparatus are provided which use dark pixel measurements from an imager chip during operation together with a fabrication process constant as well as a chip dependent constant to calculate chip temperature. The chip temperature may be used to generate a current correction signal. The correction signal is used to tune a current on the imager chip to correct for temperature variations.
    Type: Grant
    Filed: November 8, 2002
    Date of Patent: December 13, 2005
    Assignee: Micron Technology, Inc.
    Inventors: Giuseppe Rossi, Gennadiy A. Agranov
  • Patent number: 6956253
    Abstract: A color filter includes a substrate having a plurality of scribe lines arranged to form at least one filter region surrounded by the scribe lines. The scribe lines are at least partially filled with a resist material. At least one color resist layer is formed above the substrate within the at least one filter region.
    Type: Grant
    Filed: June 6, 2003
    Date of Patent: October 18, 2005
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Fu-Tien Weng, Yu-Kung Hsiao, Hung-Jen Hsu, Yi-Ming Dai, Chin-Chen Kuo, Te-Fu Tseng
  • Patent number: 6946717
    Abstract: A compound semiconductor device is comprising a compound semiconductor substrate (219) having a ground plane (205); an active element (201) disposed on the substrate; a passive element (211) disposed on the substrate and electrically coupled to the active element; and an insulating layer (202) adjacent the substrate and interposed between the passive device and ground surface such that there is no resistive ground path from the passive device to the ground surface.
    Type: Grant
    Filed: January 30, 2002
    Date of Patent: September 20, 2005
    Assignee: M/A-Com, Inc.
    Inventors: David Russell Hoag, Timothy Edward Boles, Daniel G. Curcio
  • Patent number: 6900484
    Abstract: A pinned photodiode with a surface layer of a first conductivity type laterally displaced from an electrically active area of a gate structure and a charge collection region of a second conductivity type formed by an angled implant is disclosed. The angle of the charge collection region implant may be tailored so that the charge collection region contacts an adjacent edge of the transfer gate of the pixel sensor cell and minimizes, therefore, the gate overlap region and an undesirable barrier potential.
    Type: Grant
    Filed: July 30, 2003
    Date of Patent: May 31, 2005
    Assignee: Micron Technology, Inc.
    Inventor: Howard E. Rhodes
  • Patent number: 6885047
    Abstract: A solid-state image sensing device includes a plurality of pixels. Each pixel has a photodiode, a first transistor, and a second transistor. The photodiode is constituted by a first-conductivity-type semiconductor region and a second-conductivity-type semiconductor region. The first and second conductivity types are opposite to each other. The first transistor has a first-conductivity-type drain region formed in the second-conductivity-type semiconductor region to transfer signal charge to the drain region. The second transistor has a source region and a drain region which are formed in the second-conductivity-type semiconductor region and which have the first conductivity type. At least one second-conductivity-type potential barrier is provided under the drain region of the first transistor and the source region and/or the drain region of the second transistor.
    Type: Grant
    Filed: June 18, 2003
    Date of Patent: April 26, 2005
    Assignee: Canon Kabushiki Kaisha
    Inventors: Mahito Shinohara, Shunsuke Inoue
  • Patent number: 6864555
    Abstract: This invention discloses the several means by which transient noise due to capacitance related displacement current can be excluded from the optical signal coming from a silicon detector used in opto-couplers. The exclusion of such noise permits a high degree of detector sensitivity which permits the use of low efficiency silicon based LEDs for opto-coupler applications.
    Type: Grant
    Filed: August 28, 2002
    Date of Patent: March 8, 2005
    Inventor: Eugene Robert Worley
  • Patent number: 6858457
    Abstract: Provided is a method of manufacturing an acceleration sensor capable of preventing bonding of a movable electrode and a fixed electrode. A stain film 8 for reducing bonding adsorption force is formed on side surfaces of a movable electrode 1, fixed electrodes 2a and 2b and a frame portion 7. In the case in which the movable electrode 1 and the fixed electrodes 2a and 2b are to be formed of a silicon substrate, it is preferable that an insulating film having irregular bonding of silicon atoms and oxygen atoms and irregular bonding of silicon atoms and nitrogen atoms should be employed for the stain film 8, for example. The formation of the stain film 8 can suppress the bonding between the movable electrode 1 and the fixed electrodes 2a and 2b even if Coulomb force is generated between both electrodes when the silicon substrate and a back side substrate 4 are joined by using an anode junction method.
    Type: Grant
    Filed: December 3, 2002
    Date of Patent: February 22, 2005
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Yasuo Yamaguchi, Teruya Fukaura, Kunihiro Nakamura
  • Patent number: 6855968
    Abstract: A photon detector capable of detecting gigahertz frequency optical signals utilizes a layer of photonic material that is formed below of the coil of an inductor. When a pulsed light source is applied to the layer of photonic material, the photonic material generates eddy currents that alter the magnetic flux of the inductor. The signals can then be detected by detecting the change in magnetic flux of the inductor.
    Type: Grant
    Filed: January 30, 2003
    Date of Patent: February 15, 2005
    Assignee: National Semiconductor Corporation
    Inventors: Peter J. Hopper, Philipp Lindorfer, Vladislav Vashchenko
  • Patent number: 6806519
    Abstract: The present invention discloses a surface mountable device comprising a current-sensitive element and two electrodes. The current-sensitive element is composed of a PTC conductive composite, comprising at least one polymer and a conductive filler. The feature of the present invention is that the current-sensitive element is a three-dimensional bent structure so that the shape, length and height of the device can be varied according to the space of the circuit board and the resistance of the surface mountable device. Therefore, the mountable surface of the circuit board can be used more efficiently. Moreover, the area of the current-sensitive element of the present invention is larger than that of the conventional surface mountable device. Consequently, the normal resistance of the surface mountable device of the present invention is smaller than that of the conventional surface mountable device and the voltage endurance of the surface mountable device of the present invention is increased.
    Type: Grant
    Filed: October 7, 2002
    Date of Patent: October 19, 2004
    Assignee: Polytronics Technology Corporation
    Inventors: Edward Fu-Hua Chu, David Shau-Chew Wang, Yun-Ching Ma