Abstract: A semiconductor device structure includes a memory element disposed within an interlayer dielectric (ILD) layer. A contact is disposed within the ILD in contact with the memory element and includes a first metal. A logic element is disposed within the ILD and comprises a second metal that is different than the first metal. A method of forming the semiconductor structure includes forming at least one memory element within an interlayer dielectric (ILD) layer. A contact that includes a first metal is formed in contact with the memory element. At least one logic element is formed in the ILD layer, where the logic element includes a second metal that is different than the first metal.

Abstract: An apparatus is provided which comprises: a first stack comprising a magnetic insulating material (MI such as, EuS, EuO, YIG, TmIG, or GaMnAs) and a transition metal dichalcogenide (TMD such as MoS2, MoSe2, WS2, WSe2, PtS2, PtSe2, WTe2, MoTe2, or graphene; a second stack comprising an MI material and a TMD, wherein the first and second stacks are separated by an insulating material (e.g., oxide); a magnet (e.g., a ferromagnet or a paramagnet) adjacent to the TMDs of the first and second stacks, and also adjacent to the insulating material; and a magnetoelectric material (e.g., (LaBi)FeO3, LuFeO3, PMN-PT, PZT, AlN, or (SmBi)FeO3) adjacent to the magnet.

Abstract: Embodiments of the invention are directed to a sensor that includes a sensing circuit and a probe communicatively coupled to the sensing circuit. The probe includes a three-dimensional (3D) sensing surface coated with a recognition element and configured to, based at least in part on the 3D sensing surface interacting with a predetermined material, generate a first measurement. In some embodiments, the 3D sensing surface is shaped as a pyramid, a cone, or a cylinder to increase the sensing surface area over a two-dimensional (2D) sensing surface. In some embodiments, the 3D sensing surface facilitates penetration of the 3D sensing surface through the wall of the biological cell.

Abstract: Pillar stacks of a top electrode and a hard mask portion are formed over a layer stack containing a continuous reference magnetization layer, a continuous nonmagnetic tunnel barrier layer, and a continuous free magnetization layer. A continuous dielectric liner may be deposited and anisotropically etched to form inner dielectric spacers. The continuous free magnetization layer, the continuous nonmagnetic tunnel barrier layer, and the continuous reference magnetization layer may be anisotropically etched to form vertical stacks of a respective reference magnetization layer, a respective nonmagnetic tunnel barrier layer, and a respective free magnetization layer, which are magnetic tunnel junctions. The inner dielectric spacers prevent redeposition of a metallic material of the hard mask portions on sidewalls of the magnetic tunnel junctions. The hard mask portions may be removed, and a metallic cell contact structures may be formed on top of each top electrode.

Abstract: Among others, the present invention provides piezo-electric micro-devices for detecting at the microscopic level an electric, magnetic, electromagnetic, thermal, optical, acoustical, biological, chemical, physical, bio-chemical, bio-physical, physical-chemical, bio-physical-chemical, bio-mechanical, bio-electro-mechanical, electro-mechanical, or mechanical property of the biologic subject.

Abstract: A semiconductor device and method of making same are disclosed. In some embodiments, a method includes: forming a first thermoelectric conduction leg on a substrate; forming a second thermoelectric conduction leg on the substrate to be aligned with the first thermoelectric conduction leg along a same row; forming at least one intermediate thermoelectric conduction structure on an end of the second thermoelectric conduction leg; forming a contact structure to couple the first and second thermoelectric conduction legs via the at least one intermediate thermoelectric conduction structure; and recessing the substrate to form at least one trench substantially adjacent to a respective side edge of either the first thermoelectric conduction leg or the second thermoelectric conduction leg.

Abstract: A method of forming a method of forming a semiconductor device includes providing a semiconductor structure, etching back each gate structure of a plurality of gate structures to form an opening, forming a barrier layer over the dielectric layer, forming a sacrificial layer over the barrier layer, planarizing the sacrificial layer till a surface of the sacrificial layer is substantially flat, and using a gas cluster ion beam (GCIB) process to planarize the sacrificial layer and the barrier layer, and to remove the sacrificial layer and to provide a planarized barrier layer. The semiconductor structure includes a semiconductor substrate, a fin, the plurality of gate structures, and a dielectric layer over the semiconductor substrate between adjacent gate structures. A top of the dielectric layer is coplanar with a top of each of the plurality of gate structures.

Abstract: The invention relates to a method and device for detecting the presence of specific molecules, comprising, one on top of the other, a first substrate layer, a second reflective layer and a third dielectric layer. The invention is characterized by an antenna array with conductive parts, repeating in one direction, the network forming a plasmonic resonator that can be brought into contact with the molecules and arranged so as to emit at least one thermal radiation peak corresponding to at least one natural mode of thermal vibration of the specific molecules.

Abstract: A memory array is provided that includes a first memory level having a plurality of memory cells each including a corresponding magnetic memory element coupled in series with a corresponding selector element, and a plurality of vias, each of the vias coupled in series with a corresponding one of the memory cells.

Abstract: A circuit selector of embedded magnetoresistive random access memory (EMRAM) includes a transistor comprising a source/drain terminal coupled to a first magnetic tunneling junction (MTJ) and a second MTJ, a gate terminal, and a drain/source terminal coupled to a voltage source. Preferably, the first MTJ includes a first free layer, a first barrier layer, and a first pinned layer, in which the first free layer is coupled to the source/drain terminal and the first pinned layer is coupled to a first circuit. The second MTJ includes a second free layer, a second barrier layer, and a second pinned layer, in which the second pinned layer is coupled to the source/drain terminal and the second free layer is coupled to a second circuit.

Abstract: A method of forming a monolithic integrated PMUT and CMOS with a coplanar elastic, sealing, and passivation layer in a single step without bonding and the resulting device are provided. Embodiments include providing a CMOS wafer with a metal layer; forming a dielectric over the CMOS; forming a sacrificial structure in a portion of the dielectric; forming a bottom electrode; forming a piezoelectric layer over the CMOS; forming a top electrode over portions of the bottom electrode and piezoelectric layer; forming a via through the top electrode down to the bottom electrode and a second via down to the metal layer through the top electrode; forming a second metal layer over and along sidewalls of the first and second via; removing the sacrificial structure, an open cavity formed; and forming a dielectric layer over a portion of the CMOS, the open cavity sealed and an elastic layer and passivation formed.

Abstract: A nonvolatile magnetic memory device having a magnetoresistance-effect element includes: (A) a laminated structure having a recording layer in which an axis of easy magnetization is oriented in a perpendicular direction; (B) a first wiring line electrically connected to a lower part of the laminated structure; and (C) a second wiring line electrically connected to an upper part of the laminated structure, wherein a high Young's modulus region having a Young's modulus of a higher value than that of a Young's modulus of a material forming the recording layer is provided close to a side surface of the laminated structure.

Abstract: A pressure sensor designed to detect a value of ambient pressure of the environment external to the pressure sensor includes: a first substrate having a buried cavity and a membrane suspended over the buried cavity; a second substrate having a recess, hermetically coupled to the first substrate so that the recess defines a sealed cavity the internal pressure value of which provides a pressure-reference value; and a channel formed at least in part in the first substrate and configured to arrange the buried cavity in communication with the environment external to the pressure sensor. The membrane undergoes deflection as a function of a difference of pressure between the pressure-reference value in the sealed cavity and the ambient-pressure value in the buried cavity.

Abstract: A bulk acoustic wave MEMS resonator device includes at least one functionalization (e.g., specific binding or non-specific binding) material arranged over a top side electrode, with at least one patterned enhanced surface area element arranged between a lower surface of the top side electrode and the functionalization material. The at least one patterned enhanced surface area element increases non-planarity of the at least one functionalization material, thereby providing a three-dimensional structure configured to increase sensor surface area and reduce analyte diffusion distance, and may also promote fluid mixing. Methods for biological and chemical sensing, and methods for forming MEMS resonator devices and fluidic devices are further disclosed.

Abstract: A magnesium zinc oxide (MZO) nanostructure modified quartz crystal microbalance (MZOnano-QCM) takes advantage of the unique sensing ability and biocompatibility of MZO-based nanostructures, and combines them with the dynamic impedance spectrum capability of the bulk acoustic wave (BAW) devices including QCM, to form a real-time, noninvasive and label-free cell monitoring biosensor, specifically detecting the susceptibility and resistance of bacterial and fungal strains and cancer cells to various antibiotic and antifungal drugs and anticancer drugs, respectively.

Abstract: A semiconductor device is provided. The semiconductor device includes a field insulating film on a substrate, a first fin type pattern which is formed on the substrate and protrudes upward from an upper surface of the field insulating film, and a gate electrode which intersects with the first fin type pattern on the field insulating film and includes a first portion and a second portion, the first portion being located on one side of the first fin type pattern and including a first terminal end of the gate electrode, and the second portion being located on the other side of the first fin type pattern, wherein a height from the substrate to a lowest part of the first portion is different from a height from the substrate to a lowest part of the second portion.

Abstract: A method for producing a MEMS sound transducer element includes, inter alia, providing a first substrate. The first substrate has a first substrate side, an opposite second substrate side and a membrane layer arranged on the first substrate side. A further method step includes performing a first etching from the second substrate side in a first surface section that is situated opposite the membrane layer, as far as a first depth. A further method step includes performing a second etching of the first substrate from the second substrate side in a second surface section in order to expose the membrane layer in the first surface section and to produce a back volume for the membrane layer, where the second surface section is larger than the first surface section and includes the first surface section.

Abstract: A solid-state imaging device includes a plurality of pixels in a two-dimensional array. Each pixel includes a photoelectric conversion element that converts incident light into electric charge, and a charge holding element that receives the electric charge from the photoelectric conversion element, and transfers the electric charge to a corresponding floating diffusion. The charge holding element further includes a plurality of electrodes.

Abstract: Micro-Electro-Mechanical System (MEMS) devices for harvesting sound energy and methods for fabricating MEMS devices for harvesting sound energy are provided. In an embodiment, a method for fabricating a MEMS device for harvesting sound energy includes forming a pressure sensitive MEMS structure disposed over a semiconductor substrate and including a suspended structure in a cavity. Further, the method includes etching the semiconductor substrate to form an acoustic port through the semiconductor substrate configured to allow acoustic pressure to deflect the suspended structure.

Abstract: Embodiments of the invention include a method for fabricating a semiconductor device, the resulting structure, and a method for using the resulting structure. A substrate is provided. A hard mask layer is patterned over at least a portion of the substrate. Regions of the substrate not protected by the hard mask are doped to form a source region and a drain region. The hard mask layer is removed. A dielectric layer is deposited on the substrate. An insulative layer is deposited on the dielectric layer. A nano-channel is created by etching a portion of the insulative layer which passes over the source region and the drain region.

Abstract: The present invention provides a gas sensor structure comprising a gas sensing chip. The back of the sensing material is a hollow structure. An insulating layer is below the sensing material. A micro heating is disposed surrounding the sensing material. The sensing material adheres to sensing electrodes. The sensing material is a complex structure including a metal oxide semiconductor and a roughened lanthanum-carbonate gas sensing layer. The thickness of the metal oxide semiconductor is between 0.2 ?m and 10 ?m; the thickness of the roughened lanthanum-carbonate gas sensing layer is between 0.1 ?m and 4 ?m; and the size of the back etching holes is smaller than 1*1 mm. By using the gas sensor structure according to the present invention, a suspended gas sensing structure can be fabricated on a silicon substrate and the chip size can be minimized.

Abstract: A method for manufacturing an optical sensor includes forming a reflective metal layer on a substrate, forming an insulator layer on the reflective metal layer, inducing self-assembly of a metal nanostructure layer on the insulator layer, and selectively etching the insulator layer through a reactive ion etching process to form a plurality of pillars and a plurality of spaces defined by the plurality of pillars. The method for manufacturing a plasmonic optical sensor according to this embodiment facilitates the formation of nanostructures difficult to pattern and form on the large scale at a low cost, and provides a plasmonic optical sensor with repeatability.

Abstract: Image sensors may include pixel circuitry to enable per-pixel integration time and read-out control. Two transistors may be coupled in series for per-pixel control, with one of the transistors being controlled on a row-by-row basis and the other transistor being controlled on a column-by-column basis. The two transistors in series may be coupled directly to each other without any intervening structures. Two transistors in series between a photodiode and a power supply terminal enables per-pixel control of starting an integration time, two transistors in series between a photodiode and a charge storage region enables per-pixel control of ending an integration time, and two transistors in series between a charge storage region and a floating diffusion region enables per-pixel control of read-out.

Abstract: A fingerprint identification device and a method for manufacturing the fingerprint identification device are provided. The fingerprint identification device includes a solder ball array, a re-distribution layer, an image sensing integrated circuit (IC), a light emitting circuit, a photic layer and a molding material. The re-distribution layer disposed on the solder ball array is electrically connected to a plurality of solder balls. The image sensing IC includes a plurality of through silicon vias (TSVs), and the TSVs are correspondingly electrically connected to the solder balls, respectively, through the re-distribution layer. The light emitting circuit is disposed on one side of the image sensing IC, and electrically connected to the image sensing IC through the re-distribution layer. The image sensing IC controls the light emitting circuit. The photic layer is disposed on the image sensing IC. The molding material encloses the image sensing IC.

Abstract: A CMOS integrated circuit includes a Hall sensor having a Hall plate formed in a first isolation layer which is formed concurrently with a second isolation layer under a MOS transistor. A first shallow well with a conductivity type opposite from the first isolation layer is formed over, and extending to, the Hall plate. The first shallow well is formed concurrently with a second shallow well under the MOS transistor. The Hall sensor may be a horizontal Hall sensor for sensing magnetic fields oriented perpendicular to the top surface of the substrate of the integrated circuit, or may be a vertical Hall sensor for sensing magnetic fields oriented parallel to the top surface of the substrate of the integrated circuit.

Abstract: A field-effect transistor includes a gate electrode to apply a gate voltage, a source electrode and a drain electrode to take electric current out, a semiconductor layer disposed adjacent to the source electrode and the drain electrode, and a gate insulating layer disposed between the gate electrode and the semiconductor layer, wherein the gate insulating layer includes an oxide including silicon and one or two or more alkaline earth metal elements.

Abstract: A pressure sensor comprises a first substrate containing a processing circuit integrated thereon and a cap attached to the first substrate. The cap includes a container, a holder, and one or more suspension elements for suspending the container from the holder. The container includes a cavity and a deformable membrane separating the cavity and a port open to an outside of the pressure sensor. The container is suspended from the holder such that the deformable membrane faces the first substrate and such that a gap is provided between the deformable membrane and the first substrate which gap contributes to the port. Sensing means are provided for converting a response of the deformable membrane to pressure at the port into a signal capable of being processed by the processing circuit.

Abstract: A semiconductor device is provided. The semiconductor device may include a field insulating film on a substrate, a first fin type pattern which is formed on the substrate and protrudes upward from an upper surface of the field insulating film, and a gate electrode which intersects with the first fin type pattern on the field insulating film. The gate electrode may include a first portion and a second portion, the first portion being located on one side of the first fin type pattern and including a first terminal end of the gate electrode, and the second portion being located on the other side of the first fin type pattern. A height from the substrate to a lowest part of the first portion may be different than a height from the substrate to a lowest part of the second portion.

Abstract: Apparatus and associated methods relate to controlling an electric field profile within a drift region of an LDMOS device using first and second RESURF regions. The first RESURF region extends from a source end toward a drain end of the LDMOS device. The first RESURF region is adjacent to a forms a metallurgical junction with the drift region. The second RESURF layer extends from the drain end toward the source end of the LDMOS device. The second RESURF layer has an end that is longitudinally between the body contact and the source end of the first RESURF layer. A distance between the end of the second RESURF layer and the body contact is greater than a vertical distance between the end of the second RESURF layer and the body contact. A maximum electric field between the second RESURF layer and the body contact can be advantageously reduced with this geometry.

Abstract: A dc heater comprising: a discrete heating area made of a heat conductive material disposed on a surface that is electrically non-conductive; and at least one conductive trace configured to be connected to a dc voltage source and to heat the discrete heating area to a uniform temperature when connected to the dc voltage source, the at least one conductive trace disposed in an undulating configuration on the surface at least partially around the discrete heating area.

Abstract: The present disclosure provides a bio-field effect transistor (BioFET) and a method of fabricating a BioFET device. The method includes forming a BioFET using one or more process steps compatible with or typical to a complementary metal-oxide-semiconductor (CMOS) process. The BioFET device includes a substrate, a transistor structure having a treated layer adjacent to the channel region, an isolation layer, and a dielectric layer in an opening of the isolation layer on the treated layer. The dielectric layer and the treated layer are disposed on opposite side of the transistor from a gate structure. The treated layer may be a lightly doped channel layer or a depleted layer.

Abstract: An ultraviolet sensor comprises a glass substrate, a semiconductor structure, an electrode layer and a thin film metallic glass. The semiconductor structure comprises a semiconductor seed layer formed on the glass substrate and a plurality of semiconductor nanostructures formed on the semiconductor seed layer. The electrode layer is formed between the semiconductor seed layer and the plurality of semiconductor nanostructures. The thin film metallic glass is in contact with the semiconductor structure, wherein an interface between the thin film metallic glass and the semiconductor structure forms a Schottky barrier junction to inhibit dark current and increase signal-to-noise ratio.

Abstract: An electronic device includes a first field effect transistor that includes a first gate electrode, a first drain electrode, and a first source electrode; a second field effect transistor that includes a second gate electrode, a second drain electrode, and a second source electrode, the first and second gate electrodes being at least one of electrically connected or integral, and the first and second source electrodes being at least one of electrically connected or integral; an input electrode electrically connected to the first and second gate electrodes; and an output electrode electrically connected to the first and second source electrodes. The first field effect transistor also includes a first semiconductor material. The second field effect transistor further also incudes a second semiconductor material.

Abstract: In one implementation, a method for manufacturing a chemical detection device is described. The method includes forming a chemical sensor having a sensing surface. A dielectric material is deposited on the sensing surface. A first etch process is performed to partially etch the dielectric material to define an opening over the sensing surface and leave remaining dielectric material on the sensing surface. An etch protect material is formed on a sidewall of the opening. A second etch process is then performed to selectively etch the remaining dielectric material using the etch protect material as an etch mask, thereby exposing the sensing surface.

Abstract: A gas detector includes a gas detection element having a protection layer formed of an oxide film mainly containing tantalum oxide (Ta2O5). Since the protection layer has excellent condensed-water resistance, even when water droplets adhere thereto, the morphology thereof does not change from dense to porous. Thus, since a change in property of the protection layer, which would otherwise be caused by adhesion of water droplets, can be reduced in the gas detector, even when water droplets adhere to the outermost surface layer of the gas detection element, impurities can be prevented from entering the protection layer (the outermost surface layer), whereby a change in thermal capacity of the gas detection element can be reduced. Thus, the gas detection element of the gas detector has excellent alkali resistance and condensed-water resistance.

Abstract: Nano-electromechanical systems (NEMS) devices that utilize thin electrically conductive membranes, which can be, for example, graphene membranes. The membrane-based NEMS devices can be used as sensors, electrical relays, adjustable angle mirror devices, variable impedance devices, and devices performing other functions.

Abstract: A method and structure for a PLCSP (Package Level Chip Scale Package) MEMS package. The method includes providing a MEMS chip having a CMOS substrate and a MEMS cap housing at least a MEMS device disposed upon the CMOS substrate. The MEMS chip is flipped and oriented on a packaging substrate such that the MEMS cap is disposed above a thinner region of the packaging substrate and the CMOS substrate is bonding to the packaging substrate at a thicker region, wherein bonding regions on each of the substrates are coupled. The device is sawed to form a package-level chip scale MEMS package.

Abstract: The present disclosure provides a bio-field effect transistor (BioFET) device and methods of fabricating a BioFET and a BioFET device. The method includes forming a BioFET using one or more process steps compatible with or typical to a complementary metal-oxide-semiconductor (CMOS) process. The BioFET device includes a gate structure disposed on a first surface of a substrate and an interface layer formed on a second surface of the substrate. The substrate is thinned from the second surface to expose a channel region before forming the interface layer.

Abstract: Apparatus for detecting and identifying a chemical species in an environment, the apparatus comprising: a plurality of carbon nanotubes arranged to form a network, the network comprising a plurality of inter-carbon nanotube junctions; a plurality of electrical contacts, each of the plurality of electrical contacts being connected to the network such that the anisotropic electrical characteristics of the network can be measured dynamically while the network is exposed to the environment; wherein the network possesses electrical anisotrophy such that the ratio of the number of inter-carbon nanotube junctions which must be traversed by current per length of the plurality of carbon nanotubes differs for different directions within the network along the path from one of the plurality of electrical contacts to another of the plurality of electrical contacts, and further wherein the electrical anisotrophy of the network changes when a chemical species is present in the environment.

Abstract: A wafer level centrifuge (WLC) system and method of testing MEMS devices using the system. The wafer level centrifuge (WLC) system can include a base centrifuge system and a cassette mounting hub coupled to the base centrifuge system. The method can include applying a smooth and continuous acceleration profile to two or more MEMS wafers via the base centrifuge system. Each of the two or more MEMS wafers can have one or more MEMS devices formed thereon. The two or more MEMS wafers can be provided in two or more wafer holding cassettes configured on the cassette mounting hub. The method can also include identifying one or more target MEMS wafers, which can include identifying stiction in one or more MEMS devices on the one or more MEMS wafers.

Abstract: According to one embodiment, a semiconductor memory device includes: a first active area provided in a semiconductor substrate; a second active area provided in the semiconductor substrate and intersecting with the first active area; a first select transistor comprising a first drain region provided in the first active area and a source region provided in an intersection region of the first and second active areas; a second select transistor comprising a second drain region provided in the second active area and sharing the source region; a word line coupled to gates of the first and second select transistors; and first and second variable resistance elements coupled to the first and second drain regions, respectively.

Abstract: The present disclosure provides a semiconductor structure, including a logic region and a memory region adjacent to the logic region. The memory region includes a first Nth metal line of an Nth metal layer, a magnetic tunneling junction (MTJ) over first Nth metal line, and a first (N+1)th metal via of an (N+1)th metal layer, the first (N+1)th metal via being disposed over the MTJ layer. N is an integer greater than or equal to 1. A method of manufacturing the semiconductor structure is also disclosed.

Abstract: A semiconductor device comprising a substrate and an electronic circuit thereon is described. The electronic circuit comprises a first voltage provider node, a second voltage provider node, and an intermediary node connected to the first and second voltage provider node by a first and second network with a first and second resistance, respectively. The substrate is susceptible to conducting a substrate current. The semiconductor device further comprises a substrate current sensor. The first network is arranged to reduce the first resistance in response to the substrate current sensor signaling an increase of the substrate current and vice versa. Similarly, the second network is arranged to reduce the second resistance in response to the substrate current sensor signaling an increase of the substrate current and vice versa. A method of operating a semiconductor device is also disclosed.

Abstract: In an embodiment of the invention, a biosensor comprises a semiconductor region having a doping polarity; a source region located at a first end of the semiconductor layer and a drain region located at a second end of the semiconductor layer; wherein the source region is in electrical communication with a source voltage; a current path from the source region, through the semiconductor layer, to the drain region; a sensing gate region in contact with a first surface of the semiconductor layer and having an opposite polarity as the semiconductor layer; a sensing surface in electrical communication with the sensing gate region; and a dual gate region in contact with a second surface of the semiconductor layer; wherein the dual gate region has a same polarity as the sensing gate region.

Abstract: Provided is an electronic device including a semiconductor memory. The semiconductor memory may include: an interlayer dielectric layer formed over a substrate including first and second areas; a first contact plug contacted with the substrate through the interlayer dielectric layer of the second area; an anti-peeling layer formed over the interlayer dielectric layer including the first contact plug; a second contact plug contacted with the substrate through the anti-peeling layer and the interlayer dielectric layer in the first area; and a variable resistance pattern contacted with the second contact plug.

Abstract: An image sensor and a method of manufacturing the same. The image sensor includes a plurality of photoelectric conversion units that are horizontally arranged and selectively emit electric signals by absorbing color beams.

Abstract: Microsensors that include an integrated thermal energy source and an integrated temperature sensor are capable of providing localized heating and temperature control of individual sensing regions within the microsensor. Localized temperature control allows analyte detection to be carried out at the same temperatures or substantially the same temperatures at which the sensor is calibrated. By carrying out the sensing near the calibration temperature, more accurate results can be obtained. In addition, the temperature of the sensing region can be controlled so that chemical reactions involving the analyte in the sensing region occur near their peak reaction rate. Carrying out the sensing near the peak reaction rate improves the sensitivity of the sensor which is important as sensor dimensions decrease and the magnitude of the generated signals decreases.

Abstract: The present disclosure provides a device, such as a FET sensing cell, which includes a first dielectric layer over a substrate, an active layer over the first dielectric layer, a source region in the active layer, a drain region in the active layer, a channel region in the active layer situated between the source region and the drain region, a sensing film over the channel region, a second dielectric layer over the active layer, wherein an opening is formed in the second dielectric layer and the sensing film is located within the opening, a first electrode located within the second dielectric layer and a fluidic gate region located over the second dielectric layer and extending into the opening. The present disclosure also provides a method for improving the sensitivity of a device by adjusting a sensing value.

Abstract: The present disclosure provides a bio-field effect transistor (BioFET) and a method of fabricating a BioFET device. The method includes forming a BioFET using one or more process steps compatible with or typical to a complementary metal-oxide-semiconductor (CMOS) process. The BioFET device includes a substrate, a transistor structure having a treated layer adjacent to the channel region, an isolation layer, and a dielectric layer in an opening of the isolation layer on the treated layer. The dielectric layer and the treated layer are disposed on opposite side of the transistor from a gate structure. The treated layer may be a lightly doped channel layer or a depleted layer.

Abstract: A selective nanoscale asymmetric gas sensor is disclosed, the sensor including a first electrode having a Schottky-type contact to a nanoengineered transducer with a barrier height between energy levels of the first electrode and the nanoengineered transducer; and a second electrode having an Ohmic contact to the nanoengineered transducer with a smaller or no barrier height than the first electrode. The first electrode can be palladium and the second electrode can be gold.