Responsive To Non-optical, Non-electrical Signal Patents (Class 257/252)
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Patent number: 9361963Abstract: The invention relates to a spintronic circuit (10; 11; 15) comprising: a conductive non-magnetic channel (1); —means (2, NM, FM1-FM3) for generating spin polarized electrons (4) in the non-magnetic channel (1) by spin extraction; at least two ferromagnetic contacts (FM1-FM3) arranged along the non-magnetic channel (1) one after another, —means (7, 8, 9) for adjusting the magnetization direction of the ferromagnetic contacts (FM1-FM3); means for propagating the spin polarized electrons (4) along the non-magnetic channel (1); means (5, 6) for measuring the contact resistance of the individual ferromagnetic contacts (FM1-FM3), wherein the contact resistance depends on the relative alignment of the spin polarization direction of the spin polarized electrons (4) in the non-magnetic channel (1) at the ferromagnetic contact (FM1-FM3) and the magnetization direction of the ferromagnetic contact (FM1-FM3).Type: GrantFiled: July 3, 2013Date of Patent: June 7, 2016Assignee: Forschungsverbund Berlin e.V.Inventors: Yori Manzke, Rouin Farshchi, Manfred Ramsteiner
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Patent number: 9318573Abstract: A field effect transistor having at least one Ge nanorod and a method of manufacturing the field effect transistor are provided. The field effect transistor may include a gate insulation layer formed on a silicon substrate, at least one nanorod embedded in the gate insulation layer having both ends thereof exposed, a source electrode and a drain electrode connected to opposite sides of the at least one Ge nanorod, and a gate electrode formed on the gate insulation layer between the source electrode and the drain electrode.Type: GrantFiled: August 22, 2013Date of Patent: April 19, 2016Assignee: Samsung Electronics Co., Ltd.Inventors: Chang-Wook Moon, Joong S. Jeon, Jung-hyun Lee, Nae-In Lee, Yeon-Sik Park, Hwa-Sung Rhee, Ho Lee, Se-Young Cho, Suk-Pil Kim
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Patent number: 9297704Abstract: A method and circuit for determining a working temperature of a device, the method comprising: providing a first signal to a device having a temperature-sensitive characteristic; performing a function on the first signal by the device; demodulating a second signal output by the device to obtain a third signal thus generating a signal having reduced 1/f noise component; and based upon the first signal and the second signal, determining a working temperature of the device.Type: GrantFiled: January 20, 2014Date of Patent: March 29, 2016Assignee: International Business Machines CorporationInventors: Dan Corcos, Michel Despont, Danny Elad, Thomas Morf, Mehmet Soyuer
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Patent number: 9229020Abstract: A micropatterned component, for measuring accelerations and/or yaw rates, including a substrate having a principal plane of extension of the substrate, an electrode, and a further electrode; the electrode having a principal plane of extension of the electrode, and the further electrode having a principal plane of extension of the further electrode; the principal plane of extension of the electrode being set parallelly to a normal direction perpendicular to the principal plane of extension of the substrate; the principal plane of extension of the further electrode being set parallelly to the normal direction; the electrode having an electrode height extending in the normal direction; the electrode having a flow channel extending completely through the electrode in a direction parallel to the principal plane of extension of the substrate; the flow channel having a channel depth extending parallelly to the normal direction; the channel depth being less than the electrode height.Type: GrantFiled: May 14, 2014Date of Patent: January 5, 2016Assignee: ROBERT BOSCH GMBHInventor: Johannes Classen
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Patent number: 9184095Abstract: In sophisticated semiconductor devices, the contact structure may be formed on the basis of contact bars formed in a lower portion of an interlayer dielectric material, which may then be contacted by contact elements having reduced lateral dimensions so as to preserve a desired low overall fringing capacitance. The concept of contact bars of reduced height level may be efficiently combined with sophisticated replacement gate approaches.Type: GrantFiled: November 2, 2010Date of Patent: November 10, 2015Assignee: GLOBALFOUNDRIES Inc.Inventors: Thilo Scheiper, Sven Beyer, Uwe Griebenow, Jan Hoentschel, Andy Wei
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Patent number: 9087633Abstract: A magnetic device has a contact structure including a magnetic material therein. The contact structure is magnetostatically and/or electrically coupled to a magnetic element such as one having a magnetic tunneling junction (MTJ) multilayer structure. The magnetic material included in the contact structure is configured to compensate for an offset field acting on the free layer of the magnetic element by reference layers of the magnetic element.Type: GrantFiled: December 21, 2011Date of Patent: July 21, 2015Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Alexey Vasilyevitch Khvalkovskiy, Vladimir Nikitin, Dmytro Apalkov, Mohamad Towfik Krounbi
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Patent number: 9018683Abstract: The purpose of the present invention is to improve the efficiency of conversion between terahertz electromagnetic wave energy and direct current energy via plasma waves in a terahertz electromagnetic wave conversion device with a field effect transistor structure. This invention has an HEMT structure having a substrate, an electron transit layer, an electron supply layer, a source and a drain, and includes a first and second group of gates. The gate length of each finger of the first group of gates is narrower than the gate length of each finger of the second group of gates, and each finger of each group of gates is disposed between the source and the drain on the same cycle. A first and second distance from each finger of the first group of gates to two fingers of the second group of gates adjacent to each finger are unequal lengths.Type: GrantFiled: December 3, 2010Date of Patent: April 28, 2015Assignees: Tohoku University, Centre National de la Recherche Scientifique (CNRS), Universite Montpellier 2Inventors: Taiichi Otsuji, Viacheslav Popov, Wojciech Knap, Yahya Moubarak Meziani, Nina Diakonova, Dominique Coquillat, Frederic Teppe, Denis Fateev, Jesus Enrique Velazquez Perez
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Patent number: 8957497Abstract: Embodiments of the present invention provide an integrated circuit system including a first active layer fabricated on a front side of a semiconductor die and a second pre-fabricated layer on a back side of the semiconductor die and having electrical components embodied therein, wherein the electrical components include at least one discrete passive component. The integrated circuit system also includes at least one electrical path coupling the first active layer and the second pre-fabricated layer.Type: GrantFiled: February 25, 2014Date of Patent: February 17, 2015Assignee: Analog Devices, Inc.Inventors: Alan J. O'Donnell, Santiago Iriarte, Mark J. Murphy, Colin G. Lyden, Gary Casey, Eoin Edward English
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Patent number: 8950240Abstract: An acetone gas sensor apparatus, including: a chamber, used for containing a gas sample taken from a breath of a person; and an acetone gas sensor, placed in the chamber for generating an output current in response to an acetone concentration of the gas sample, the acetone gas sensor including: a substrate; a buffer layer, deposited on the substrate; an InN epilayer, deposited on the buffer layer for providing a current path for the output current; a first conductive contact, deposited on the InN epilayer for providing a drain contact; and a second conductive contact, deposited on the InN epilayer for providing a source contact.Type: GrantFiled: March 28, 2012Date of Patent: February 10, 2015Assignee: National Tsing Hua UniversityInventors: Jer-Liang Andrew Yeh, Shang-Jr Gwo
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Patent number: 8948562Abstract: The present invention provides templating methods for replicating patterned metal films from a template substrate such as for use in plasmonic devices and metamaterials. Advantageously, the template substrate is reusable and can provide plural copies of the structure of the template substrate. Because high-quality substrates that are inherently smooth and flat are available, patterned metal films in accordance with the present invention can advantageously provide surfaces that replicate the surface characteristics of the template substrate both in the patterned regions and in the unpatterned regions.Type: GrantFiled: November 24, 2009Date of Patent: February 3, 2015Assignee: Regents of the University of MinnesotaInventors: David J. Norris, Sang Eon Han, Aditya Bhan, Prashant Nagpal, Nathan Charles Lindquist, Sang-Hyun Oh
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Patent number: 8890216Abstract: Methods and apparatus relating to very large scale FET arrays for analyte measurements. ChemFET (e.g., ISFET) arrays may be fabricated using conventional CMOS processing techniques based on improved FET pixel and array designs that increase measurement sensitivity and accuracy, and at the same time facilitate significantly small pixel sizes and dense arrays. Improved array control techniques provide for rapid data acquisition from large and dense arrays. Such arrays may be employed to detect a presence and/or concentration changes of various analyte types in a wide variety of chemical and/or biological processes. In one example, chemFET arrays facilitate DNA sequencing techniques based on monitoring changes in hydrogen ion concentration (pH), changes in other analyte concentration, and/or binding events associated with chemical processes relating to DNA synthesis.Type: GrantFiled: June 4, 2013Date of Patent: November 18, 2014Assignee: Life Technologies CorporationInventors: Jonathan M. Rothberg, Wolfgang Hinz, Kim L. Johnson
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Publication number: 20140332749Abstract: A semiconductor device includes: a transistor on a main surface side of a semiconductor substrate; and a resistance change element on a back-surface side of the semiconductor substrate, wherein the transistor includes a low-resistance section in the semiconductor substrate, the low-resistance section extending to the back surface of the semiconductor substrate, an insulating film is provided in contact with a back surface of the low-resistance section, the insulating film has an opening facing the low-resistance section, and the resistance change element is connected to the low-resistance section through the opening.Type: ApplicationFiled: May 2, 2014Publication date: November 13, 2014Applicant: Sony CorporationInventor: Takashi Yokoyama
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Publication number: 20140332692Abstract: The invention relates to a semiconductor drift detector for detecting radiation, comprising a semiconductor substrate (HS), in which signal charge carriers are generated during operation, to be precise by incident photons (h·f) having a specific photon energy, more particularly in the form of X-ray fluorescent radiation, and/or by incident electrons (?), having a specific signal charge carrier current, more particularly in the form of back-scattered electrons (?), and comprising a read-out anode (A) for generating an electrical output signal in a manner dependent on the signal charge carriers, and comprising an erase contact (RC) for erasing the signal charge carriers that have accumulated in the semiconductor substrate (HS).Type: ApplicationFiled: June 18, 2012Publication date: November 13, 2014Applicants: PNSENSOR GMBH, PNDETECTOR GMBHInventors: Gerhard Lutz, Heike Soltau, Adrian Niculae
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Patent number: 8877538Abstract: The present disclosure relates to a pressure sensor having a nanostructure and a method for manufacturing the same. More particularly, it relates to a pressure sensor having a nanostructure attached on the surface of the pressure sensor and thus having improved sensor response time and sensitivity and a method for manufacturing the same. The pressure sensor according to the present disclosure having a nanostructure includes: a substrate; a source electrode and a drain electrode arranged on the substrate with a predetermined spacing; a flexible sensor layer disposed on the source electrode and the drain electrode; and a nanostructure attached on the surface of the flexible sensor layer and having nanosized wrinkles.Type: GrantFiled: November 27, 2012Date of Patent: November 4, 2014Assignee: Korea Institute of Science and TechnologyInventors: Jin Seok Kim, Jun-Kyo Francis Suh, Sung Chul Kang, Jeong Hoon Lee
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Patent number: 8859316Abstract: A Schottky junction silicon nanowire field-effect biosensor/molecule detector with a nanowire thickness of 10 nanometer or less and an aligned source/drain workfunction for increased sensitivity. The nanowire channel is coated with a surface treatment to which a molecule of interest absorbs, which modulates the conductivity of the channel between the Schottky junctions sufficiently to qualitatively and quantitatively measure the presence and amount of the molecule.Type: GrantFiled: June 29, 2010Date of Patent: October 14, 2014Assignee: International Business Machines CorporationInventors: Dechao Guo, Christian Lavoie, Christine Ouyang Qiqing, Yanning Sun, Zhen Zhang
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Patent number: 8860097Abstract: Provided is a biosensor that makes it possible to detect the electrical properties of a bio-related material contained in an analyte fluid such as an aqueous solution placed on a sensitive membrane and to observe the bio-related material at a high magnification with an observation device such as a microscope.Type: GrantFiled: June 14, 2011Date of Patent: October 14, 2014Assignee: Dai Nippon Printing Co., Ltd.Inventors: Takuya Higuchi, Tomonori Akai, Katsuyuki Motai
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Patent number: 8852983Abstract: A method for fabrication of capacitive environment sensors is provided in which the sensor elements are integrated in a CMOS structure with electronics through the use of complementary metal oxide semiconductor (CMOS) fabrication methods. Also provided are environment sensors fabricated, for example, by the method, and a measurement system using the environment sensors fabricated by the method. The described method includes etching away one of the metal layers in a CMOS chip to create a cavity. This cavity is then filled with an environment-sensitive dielectric material to form a sensing capacitor between plates formed by the metal adhesion layers or an array of contacts from other metal layers of the CMOS structure. This approach provides improved sensing capabilities in a system that is easily manufactured.Type: GrantFiled: May 17, 2013Date of Patent: October 7, 2014Assignee: Carnegie Mellon UniversityInventors: Gary Keith Fedder, Nathan Scott Lazarus
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Patent number: 8847288Abstract: A spin transistor according to an embodiment includes: a semiconductor layer including a p+-region and an n+-region located at a distance from each other, and an i-region located between the p+-region and the n+-region; a first electrode located on the p+-region, the first electrode including a first ferromagnetic layer; a second electrode located on the n+-region, the second electrode including a second ferromagnetic layer; and a gate located on at least the i-region.Type: GrantFiled: January 25, 2013Date of Patent: September 30, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Tomoaki Inokuchi, Mizue Ishikawa, Hideyuki Sugiyama, Yoshiaki Saito
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Publication number: 20140283616Abstract: A workfunction modulation-based sensor comprising a field-effect transistor (FET). The FET comprises a substrate, a gate dielectric, a metal gate, a source, a drain, and a layer of sensing material that is electrically connected to the metal gate. An electrical connection that connects to the source of the FET. An electrical connection that connects to the drain of the FET. An electrical connection that connects to the layer of sensing material. An environment that includes an adsorbate gas surrounding, at least a portion of, the layer of sensing material. Wherein the sensing material is adapted to adsorb, at least in part, the adsorbate gas. The amount of adsorbate gas adsorbed on the layer of sensing material modulates the workfunction of the FET such that the degree of adsorbate gas adsorption corresponds to one of the temperature or pressure associated with the environment of the FET.Type: ApplicationFiled: March 25, 2013Publication date: September 25, 2014Applicant: International Business Machines CorporationInventors: Balaji Jayaraman, Kota V. R. M. Murali, Edward J. Nowak, Ninad D. Sathaye, Rajesh Sathiyanarayanan
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Publication number: 20140264463Abstract: The present disclosure provides one embodiment of a semiconductor structure that includes a first metal layer formed on a semiconductor substrate, wherein the first metal layer includes a first metal feature in a first region and a second metal feature in a second region; a second metal layer disposed on the first metal layer, wherein the second metal layer includes a third metal feature in the first region and a fourth metal feature in a second region; a magneto-resistive memory device sandwiched between the first metal feature and the third metal feature; and a capacitor sandwiched between the second metal feature and the fourth metal feature.Type: ApplicationFiled: October 30, 2013Publication date: September 18, 2014Inventors: Chung-Cheng Chou, Ya-Chen Kao, Tien-Wei Chiang
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Publication number: 20140231882Abstract: The invention provides a processor obtained by forming a high functional integrated circuit using a polycrystalline semiconductor over a substrate which is sensitive to heat, such as a plastic substrate or a plastic film substrate. Moreover, the invention provides a wireless processor, a wireless memory, and an information processing system thereof which transmit and receive power or signals wirelessly. According to the invention, an information processing system includes an element forming region including a transistor which has at least a channel forming region formed of a semiconductor film separated into islands with a thickness of 10 to 200 nm, and an antenna. The transistor is fixed on a flexible substrate. The wireless processor in which a high functional integrated circuit including the element forming region is formed and the semiconductor device transmit and receive data through the antenna.Type: ApplicationFiled: May 1, 2014Publication date: August 21, 2014Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Kiyoshi Kato, Jun Koyama, Yutaka Shionoiri
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Patent number: 8796794Abstract: The present disclosure relates to the fabrication of spin transfer torque memory elements for non-volatile microelectronic memory devices. The spin transfer torque memory element may include a magnetic tunneling junction connected with specifically sized and/or shaped fixed magnetic layer that can be positioned in a specific location adjacent a free magnetic layer. The shaped fixed magnetic layer may concentrate current in the free magnetic layer, which may result in a reduction in the critical current needed to switch a bit cell in the spin transfer torque memory element.Type: GrantFiled: December 17, 2010Date of Patent: August 5, 2014Assignee: Intel CorporationInventors: Brian S. Doyle, David L. Kencke, Charles C. Kuo, Dmitri E. Nikonov, Robert S. Chau
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Publication number: 20140171010Abstract: Semiconductor devices with switchable connection between body and a ground node are presented. Methods for operating and fabricating such semiconductor devices are also presented.Type: ApplicationFiled: December 14, 2012Publication date: June 19, 2014Applicant: PEREGRINE SEMICONDUCTOR CORPORATIONInventor: PEREGRINE SEMICONDUCTOR CORPORATION
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Patent number: 8754453Abstract: The capacitive pressure sensor comprises: a substrate functioning as a lower electrode; a first insulating film formed on the substrate; a cavity formed on the first insulating film; a second insulating film formed on the first insulating film to have openings communicated with the cavity and to cover the cavity; a sealing film formed of a conductive material to seal the openings and to extend partially into the cavity through the openings; and an upper electrode formed on the second insulating film to be electrically separated from the sealing film and to overlap the cavity.Type: GrantFiled: July 21, 2011Date of Patent: June 17, 2014Assignee: Korea Electronics Technology InstituteInventors: Hak-In Hwang, Dae-Sung Lee, Kyu-Sik Shin
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Publication number: 20140159121Abstract: Provided is a nonvolatile magnetic device that is capable of realizing low power consumption by performing writing with a voltage and is also excellent in retention characteristics. The nonvolatile magnetic device includes a nonvolatile magnetic element. The nonvolatile magnetic element includes: a first free layer made of a ferromagnetic substance; a first insulating layer made of an insulator, the first insulating layer being provided to be connected to the first free layer; a charged layer provided adjacent to the first insulating layer; a second insulating layer made of an insulator, the second insulating layer being provided adjacent to the charged layer; and an injection layer provided adjacent to the second insulating layer. The charged layer is smaller in electric resistivity than both of the first insulating layer and the second insulating layer. The injection layer is smaller in electric resistivity than the second insulating layer.Type: ApplicationFiled: June 13, 2012Publication date: June 12, 2014Inventors: Shunsuke Fukami, Daichi Chiba
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Publication number: 20140151755Abstract: The present disclosure provides a bio-field effect transistor (BioFET) device and methods of fabricating a BioFET and a BioFET device. The method includes forming a BioFET using one or more process steps compatible with or typical to a complementary metal-oxide-semiconductor (CMOS) process. The BioFET device includes a gate structure disposed on a first surface of a substrate and an interface layer formed on a second surface of the substrate. The substrate is thinned from the second surface to expose a channel region before forming the interface layer.Type: ApplicationFiled: December 5, 2012Publication date: June 5, 2014Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Yi-Shao Liu, Chun-Ren Cheng, Ching-Ray Chen, Yi-Hsien Chang, Fei-Lung Lai, Chun-Wen Cheng
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Patent number: 8728844Abstract: The present disclosure provides a bio-field effect transistor (BioFET) device and methods of fabricating a BioFET and a BioFET device. The method includes forming a BioFET using one or more process steps compatible with or typical to a complementary metal-oxide-semiconductor (CMOS) process. The BioFET device includes a gate structure disposed on a first surface of a substrate and an interface layer formed on a second surface of the substrate. The substrate is thinned from the second surface to expose a channel region before forming the interface layer.Type: GrantFiled: December 5, 2012Date of Patent: May 20, 2014Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yi-Shao Liu, Chun-Ren Cheng, Ching-Ray Chen, Yi-Hsien Chang, Fei-Lung Lai, Chun-Wen Cheng
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Patent number: 8716762Abstract: Disclosed are: a biosensor kit in which a bionsensor utilizing a field effect transistor is not deteriorated during storage or transport; and a system for detecting a substance of interest, which is equipped with the biosensor chip. The biosensor kit comprises a biosensor chip which can measure a substance of interest quantitatively and a package which can hermetically seal the biosensor chip and is composed of a packaging material comprising a metal film. The biosensor chip can measure the substance quantitatively based on the value of a current generated in a field effect transistor when the substance is reacted with a molecule that can recognize the substance and is immobilized on a reaction field connected to the field effect transistor. The biosensor chip comprises the field effect transistor and a mounting substrate on which the field effect transistor is mounted.Type: GrantFiled: March 15, 2011Date of Patent: May 6, 2014Assignee: Mitsumi Electric Co., Ltd.Inventors: Mitsuru Sakamoto, Hirohiko Urushiyama, Hiroaki Kikuchi, Tomoaki Yamabayashi
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Patent number: 8716819Abstract: According to one embodiment, a magnetic random access memory includes a plurality of magnetoresistance elements. The plurality of magnetoresistance elements each include a recording layer having magnetic anisotropy perpendicular to a film surface, and a variable magnetization direction, a reference layer having magnetic anisotropy perpendicular to a film surface, and an invariable magnetization direction, and a first nonmagnetic layer formed between the recording layer and the reference layer. The recording layer is physically separated for each of the plurality of magnetoresistance elements. The reference layer and the first nonmagnetic layer continuously extend over the plurality of magnetoresistance elements.Type: GrantFiled: March 23, 2012Date of Patent: May 6, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Eiji Kitagawa, Naoharu Shimomura, Tsuneo Inaba
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Patent number: 8710554Abstract: Disclosed are: a biosensor kit in which a biosensor utilizing a field effect transistor is not deteriorated during storage or transport; and a system for detecting a substance of interest, which is equipped with the biosensor chip. The biosensor kit comprises a biosensor chip which can measure a substance of interest quantitatively and a package which can hermetically seal the biosensor chip and is composed of a packaging material comprising a metal film. The biosensor chip can measure the substance quantitatively based on the value of a current generated in a field effect transistor when the substance is reacted with a molecule that can recognize the substance and is immobilized on a reaction field connected to the field effect transistor. The biosensor chip comprises the field effect transistor and a mounting substrate on which the field effect transistor is mounted.Type: GrantFiled: September 19, 2013Date of Patent: April 29, 2014Assignee: Mitsumi Electric, Co., Ltd.Inventors: Mitsuru Sakamoto, Hirohiko Urushiyama, Hiroaki Kikuchi, Tomoaki Yamabayashi
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Patent number: 8710597Abstract: A method and structure for adding mass with stress isolation to MEMS. The structure has a thickness of silicon material coupled to at least one flexible element. The thickness of silicon material can be configured to move in one or more spatial directions about the flexible element(s) according to a specific embodiment. The apparatus also includes a plurality of recessed regions formed in respective spatial regions of the thickness of silicon material. Additionally, the apparatus includes a glue material within each of the recessed regions and a plug material formed overlying each of the recessed regions.Type: GrantFiled: April 19, 2011Date of Patent: April 29, 2014Assignee: mCube Inc.Inventor: Daniel N. Koury, Jr.
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Publication number: 20140110763Abstract: A nano resonance apparatus includes a gate electrode configured to generate a magnetic field, and a nanowire connecting a source electrode to a drain electrode and configured to vibrate in the presence of the magnetic field. The nanowire includes a protruding portion extending in a direction of the gate electrode.Type: ApplicationFiled: October 18, 2013Publication date: April 24, 2014Applicants: Korea University Industrial & Academic Collaboration Foundation, SAMSUNG ELECTRONICS CO., LTD.Inventors: In Sang Song, Ho Soo Park, Duck Hwan Kim, Sang Uk Son, Jae Shik Shin, Jae-Sung Rieh, Byeong Kwon Ju, Dong Hoon Hwang
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Patent number: 8698218Abstract: A magnetoresistive memory element has a free layer, and a write current path aligned with a free layer plane. The memory element has a pinned layer with a magnetization direction aligned with that of the free layer. A barrier layer is disposed between the free layer and the pinned layer. The free, barrier and pinned layers together form a layer stack that has a read current path that extends through the layer stack and that is not aligned with the write current path in the free layer.Type: GrantFiled: October 13, 2010Date of Patent: April 15, 2014Assignee: Seagate Technology LLCInventor: Mark William Covington
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Publication number: 20140097477Abstract: An aspect of the present embodiment, there is provided magnetic random access memory device including a semiconductor substrate, a selection transistor on the semiconductor substrate, the selection transistor including a diffusion layer, a contact plug on diffusion layer, an amorphous film on the contact plug, a lower electrode provided on the amorphous film, a first magnetic layer, a nonmagnetic layer, a second magnetic layer, an upper electrode stacked in an order and a sidewall contact film on the contact plug, the sidewall contact film being in contact with a sidewall of the upper electrode.Type: ApplicationFiled: October 10, 2013Publication date: April 10, 2014Applicant: Kabushiki Kaisha ToshibaInventor: Hiroyuki Kanaya
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Publication number: 20140077146Abstract: A memory element includes a FinFET select device and a memory element. In some embodiments a memory cell has a contact element coupled between a surface of the fin and the memory element.Type: ApplicationFiled: October 7, 2013Publication date: March 20, 2014Inventors: Ronald KAKOSCHKE, Klaus SCHRUEFER
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Patent number: 8669662Abstract: A fastening device is provided that includes a semiconductor body with an integrated circuit, and a dielectric passivation layer formed on the surface of the semiconductor body, and a trace formed underneath the passivation layer, and an oxide layer formed beneath the trace, and a connecting component that forms a frictional connection between a component formed above the passivation layer and the semiconductor body, wherein a formation passing through the passivation layer and the oxide layer and having a bottom surface is formed, and a conductive layer is formed on the bottom surface and the connecting component forms an electrical connection between the conductive layer and the component.Type: GrantFiled: December 2, 2012Date of Patent: March 11, 2014Assignee: Micronas GmbHInventors: Christoph Wilbertz, Heinz-Peter Frerichs, Tobias Kolleth
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Patent number: 8664700Abstract: A bio material receiving device includes a thin film transistor (“TFT”) including a drain electrode, and a nano well accommodating a bio material. The drain electrode includes the nano well. The TFT may be a bottom gate TFT or a top gate TFT. A nano well array may include a plurality of bio material receiving devices. In a method of operating the bio material receiving device, each of the bio material receiving devices may be individually selected in the nano well array. When the bio material is accommodated in the selected bio material receiving device, a voltage is applied so that another bio material is not accommodated.Type: GrantFiled: April 28, 2011Date of Patent: March 4, 2014Assignee: Samsung Electronics Co., Ltd.Inventors: June-young Lee, Su-hyeon Kim
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Patent number: 8659104Abstract: A field-effect magnetic sensor facilitates highly-sensitive magnetic field detection. In accordance with one or more example embodiments, current flow respectively between first and second source/drain terminals and a third source/drain terminal is controlled using inversion layers in separate channel regions for each of the first and second terminals. In response to a magnetic field, a greater amount of current is passed between the third source/drain terminal and one of the first and second source/drain terminals, relative to an amount of current passed between the third source/drain terminal and the other one of the first and second source/drain terminals.Type: GrantFiled: December 21, 2010Date of Patent: February 25, 2014Assignee: NXP B.V.Inventors: Gilberto Curatola, Victor Zieren, Anco Heringa
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Patent number: 8653567Abstract: A chemically sensitive sensor with a lightly doped region that affects an overlap capacitance between a gate and an electrode of the chemical sensitive sensor. The lightly doped region extends beneath and adjacent to a gate region of the chemical sensitive sensor. Modifying the gain of the chemically sensitive sensor is achieved by manipulating the lightly doped region under the electrodes.Type: GrantFiled: June 30, 2011Date of Patent: February 18, 2014Assignee: Life Technologies CorporationInventor: Keith Fife
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Patent number: 8648396Abstract: The present disclosure utilizes the MEMS (Micro Electro Mechanical Systems) process and packaging method to produce a microsystem for analyzing blood which is capable of detecting several kinds of ions. The microsystem for analyzing blood has a miniaturized reference electrode, so size of the microsystem can be greatly reduced. The microsystem further has a gate detecting area larger than a conventional planar ISE or a conventional ISFET does, so interference with signals can be avoided, and packaging difficulty and blood leakage can be reduced. Therefore, the microsystem is thin and small, reacts rapidly, and has a high accuracy, and a high compatibility with IC (integrated circuit) process. In addition, the microsystem has high stability of long-term potential, low offset-potential characteristics, low alternating current impedance, high stability of dynamic reference potential, low electrochemical noises and high reproducibility of the electrode.Type: GrantFiled: December 30, 2010Date of Patent: February 11, 2014Assignee: Industrial Technology Research InstituteInventors: I-Yu Huang, Chia-Hsu Hsieh
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Patent number: 8648395Abstract: A single chip wireless sensor (1) comprises a microcontroller (2) connected by a transmit/receive interface (3) to a wireless antenna (4). The microcontroller (2) is also connected to an 8 kB RAM (5), a USB interface (6), an RS232 interface (8), 64 kB flash memory (9), and a 32 kHz crystal (10). The device (1) senses humidity and temperature, and a humidity sensor (11) is connected by an 18 bit ?? A-to-D converter (12) to the microcontroller (2) and a temperature sensor (13) is connected by a 12 bit SAR A-to-D converter (14) to the microcontroller (2). The device (1) is an integrated chip manufactured in a single process in which both the electronics and sensor components are manufactured using standard CMOS processing techniques, applied to achieve both electronic and sensing components in an integrated process.Type: GrantFiled: May 28, 2009Date of Patent: February 11, 2014Assignee: Silicon Laboratories Inc.Inventor: Timothy Cummins
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Patent number: 8637943Abstract: An integrated multi-axis mechanical device and integrated circuit system. The integrated system can include a silicon substrate layer, a CMOS device region, four or more mechanical devices, and a wafer level packaging (WLP) layer. The CMOS layer can form an interface region, on which any number of CMOS and mechanical devices can be configured. The mechanical devices can include MEMS devices configured for multiple axes or for at least a first direction. The CMOS layer can be deposited on the silicon substrate and can include any number of metal layers and can be provided on any type of design rule. The integrated MEMS devices can include, but not exclusively, any combination of the following types of sensors: magnetic, pressure, humidity, temperature, chemical, biological, or inertial. Furthermore, the overlying WLP layer can be configured to hermetically seal any number of these integrated devices.Type: GrantFiled: January 2, 2011Date of Patent: January 28, 2014Assignee: mCube Inc.Inventor: Xiao “Charles” Yang
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Patent number: 8624336Abstract: It is an object of the present invention to manufacture a micromachine having a plurality of structural bodies with different functions and to shorten the time required for sacrifice layer etching in a process of manufacturing the micromachine. Another object of the present invention is to prevent a structural layer from being attached to a substrate after the sacrifice layer etching. In other words, an object of the present invention is to provide an inexpensive and high-value-added micromachine by improving throughput and yield. The sacrifice layer etching is conducted in multiple steps. In the multiple steps of the sacrifice layer etching, a part of the sacrifice layer that does not overlap with the structural layer is removed by the earlier sacrifice layer etching and a part of the sacrifice layer that is under the structural layer is removed by the later sacrifice layer etching.Type: GrantFiled: October 18, 2011Date of Patent: January 7, 2014Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Mayumi Yamaguchi, Konami Izumi
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Patent number: 8614111Abstract: A method for forming a neutron detector comprises thinning a backside silicon substrate of a radiation detector; and forming a neutron converter layer on the thinned backside silicon substrate of the radiation detector to form the neutron detector. The neutron converter layer comprises one of boron-10 (10B), lithium-6 (6Li), helium-3 (3He), and gadolinium-157 (157Gd).Type: GrantFiled: July 25, 2011Date of Patent: December 24, 2013Assignee: International Business Machines CorporationInventors: Michael S. Gordon, Kenneth P. Rodbell, Jeng-Bang Yau
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Patent number: 8614465Abstract: Provided is an electronic device that generates an output signal corresponding to an input signal, comprising a signal processing section that receives the input signal and outputs the output signal corresponding to the input signal, and a floating electrode that accumulates a charge by being irradiated by an electron beam. The signal processing section adjusts electric characteristics of the output signal according to a charge amount accumulated in the floating electrode, and includes a transistor formed on the semiconductor substrate between an input terminal that receives the input signal and an output terminal that outputs the output signal. The floating electrode is formed between a gate electrode of the transistor and the semiconductor substrate.Type: GrantFiled: February 15, 2011Date of Patent: December 24, 2013Assignee: Advantest CorporationInventors: Daisuke Watanabe, Toshiyuki Okayasu
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Patent number: 8587224Abstract: Provided are a variable field effect transistor (FET) designed to suppress a reduction of current between a source and a drain due to heat while decreasing a temperature of the FET, and an electrical and electronic apparatus including the variable gate FET. The variable gate FET includes a FET and a gate control device that is attached to a surface or a heat-generating portion of the FET and is connected to a gate terminal of the FET so as to vary a voltage of the gate terminal. A channel current between the source and drain is controlled by the gate control device that varies the voltage of the gate terminal when the temperature of the FET increases above a predetermined temperature.Type: GrantFiled: June 28, 2013Date of Patent: November 19, 2013Assignee: Electronics and Telecommunications Research InstituteInventors: Hyun-Tak Kim, Bongjun Kim
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Publication number: 20130299880Abstract: Spin transistors and related memory, memory systems, and methods are disclosed. A spin transistor is provided by at least two magnetic tunnel junctions (MTJs) with a shared multiferroic layer. The multiferroic layer is formed from a piezoelectric (PE) thin film over a ferromagnetic thin film (FM channel) with a metal electrode (metal). The ferromagnetic layer functions as the spin channel and the piezoelectric layer is used for transferring piezoelectric stress to control the spin state of the channel. The MTJ on one side of the shared layer forms a source and the MTJ on the other side is a drain for the spin transistor.Type: ApplicationFiled: January 21, 2013Publication date: November 14, 2013Applicant: QUALCOMM INCORPORATEDInventor: Yang Du
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Patent number: 8569808Abstract: A semiconductor device with temperature control system. Embodiments of the device may include a MEMS chip including a first heater with a dedicated first temperature control loop and a CMOS chip including a second heater with a dedicated second temperature control loop. Each control loop may have a dedicated temperature sensor for controlling the thermal output of each heater. The first heater and sensor are disposed proximate to a MEMS device in the MEMS chip for direct heating thereof. The temperature of the MEMS chip and CMOS chip are independently controllable of each other via the temperature control loops.Type: GrantFiled: April 6, 2012Date of Patent: October 29, 2013Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Tung-Tsun Chen, Chia-Hua Chu, Chung-Hsien Lin, Jui-Cheng Huang
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Patent number: 8569809Abstract: Sensor cells are arranged in an array in an organic semiconductor layer. Row and column select circuitry addresses the cells of the array one cell at a time to determine the presence of an object, such as a fingerprint ridge or valley, contacting or proximate to a sensing surface above each cell. Control circuitry can be provided in a companion silicon chip or in a second layer of organic semiconductor material to communicate with the array and an associated system processor. The array of sensor cells can be fabricated using a flexible polymer substrate that is peeled off and disposed of after contacts have been patterned on the organic semiconductor layer. The organic semiconductor layer can be used with a superimposed reactive interface layer to detect specific chemical substances in a test medium.Type: GrantFiled: October 13, 2006Date of Patent: October 29, 2013Assignee: STMicroelectronics, Inc.Inventors: Danielle A. Thomas, Bruno J. Debeurre, Peter J. Thoma
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Patent number: 8569089Abstract: Semiconductor nano-devices, such as nano-probe and nano-knife devices, which are constructed using graphene films that are suspended between open cavities of a semiconductor structure. The suspended graphene films serve as electro-mechanical membranes that can be made very thin, from one or few atoms in thickness, to greatly improve the sensitivity and reliability of semiconductor nano-probe and nano-knife devices.Type: GrantFiled: August 31, 2012Date of Patent: October 29, 2013Assignee: International Business Machines CorporationInventor: Wenjuan Zhu