Abstract: The purpose of the present invention is to improve the efficiency of conversion between terahertz electromagnetic wave energy and direct current energy via plasma waves in a terahertz electromagnetic wave conversion device with a field effect transistor structure. This invention has an HEMT structure having a substrate, an electron transit layer, an electron supply layer, a source and a drain, and includes a first and second group of gates. The gate length of each finger of the first group of gates is narrower than the gate length of each finger of the second group of gates, and each finger of each group of gates is disposed between the source and the drain on the same cycle. A first and second distance from each finger of the first group of gates to two fingers of the second group of gates adjacent to each finger are unequal lengths.

Abstract: Semiconductor nano-devices, such as nano-probe and nano-knife devices, which are constructed using graphene films that are suspended between open cavities of a semiconductor structure. The suspended graphene films serve as electro-mechanical membranes that can be made very thin, from one or few atoms in thickness, to greatly improve the sensitivity and reliability of semiconductor nano-probe and nano-knife devices.

Abstract: A semiconductor device with temperature control system. Embodiments of the device may include a MEMS chip including a first heater with a dedicated first temperature control loop and a CMOS chip including a second heater with a dedicated second temperature control loop. Each control loop may have a dedicated temperature sensor for controlling the thermal output of each heater. The first heater and sensor are disposed proximate to a MEMS device in the MEMS chip for direct heating thereof. The temperature of the MEMS chip and CMOS chip are independently controllable of each other via the temperature control loops.

Abstract: A semiconductor pressure sensor includes a cavity disposed in one silicon substrate of a SOI substrate having two silicon substrates bonded to each other with an oxide film therebetween and a diaphragm formed from the other silicon substrate and the oxide film, wherein the oxide film, bordering the cavity, of the diaphragm includes an arc-shaped section at the boundary portion to the one silicon substrate defining the inner wall side surface of the cavity, the arc-shaped section having the same width as the width of the cavity at a desired section in the one silicon substrate and reducing the width of the cavity from the boundary portion toward the diaphragm center.

Abstract: A spin transistor according to an embodiment includes: a semiconductor layer including a p+-region and an n+-region located at a distance from each other, and an i-region located between the p+-region and the n+-region; a first electrode located on the p+-region, the first electrode including a first ferromagnetic layer; a second electrode located on the n+-region, the second electrode including a second ferromagnetic layer; and a gate located on at least the i-region.

Abstract: A metal mesh lid MEMS package includes a substrate, a MEMS electronic component coupled to the substrate, and a metal mesh lid coupled to the substrate with a lid adhesive. The metal mesh lid includes a polymeric lid body having a top port formed therein and a metal mesh cap coupled to the lid body. The metal mesh cap covers the top port and serves as both a particulate filter and a continuous conductive shield for EMI/RF interferences. Further, the metal mesh cap provides a locking feature for the lid adhesive to maximize the attach strength of the metal mesh lid to the substrate.

Abstract: Embodiments relate to a graphene-based memory device. The graphene-based memory device includes a first graphene layer and a second graphene layer. A first insulation layer is located between the first and second graphene layers. The first insulation layer has an opening between the first and second graphene layers, and the first graphene layer is configured to bend into the opening to contact the second graphene layer based on a first electrostatic force.

Abstract: A gas-sensitive semiconductor device having a semiconductive channel (10) which is delimited by a first (12) and a second (14) channel electrode, and having a gate electrode (16) which is associated with the channel and which cooperates with the channel in such a way that a change in conductivity of the channel (10) occurs as a response to an action of a gas. The gate electrode (16) and/or a gate insulation layer (20) which insulates the gate electrode from the channel, and/or a gate stack layer (18) which may be provided between the gate electrode and the channel have/has two surface sections (22, 24) which differ in their sensitivity to gases.

Abstract: A single chip wireless sensor comprises a microcontroller connected by a transmit/receive interface to a wireless antenna. The microcontroller is also connected to an 8 kB RAM, a USB interface, an RS232 interface, 64kB flash memory, and a 32kHz crystal. The device senses humidity and temperature, and a humidity sensor is connected by an 18 bit ?? A-to-D converter to the microcontroller and a temperature sensor is connected by a 12 bit SAR A-to-D converter to the microcontroller. The device is an integrated chip manufactured in a single process in which both the electronics and sensor components are manufactured using standard CMOS processing techniques, applied to achieve both electronic and sensing components in an integrated process.

Abstract: A single chip wireless sensor comprises a microcontroller connected by a transmit/receive interface to a wireless antenna. The microcontroller is also connected to an 8 kB RAM, a USB interface, an RS232 interface, 64 kB flash memory, and a 32 kHz crystal. The device senses humidity and temperature, and a humidity sensor is connected by an 18 bit ?? A-to-D converter to the microcontroller and a temperature sensor is connected by a 12 bit SAR A-to-D converter to the microcontroller. The device is an integrated chip manufactured in a single process in which both the electronics and sensor components are manufactured using standard CMOS processing techniques, applied to achieve both electronic and sensing components in an integrated process.

Abstract: Provided are a variable field effect transistor (FET) designed to suppress a reduction of current between a source and a drain due to heat while decreasing a temperature of the FET, and an electrical and electronic apparatus including the variable gate FET. The variable gate FET includes a FET and a gate control device that is attached to a surface or a heat-generating portion of the FET and is connected to a gate terminal of the FET so as to vary a voltage of the gate terminal. A channel current between the source and drain is controlled by the gate control device that varies the voltage of the gate terminal when the temperature of the FET increases above a predetermined temperature.

Abstract: A single chip wireless sensor comprises a microcontroller connected by a transmit/receive interface to a wireless antenna. The microcontroller is also connected to an 8 kB RAM, a USB interface, an RS232 interface, 64 kB flash memory, and a 32 kHz crystal. The device senses humidity and temperature, and a humidity sensor is connected by an 18 bit ?? A-to-D converter to the microcontroller and a temperature sensor is connected by a 12 bit SAR A-to-D converter to the microcontroller. The device is an integrated chip manufactured in a single process in which both the electronics and sensor components are manufactured using standard CMOS processing techniques, applied to achieve both electronic and sensing components in an integrated process.

Abstract: A sensor device includes a semiconductor chip. The semiconductor chip has a sensing region sensitive to mechanical loading. A pillar is mechanically coupled to the sensing region.

Abstract: A compact sensor with which particles floating in the air can be easily detected. A sensor having a microstructure which detects a detection object by contact is used. A microstructure has an opening to be a detection hole corresponding to the size of a detection object, and a pair of electrodes having a bridge structure are provided thereabove or thereunder so as to partially contact with each other.

Abstract: The described embodiments may provide a chemical detection circuit. The chemical detection circuit may comprise a pixel array, a pair of analog-to-digital converter (ADC) circuit blocks, a pair of input/output (I/O) circuit blocks coupled to the pair of ADC circuit blocks respectively, and a plurality of serial link terminals coupled to the pair of IO circuit blocks. The pixel array may comprise a plurality of chemically-sensitive pixels formed in columns and rows. Each chemically-sensitive pixel may comprise: a chemically-sensitive transistor, and a row selection device.

Abstract: A method for fabrication of capacitive environment sensors is provided in which the sensor elements are integrated in a CMOS structure with electronics through the use of complementary metal oxide semiconductor (CMOS) fabrication methods. Also provided are environment sensors fabricated, for example, by the method, and a measurement system using the environment sensors fabricated by the method. The described method includes etching away one of the metal layers in a CMOS chip to create a cavity. This cavity is then filled with an environment-sensitive dielectric material to form a sensing capacitor between plates formed by the metal adhesion layers or an array of contacts from other metal layers of the CMOS structure. This approach provides improved sensing capabilities in a system that is easily manufactured.

Abstract: The present invention is directed to an interconnect for an implantable medical device. The interconnect includes a first conductive layer, a second conductive layer introduced over the first conductive layer, and a third conductive layer introduced over the second conductive layer. One of the first conductive layer, the second conductive layer, and the third conductive layer comprises titanium-niobium (Ti—Nb).

Abstract: The present invention relates to integrating an inertial mechanical device on top of a CMOS substrate monolithically using IC-foundry compatible processes. The CMOS substrate is completed first using standard IC processes. A thick silicon layer is added on top of the CMOS. A subsequent patterning step defines a mechanical structure for inertial sensing. Finally, the mechanical device is encapsulated by a thick insulating layer at the wafer level. Comparing to the incumbent bulk or surface micromachined MEMS inertial sensors, the vertically monolithically integrated inertial sensors have smaller chip size, lower parasitics, higher sensitivity, lower power, and lower cost.

Abstract: Provided are a thermistor with 3 terminals, a thermistor-transistor including the thermistor, a circuit for controlling heat of a power transistor using the thermistor-transistor, and a power system including the circuit. The circuit includes: a thermistor-transistor which comprises a thermistor having a resistance decreasing with an increase in temperature and a control transistor connected to the thermistor; and at least one power transistor which is connected to a driving device to control a supply of power to the driving device, wherein the thermistor-transistor is adhered to one of a surface and a heat-emitting part of the at least one power transistor and is connected to one of a base, a gate, a collector, and a drain of the at least one power transistor to decrease or block a current flowing in the at least one power transistor when the temperature of the at least one power transistor rises, so as to prevent the power transistor from heating up.

Abstract: According to one embodiment, a semiconductor device, includes a magneto resistive element including a first magnetic layer, a first interface magnetic layer, a nonmagnetic layer, a second interface magnetic layer and a second magnetic layer as a stacked structure in order; and a metal layer including first metal atoms, second metal atoms and boron atoms, the metal layer being provided at least one region selected from under the first magnetic, between the first magnetic layer and the first interface magnetic layer, between the second interface magnetic layer and the second magnetic layer, and upper the second magnetic layer.

Abstract: Provided is a biosensor that makes it possible to detect the electrical properties of a bio-related material contained in an analyte fluid such as an aqueous solution placed on a sensitive membrane and to observe the bio-related material at a high magnification with an observation device such as a microscope.

Abstract: A demultiplexed nanowire sensor array for detecting different chemical and biological species are provided, comprising a sensor array and a demultiplexer array. Methods of detecting at least two chemical and/or biological species are also provided, using the demultiplexed nanowire sensor array.

Abstract: A dynamic and noninvasive method of monitoring the adhesion and proliferation of biological cells through multimode operation (acoustic and optical) using a ZnO nanostructure-modified quartz crystal microbalance (ZnOnano-QCM) biosensor is disclosed.

Abstract: According to one embodiment, a magnetic random access memory includes a plurality of magnetoresistance elements. The plurality of magnetoresistance elements each include a recording layer having magnetic anisotropy perpendicular to a film surface, and a variable magnetization direction, a reference layer having magnetic anisotropy perpendicular to a film surface, and an invariable magnetization direction, and a first nonmagnetic layer formed between the recording layer and the reference layer. The recording layer is physically separated for each of the plurality of magnetoresistance elements. The reference layer and the first nonmagnetic layer continuously extend over the plurality of magnetoresistance elements.

Abstract: A method for forming a neutron detector comprises thinning a backside silicon substrate of a radiation detector; and forming a neutron converter layer on the thinned backside silicon substrate of the radiation detector to form the neutron detector. The neutron converter layer comprises one of boron-10 (10B), lithium-6 (6Li), helium-3 (3He), and gadolinium-157 (157Gd).

Abstract: According to one embodiment, a magnetoresistive element includes a storage layer having a variable and perpendicular magnetization, a tunnel barrier layer on the storage layer, a reference layer having an invariable and perpendicular magnetization on the tunnel barrier layer, a hard mask layer on the reference layer, and a sidewall spacer layer on sidewalls of the reference layer and the hard mask layer. An in-plane size of the reference layer is smaller than an in-plane size of the storage layer. A difference between the in-plane sizes of the storage layer and the reference layer is 2 nm or less. The sidewall spacer layer includes a material selected from a group of a diamond, DLC, BN, SiC, B4C, Al2O3 and AlN.

Abstract: Magnetic tunnel junction transistor devices and methods for operating and foaming magnetic tunnel junction transistor devices. In one aspect, a magnetic tunnel junction transistor device includes a first source/drain electrode, a second source/drain electrode, a gate electrode, and a magnetic tunnel junction disposed between the gate electrode and the second source/drain electrode. The magnetic tunnel junction includes a magnetic free layer that longitudinally extends between, and is overlapped by, the first and second source/drain electrodes. The gate electrode completely overlaps the magnetic free layer between the first and second source/drain electrodes. The magnetic tunnel junction transistor device switches a magnetization orientation of the magnetic free layer by application of a gate voltage to the gate electrode, thereby changing a resistance between the first and second source/drain electrodes through the magnetic free layer.

Abstract: A neutron detector and method are provided. The detector includes a neutron conversion material that emits charged particles in response to a reaction with neutrons, a plurality of semiconductor sense elements that are sensitive to the charged particles, and a latch coupled to an output of semiconductor sense elements.

Abstract: According to one embodiment, a magnetic random access memory includes a first gate electrode and a second gate electrode arranged at a predetermined pitch in a first direction, and extending in a second direction perpendicular to the first direction, a first magnetoresistive element formed above a portion between the first gate electrode and the second gate electrode, an electrode layer formed in a position higher than the first magnetoresistive element, and formed to have a distance which is a half of the pitch from the first magnetoresistive element in the first direction, an interconnection formed in a position higher than the electrode layer, and extending in the first direction, and a first via which connects the first magnetoresistive element and the interconnection, and the electrode layer and the interconnection, by using one conductive layer.

Abstract: A field effect transistor comprises an electrostatically moveable gate electrode. The moveable gate is supported by at least two posts, and the source, drain, and channel of the transistor are centrally located under the moveable layer. At least one electrode is positioned on at least two sides of the source, drain, and channel.

Abstract: A single chip wireless sensor comprises a microcontroller connected by a transmit/receive interface to a wireless antenna. The microcontroller is also connected to an 8 kB RAM, a USB interface, an RS232 interface, 64 kB flash memory, and a 32 kHz crystal. The device senses humidity and temperature, and a humidity sensor is connected by an 18 bit ?? A-to-D converter to the microcontroller and a temperature sensor is connected by a 12 bit SAR A-to-D converter to the microcontroller. The device is an integrated chip manufactured in a single process in which both the electronics and sensor components are manufactured using standard CMOS processing techniques, applied to achieve both electronic and sensing components in an integrated process.

Abstract: MEMS Device having Electrothermal Actuation and Release and Method for Fabricating. According to one embodiment, a microscale switch is provided and can include a substrate and a stationary electrode and stationary contact formed on the substrate. The switch can further include a movable microcomponent suspended above the substrate. The microcomponent can include a structural layer including at least one end fixed with respect to the substrate. The microcomponent can further include a movable electrode spaced from the stationary electrode and a movable contact spaced from the stationary electrode. The microcomponent can include an electrothermal component attached to the structural layer and operable to produce heating for generating force for moving the structural layer.

Abstract: A communication device according to an embodiment includes an antenna transmitting/receiving a high frequency signal, a semiconductor chip having four corners and four sides processing the high frequency signal, and a substrate on which a first wiring connected to ground, a second wiring supplying power to the semiconductor chip, a third wiring connected to a protection element or circuit of the semiconductor chip, and fourth wirings transmitting a signal from the semiconductor chip are formed by plating, and the semiconductor chip is mounted.

Abstract: A two-transistor (2T) pixel comprises a chemically-sensitive transistor (ChemFET) and a selection device which is a non-chemically sensitive transistor. A plurality of the 2T pixels may form an array, having a number of rows and a number of columns. The ChemFET can be configured in a source follower or common source readout mode. Both the ChemFET and the non-chemically sensitive transistor can be NMOS or PMOS device.

Abstract: Emissive quantum photonic imagers comprised of a spatial array of digitally addressable multicolor pixels. Each pixel is a vertical stack of multiple semiconductor laser diodes, each of which can generate laser light of a different color. Within each multicolor pixel, the light generated from the stack of diodes is emitted perpendicular to the plane of the imager device via a plurality of vertical waveguides that are coupled to the optical confinement regions of each of the multiple laser diodes comprising the imager device. Each of the laser diodes comprising a single pixel is individually addressable, enabling each pixel to simultaneously emit any combination of the colors associated with the laser diodes at any required on/off duty cycle for each color. Each individual multicolor pixel can simultaneously emit the required colors and brightness values by controlling the on/off duty cycles of their respective laser diodes.

Abstract: According to one embodiment, there is disclosed a magnetic random access memory comprising: a semiconductor substrate; a selective transistor formed at the surface region of the semiconductor substrate and having a gate electrode, a gate insulating film, a source and a drain; and a magnetoresistive element formed on the drain including a magnetic storage layer in which a magnetization direction is variable, a magnetic reference layer in which a magnetization direction is fixed, and a nonmagnetic layer sandwiched between the magnetic storage layer and the magnetic reference layer.

Abstract: A semiconductor device such as an ID chip of the present invention includes an integrated circuit using a semiconductor element formed by using a thin semiconductor film, and an antenna connected to the integrated circuit. It is preferable that the antenna is formed integrally with the integrated circuit, since the mechanical strength of an ID chip can be enhanced. Note that the antenna used in the present invention also includes a conducting wire that is wound round circularly or spirally and fine particles of a soft magnetic material are arranged between the conducting wires. Specifically, an insulating layer in which fine particles of a soft magnetic material are arranged between the conducting wires. Specifically, an insulating layer in which fine particles of a soft magnetic material are included is arranged between the conducting wires.

Abstract: A multibit electro-mechanical memory device comprises a substrate, a bit line on the substrate, a first interlayer insulating film on the bit line, first and second lower word lines on the first interlayer insulating film, the first and second lower word lines separated horizontally from each other by a trench, a spacer abutting a sidewall of each of the first and second lower word lines, a pad electrode inside a contact hole, first and second cantilever electrodes suspended over first and second lower voids that correspond to upper parts of the first and second lower word lines provided in both sides on the pad electrode, the first and second cantilever electrodes being separated from each other by the trench, and being curved in a third direction that is perpendicular to the first and second direction; a second interlayer insulating film on the pad electrode, first and second trap sites supported by the second interlayer insulating film to have first and second upper voids on the first and second cantilever

Abstract: A semiconductor device with an integrated circuit on a semiconductor substrate comprises a Hall effect sensor in a first active region and a lateral high voltage MOS transistor in a second active region. The semiconductor device of the present invention is characterized in that the structure of the integrated Hall effect sensor is strongly related with the structure of a high-voltage DMOS transistor. The integrated Hall effect sensor is in some features similar to a per se known high-voltage DMOS transistor having a double RESURF structure. The control contacts of the Hall effect sensor correspond to the source and drain contacts of the high-voltage DMOS transistor. The semiconductor device of the present invention allows a simplification of the process integration.

Abstract: An embodiment of the invention relates to a Seebeck temperature difference sensor that may be formed in a trench on a semiconductor device. A portion of the sensor may be substantially surrounded by an electrically conductive shield. A plurality of junctions may be included to provide a higher Seebeck sensor voltage. The shield may be electrically coupled to a local potential, or left electrically floating. A portion of the shield may be formed as a doped well in the semiconductor substrate on which the semiconductor device is formed, or as a metal layer substantially covering the sensor. The shield may be formed as a first oxide layer on a sensor trench wall with a conductive shield formed on the first oxide layer, and a second oxide layer formed on the conductive shield. An absolute temperature sensor may be coupled in series with the Seebeck temperature difference sensor.

Abstract: A field-effect magnetic sensor facilitates highly-sensitive magnetic field detection. In accordance with one or more example embodiments, current flow respectively between first and second source/drain terminals and a third source/drain terminal is controlled using inversion layers in separate channel regions for each of the first and second terminals. In response to a magnetic field, a greater amount of current is passed between the third source/drain terminal and one of the first and second source/drain terminals, relative to an amount of current passed between the third source/drain terminal and the other one of the first and second source/drain terminals.

Abstract: A memory device includes a bit line, a first word line, a bit line contact, an electrode, a second word line and a contact tip. The bit line may extend along a first direction. The first word line is formed over the bit line and extends in a second direction. The bit line contact is formed between adjacent first word lines. The bit line contact may have an upper face substantially higher than the first word lines. The electrode contacting with the bit line contact may include an elastic material bending by an electric field among the electrode, the first word line and the second word line. The second word line is disposed over the electrode and corresponds to at least one of the first word lines. The contact tip formed at a lateral portion of the electrode may protrude toward the first and the second word lines.

Abstract: The present invention discloses a radiation detector, an imaging device and an electrode structure thereof, and a method for acquiring an image.

Abstract: In one or more embodiments, a semiconductor device a FinFET device and a second device. In one or more embodiments, the semiconductor device has a contact element coupled between a surface of the fin and the second device.

Abstract: An optical biosensing platform for the real-time detection of the occurrence of a binding event, the optical biosensing platform comprising a nanocrystalline zinc oxide (nano-ZnO) substrate having a surface and being capable of emitting photoluminescence and a surface modifier formed integral with at least a portion of the surface of the nano-ZnO substrate, wherein the surface modifier is capable of binding to a biomolecule and wherein when the surface modifier binds with a biomolecule, a change is induced in the emitted photoluminescent properties of the nano-ZnO substrate, thereby enabling the detection of a binding event.

Abstract: By incorporating germanium material into thermal sensing diode structures, the sensitivity thereof may be significantly increased. In some illustrative embodiments, the process for incorporating the germanium material may be performed with high compatibility with a process flow for incorporating a silicon/germanium material into P-channel transistors of sophisticated semiconductor devices. Hence, temperature control efficiency may be increased with reduced die area consumption.

Abstract: Disclosed is an image sensor. The image sensor includes a semiconductor substrate including a lower interconnection, a plurality of upper interconnection sections protruding upward from the semiconductor substrate, a first trench disposed between the upper interconnection sections such that the upper interconnection sections are spaced apart from each other, a bottom electrode disposed on an outer peripheral surfaces of the upper interconnection sections, a first conductive layer disposed on an outer peripheral surface of the bottom electrode, an intrinsic layer disposed on the semiconductor substrate including the first conductive layer and the first trench, and having a second trench on the first trench, a second conductive layer disposed on the intrinsic layer and having a third trench on the second trench, a light blocking part disposed in the third trench, and a top electrode disposed on the light blocking part and the second conductive layer.

Abstract: A TeraMOS sensor based on a CMOS-SOI-MEMS transistor, thermally isolated by the MEMS post-processing, designed specifically for the detection of THz radiation which may be directly integrated with the CMOS-SOI readout circuitry, in order to achieve a breakthrough in performance and cost. The TeraMOS sensor provides a low-cost, high performance THz passive or active imaging system (roughly in the range of 0.5-1.5 THz) by combining several leading technologies: Complementary Metal Oxide Semiconductor (CMOS)-Silicon on Insulator (SOI), Micro Electro Mechanical Systems (MEMS) and photonics. An array of TeraMOS sensors, integrated with readout circuitry and driving and supporting circuitry provides a monolithic focal plane array or imager. This imager is designed in a commercial CMOS-SOI Fab and the MEMS micromachining is provided as post-processing step in order to reduce cost.

Abstract: Disclosed are voltage distribution device and method for controlling CMOS-based devices for switching radio frequency (RF) signals. In certain RF devices such as mobile phones, providing different amplification modes can yield performance advantages. For example, a capability to transmit at low and high power modes typically results in an extended battery life, since the high power mode can be activated only when needed. Switching between such amplification modes can be facilitated by one or more switches formed in an integrated circuit and configured to route RF signal to different amplification paths. In certain embodiments, such RF switches can be formed as CMOS devices, and can be based on triple-well structures. In certain embodiments, various bias voltages applied to such a CMOS RF switch can be facilitated by a voltage distribution component.

Abstract: Emissive quantum photonic imagers comprised of a spatial array of digitally addressable multicolor pixels. Each pixel is a vertical stack of multiple semiconductor laser diodes, each of which can generate laser light of a different color. Within each multicolor pixel, the light generated from the stack of diodes is emitted perpendicular to the plane of the imager device via a plurality of vertical waveguides that are coupled to the optical confinement regions of each of the multiple laser diodes comprising the imager device. Each of the laser diodes comprising a single pixel is individually addressable, enabling each pixel to simultaneously emit any combination of the colors associated with the laser diodes at any required on/off duty cycle for each color. Each individual multicolor pixel can simultaneously emit the required colors and brightness values by controlling the on/off duty cycles of their respective laser diodes.